Searched refs:writeb (Results 1 - 25 of 126) sorted by path

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/u-boot/arch/m68k/include/asm/
H A Dio.h27 #define writeb(b,addr) out_8((volatile u8 *)(addr), (b)) macro
/u-boot/arch/sh/include/asm/
H A Dio.h152 #define writeb(v, c) __raw_writeb(v, __mem_pci(c)) macro
185 #define writeb(v, addr) __raw_writeb(v, addr) macro
/u-boot/arch/arc/include/asm/
H A Dio.h192 #define writeb(v, c) ({ __iowmb(); writeb_relaxed(v, c); }) macro
/u-boot/arch/arm/cpu/arm926ejs/mxs/
H A Dclock.c166 writeb(CLKCTRL_FRAC_CLKGATE,
168 writeb(CLKCTRL_FRAC_CLKGATE | (div & CLKCTRL_FRAC_FRAC_MASK),
170 writeb(CLKCTRL_FRAC_CLKGATE,
370 writeb(CLKCTRL_FRAC_CLKGATE,
372 writeb(CLKCTRL_FRAC_CLKGATE | (x_best & CLKCTRL_FRAC_FRAC_MASK),
374 writeb(CLKCTRL_FRAC_CLKGATE,
386 writeb(CLKCTRL_FRAC_CLKGATE,
388 writeb(CLKCTRL_FRAC_CLKGATE | (x_best & CLKCTRL_FRAC_FRAC_MASK),
390 writeb(CLKCTRL_FRAC_CLKGATE,
H A Dspl_mem_init.c157 writeb(CLKCTRL_FRAC_CLKGATE,
161 writeb(CLKCTRL_FRAC_CLKGATE | (divider & CLKCTRL_FRAC_FRAC_MASK),
165 writeb(CLKCTRL_FRAC_CLKGATE,
192 writeb(19 & CLKCTRL_FRAC_FRAC_MASK,
/u-boot/arch/arm/cpu/armv7/sunxi/
H A Dpsci.c350 writeb(0, GICD_BASE + GICD_IPRIORITYRn + 15);
/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dsoc.c350 writeb(I2C_GLITCH_EN, ptr);
355 writeb(I2C_GLITCH_EN, ptr);
360 writeb(I2C_GLITCH_EN, ptr);
365 writeb(I2C_GLITCH_EN, ptr);
/u-boot/arch/arm/include/asm/
H A Dio.h101 #define writeb(v,c) ({ u8 __v = v; __iowmb(); __arch_putb(__v,c); __v; }) macro
/u-boot/arch/arm/mach-imx/mx6/
H A Dsoc.c657 writeb(reg, &hdmi->phy_conf0);
660 writeb(reg, &hdmi->phy_conf0);
663 writeb(reg, &hdmi->phy_conf0);
664 writeb(HDMI_MC_PHYRSTZ_ASSERT, &hdmi->mc_phyrstz);
679 writeb(HDMI_MC_PHYRSTZ_DEASSERT, &hdmi->mc_phyrstz);
693 writeb((u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, &hdmi->mc_swrstz);
697 writeb(val, &hdmi->fc_invidconf);
/u-boot/arch/arm/mach-imx/
H A Drdc-sema.c64 writeb(RDC_SEMA_PROC_ID,
97 writeb(0x0, &imx_rdc_sema->gate[per_id % SEMA_GATES_NUM]);
/u-boot/arch/arm/mach-omap2/omap3/
H A Dspl_id_nand.c37 writeb(NAND_CMD_RESET, &gpmc_cfg->cs[0].nand_cmd);
38 writeb(NAND_CMD_STATUS, &gpmc_cfg->cs[0].nand_cmd);
45 writeb(NAND_CMD_READID, &gpmc_cfg->cs[0].nand_cmd);
48 writeb(0x0, &gpmc_cfg->cs[0].nand_adr);
/u-boot/arch/arm/mach-omap2/omap4/
H A Dboot.c86 writeb(0, (u8 *)(OMAP44XX_SAR_RAM_BASE + OMAP_REBOOT_REASON_OFFSET));
96 writeb(mode[i], (u8 *)(OMAP44XX_SAR_RAM_BASE +
99 writeb('\0', (u8 *)(OMAP44XX_SAR_RAM_BASE +
/u-boot/arch/arm/mach-sunxi/
H A Dspl_spi_sunxi.c301 writeb(0x03, spi_tx_reg);
302 writeb((u8)(addr >> 16), spi_tx_reg);
303 writeb((u8)(addr >> 8), spi_tx_reg);
304 writeb((u8)(addr), spi_tx_reg);
/u-boot/arch/microblaze/include/asm/
H A Dio.h33 #define writeb(b, addr) \ macro
49 #define outb(x, addr) ((void)writeb(x, addr))
84 #define __raw_writeb writeb
/u-boot/arch/mips/include/asm/
H A Dio.h162 * make bus memory CPU accessible via the readb/readw/readl/writeb/
176 * make bus memory CPU accessible via the readb/readw/readl/writeb/
199 * make bus memory CPU accessible via the readb/readw/readl/writeb/
351 #define writeb writeb macro
382 #define writeb_relaxed writeb
/u-boot/arch/mips/mach-jz47xx/jz4780/
H A Dreset.c49 writeb(WDT_TCER_TCEN, wdt_regs + WDT_TCER);
/u-boot/arch/nios2/include/asm/
H A Dio.h68 #define writeb(val,addr)\ macro
78 #define outb(val, addr) writeb(val,addr)
/u-boot/arch/powerpc/include/asm/
H A Dio.h27 #define writeb(b,addr) out_8((volatile u8 *)(addr), (b)) macro
/u-boot/arch/riscv/include/asm/
H A Dio.h46 static inline void writeb(u8 val, volatile void __iomem *addr) function
/u-boot/arch/sandbox/include/asm/
H A Dio.h45 #define writeb(v, addr) sandbox_write((void *)addr, v, SB_SIZE_8) macro
77 #define out_8(a,v) writeb(v,a)
141 #define out_8(a,v) writeb(v,a)
/u-boot/arch/sh/lib/
H A Dtime.c29 writeb(readb(TMU_BASE + TSTR) & ~TSTR_STR0, TMU_BASE + TSTR);
30 writeb(readb(TMU_BASE + TSTR) | TSTR_STR0, TMU_BASE + TSTR);
/u-boot/arch/x86/cpu/broadwell/
H A Dlpc.c35 writeb(ssfc, SPI_REG(SPIBAR_SSFC + 2));
/u-boot/arch/x86/cpu/
H A Dirq.c119 writeb(irq, (uintptr_t)priv->ibase +
/u-boot/arch/x86/include/asm/
H A Dio.h69 #define writeb(b, addr) (*(volatile u8 *)(addr) = (b)) macro
73 #define __raw_writeb writeb
303 IO_COND(addr, outb(value, port), writeb(value, addr));
/u-boot/arch/x86/lib/
H A Dbios.c57 writeb(0xfc, 0xffffe);

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