arm: Clean up asm/io.h

asm/io.h is the header file containing the central MMIO accessor macros.
Judging by the header and the comments, it was apparently once copied
from the Linux kernel, but has deviated since then *heavily*. There is
absolutely no point in staying close to the original Linux code anymore,
so just remove the old cruft, by:
- removing pointless Linux history
- removing commented code
- removing outdated comments
- removing unused definitions (for mem_isa)

This massively improves the readability of the file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

arm64: Update memcpy_{from, to}io() helpers

At early U-Boot stage, before relocation, MMU is not yet configured
and disabled. DDR may not be configured with the correct memory
attributes (can be configured in MT_DEVICE instead of MT_MEMORY).

In this case, usage of memcpy_{from, to}io() may leads to synchronous
abort in AARCH64 in case the normal memory address is not 64Bits aligned.

To avoid such situation, forbid usage of normal memory cast to (u64 *) in
case MMU is not enabled.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: mark.kettenis@xs4all.nl
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

arm: include/asm/io.h: Add 64bit clrbits and setbits helpers

Add 64bit API for clrbits and setbits.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

xen: Port Xen hypervisor related code from mini-os

Port hypervisor related code from Mini-OS. This is referencing the code
of Mini-OS from [1] by Huang Shijie and Volodymyr Babchuk which is for
ARM64.
Update essential arch code to support required bit operations, memory
barriers etc.

Copyright for the bits ported belong to at least the following authors,
please see related files for details:

Copyright (c) 2002-2003, K A Fraser
Copyright (c) 2005, Grzegorz Milos, gm281@cam.ac.uk,Intel Research Cambridge
Copyright (c) 2014, Karim Allah Ahmed <karim.allah.ahmed@gmail.com>

[1] - https://github.com/zyzii/mini-os.git

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
[trini: Drop wmb() from musb-net/linux-compat.h now]
Signed-off-by: Tom Rini <trini@konsulko.com>

arm64: Add memcpy_{from, to}io() and memset_io() helpers

Provide optimized memcpy_{from,to}io() and memset_io(). This is required
when moving large amount of data to and from IO regions such as IP
registers or accessing memory mapped flashes.

Code is borrowed from Linux Kernel v5.4.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>

ARM: asm/io.h: remove redundant #if !defined(readb) block

readb is unconditionally defined earlier in io.h, so there's no point
checking whether it's undefined.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>

ARM: asm/io.h: kill off confusing #ifdef __mem_pci block

No ARM board seems to define __mem_pci - and if it did, one would get tons of

./arch/arm/include/asm/io.h:307:0: warning: "readl" redefined

warnings, because readl and friends are unconditionally defined
earlier in io.h. Moreover, the redefinitions lack the memory barriers
that the first definitions have. So I'm guessing this is practically
dead code.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>

arm: asm: io.h: define readX_relaxed and writeX_relaxed

This patch port the function readX_relaxed and
writeX_relaxed from kernel 4.18.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

arm: Use asm-generic/io.h

Convert the arm architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for arm this is primarily a matter of removing code.

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Reviewed-by: Simon Glass <sjg@chromium.org>

ARM: Rework and correct barrier definitions

As part of testing booting Linux kernels on Rockchip devices, it was
discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for
some cases incomplete isb definitions. This was causing a failure to
boot of the Linux kernel.

In order to solve this problem as well as cover any corner cases that we
may also have had a number of changes are made in order to consolidate
things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb
definitions. This however introduces another complexity. Due to
needing to build SPL for 32bit tegra with -march=armv4 we need to borrow
the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete
form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add
a comment about it. Now that we can always know what the target CPU is
capable off we can get always do the correct thing for the barrier. The
final part of this is that need to be consistent everywhere and call
isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the
function names in others.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Sandy Patterson <apatterson@sightlogix.com>
Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reported-by: Sandy Patterson <apatterson@sightlogix.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

arm, nds32, sh: remove useless ioremap()/iounmap() defines

These defines are valid only when iomem_valid_addr is defined,
but I do not see such defines anywhere. Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

arm: add missing writes[bwql], reads[bwql].

ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
but not the writes[bwql], reads[bwql] needed by some drivers.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

Data types defined for 64 bit physical address

Data types and I/O functions have been defined for
64 bit physical addresses in arm.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

arm: ls102xa: Add Freescale LS102xA SoC support

The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.

Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that have been optimized for high
reliability and pack the highest level of integration
available for sub-3 W embedded communications processors
with Layerscape architecture and with a comprehensive
enablement model focused on ease of programmability.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>

ARM:asm:io.h use static inline

When compiling u-boot with W=1 the extern inline void for
read* is likely causing the most noise. gcc / clang will
warn there is never a actual declaration for these functions.
Instead of declaring these extern make them static inline so
it is actually declared.

cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>

driver/ddr: Fix DDR4 driver for ARM

Previously the driver was only tested on Power SoCs. Different barrier
instructions are needed for ARM SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>

Added 64-bit MMIO accessors for ARMv8

This is needed for accessing peripherals with 64-bit MMIO registers,
from ARMv8 processors.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>

arm: Support iotrace feature

Support the iotrace feature for ARM, when enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>

arm64: core support

Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: Scott Wood <scottwood@freescale.com>

Signed-off-by: David Feng <fenghua@phytium.com.cn>

ARM: fix write*() I/O accessors

Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb
and friends." introduced I/O accessors with memory barriers.
Unfortunately the new write*() accessors introduced a bug:

The problem is that the argument "v" gets evaluated twice. This
breaks code like used here (from "drivers/net/dnet.c"):

for (i = 0; i < wrsz; i++)
writel(*bufp++, &dnet->regs->TX_DATA_FIFO);

Use auxiliary variables to avoid such problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Alexander Holler <holler@ahsoftware.de>
Cc: Dirk Behme <dirk.behme@googlemail.com>

ARM: Avoid compiler optimization for readb, writeb and friends.

gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.

Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel headers avoids such optimizations when
gcc 4.5.1 is used.

Maybe the headers as used in the current linux-kernel should be used,
but to avoid large changes, I've just added a small change to the current headers.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Alessandro Rubini <rubini-list@gnudd.com>
Tested-by: Thomas Weber <weber@corscience.de>
Acked-by: Alexander Holler <holler@ahsoftware.de>
Tested-by: Alexander Holler <holler@ahsoftware.de>

ARM: Define __raw_readX and __raw_writeX

These functions are undefined on ARM when using __io. These are the commonly
used versions and can be redefined.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>

ARM: fix bug in macro __arch_ioremap.

Signed-off-by: Terry Lv <r65388@freescale.com>

Fix commit message and code formatting.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Move architecture-specific includes to arch/$ARCH/include/asm

This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

arm64: Update memcpy_{from, to}io() helpers

At early U-Boot stage, before relocation, MMU is not yet configured
and disabled. DDR may not be configured with the correct memory
attributes (can be configured in MT_DEVICE instead of MT_MEMORY).

In this case, usage of memcpy_{from, to}io() may leads to synchronous
abort in AARCH64 in case the normal memory address is not 64Bits aligned.

To avoid such situation, forbid usage of normal memory cast to (u64 *) in
case MMU is not enabled.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: mark.kettenis@xs4all.nl
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

arm: include/asm/io.h: Add 64bit clrbits and setbits helpers

Add 64bit API for clrbits and setbits.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

xen: Port Xen hypervisor related code from mini-os

Port hypervisor related code from Mini-OS. This is referencing the code
of Mini-OS from [1] by Huang Shijie and Volodymyr Babchuk which is for
ARM64.
Update essential arch code to support required bit operations, memory
barriers etc.

Copyright for the bits ported belong to at least the following authors,
please see related files for details:

Copyright (c) 2002-2003, K A Fraser
Copyright (c) 2005, Grzegorz Milos, gm281@cam.ac.uk,Intel Research Cambridge
Copyright (c) 2014, Karim Allah Ahmed <karim.allah.ahmed@gmail.com>

[1] - https://github.com/zyzii/mini-os.git

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
[trini: Drop wmb() from musb-net/linux-compat.h now]
Signed-off-by: Tom Rini <trini@konsulko.com>

arm64: Add memcpy_{from, to}io() and memset_io() helpers

Provide optimized memcpy_{from,to}io() and memset_io(). This is required
when moving large amount of data to and from IO regions such as IP
registers or accessing memory mapped flashes.

Code is borrowed from Linux Kernel v5.4.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>

ARM: asm/io.h: remove redundant #if !defined(readb) block

readb is unconditionally defined earlier in io.h, so there's no point
checking whether it's undefined.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>

ARM: asm/io.h: kill off confusing #ifdef __mem_pci block

No ARM board seems to define __mem_pci - and if it did, one would get tons of

./arch/arm/include/asm/io.h:307:0: warning: "readl" redefined

warnings, because readl and friends are unconditionally defined
earlier in io.h. Moreover, the redefinitions lack the memory barriers
that the first definitions have. So I'm guessing this is practically
dead code.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>

arm: asm: io.h: define readX_relaxed and writeX_relaxed

This patch port the function readX_relaxed and
writeX_relaxed from kernel 4.18.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

arm: Use asm-generic/io.h

Convert the arm architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for arm this is primarily a matter of removing code.

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Reviewed-by: Simon Glass <sjg@chromium.org>

ARM: Rework and correct barrier definitions

As part of testing booting Linux kernels on Rockchip devices, it was
discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for
some cases incomplete isb definitions. This was causing a failure to
boot of the Linux kernel.

In order to solve this problem as well as cover any corner cases that we
may also have had a number of changes are made in order to consolidate
things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb
definitions. This however introduces another complexity. Due to
needing to build SPL for 32bit tegra with -march=armv4 we need to borrow
the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete
form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add
a comment about it. Now that we can always know what the target CPU is
capable off we can get always do the correct thing for the barrier. The
final part of this is that need to be consistent everywhere and call
isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the
function names in others.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Sandy Patterson <apatterson@sightlogix.com>
Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reported-by: Sandy Patterson <apatterson@sightlogix.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

arm, nds32, sh: remove useless ioremap()/iounmap() defines

These defines are valid only when iomem_valid_addr is defined,
but I do not see such defines anywhere. Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

arm: add missing writes[bwql], reads[bwql].

ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
but not the writes[bwql], reads[bwql] needed by some drivers.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

Data types defined for 64 bit physical address

Data types and I/O functions have been defined for
64 bit physical addresses in arm.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

arm: ls102xa: Add Freescale LS102xA SoC support

The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.

Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that have been optimized for high
reliability and pack the highest level of integration
available for sub-3 W embedded communications processors
with Layerscape architecture and with a comprehensive
enablement model focused on ease of programmability.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>

ARM:asm:io.h use static inline

When compiling u-boot with W=1 the extern inline void for
read* is likely causing the most noise. gcc / clang will
warn there is never a actual declaration for these functions.
Instead of declaring these extern make them static inline so
it is actually declared.

cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>

driver/ddr: Fix DDR4 driver for ARM

Previously the driver was only tested on Power SoCs. Different barrier
instructions are needed for ARM SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>

Added 64-bit MMIO accessors for ARMv8

This is needed for accessing peripherals with 64-bit MMIO registers,
from ARMv8 processors.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>

arm: Support iotrace feature

Support the iotrace feature for ARM, when enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>

arm64: core support

Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: Scott Wood <scottwood@freescale.com>

Signed-off-by: David Feng <fenghua@phytium.com.cn>

ARM: fix write*() I/O accessors

Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb
and friends." introduced I/O accessors with memory barriers.
Unfortunately the new write*() accessors introduced a bug:

The problem is that the argument "v" gets evaluated twice. This
breaks code like used here (from "drivers/net/dnet.c"):

for (i = 0; i < wrsz; i++)
writel(*bufp++, &dnet->regs->TX_DATA_FIFO);

Use auxiliary variables to avoid such problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Alexander Holler <holler@ahsoftware.de>
Cc: Dirk Behme <dirk.behme@googlemail.com>

ARM: Avoid compiler optimization for readb, writeb and friends.

gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.

Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel headers avoids such optimizations when
gcc 4.5.1 is used.

Maybe the headers as used in the current linux-kernel should be used,
but to avoid large changes, I've just added a small change to the current headers.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Alessandro Rubini <rubini-list@gnudd.com>
Tested-by: Thomas Weber <weber@corscience.de>
Acked-by: Alexander Holler <holler@ahsoftware.de>
Tested-by: Alexander Holler <holler@ahsoftware.de>

ARM: Define __raw_readX and __raw_writeX

These functions are undefined on ARM when using __io. These are the commonly
used versions and can be redefined.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>

ARM: fix bug in macro __arch_ioremap.

Signed-off-by: Terry Lv <r65388@freescale.com>

Fix commit message and code formatting.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Move architecture-specific includes to arch/$ARCH/include/asm

This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

arm: include/asm/io.h: Add 64bit clrbits and setbits helpers

Add 64bit API for clrbits and setbits.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

xen: Port Xen hypervisor related code from mini-os

Port hypervisor related code from Mini-OS. This is referencing the code
of Mini-OS from [1] by Huang Shijie and Volodymyr Babchuk which is for
ARM64.
Update essential arch code to support required bit operations, memory
barriers etc.

Copyright for the bits ported belong to at least the following authors,
please see related files for details:

Copyright (c) 2002-2003, K A Fraser
Copyright (c) 2005, Grzegorz Milos, gm281@cam.ac.uk,Intel Research Cambridge
Copyright (c) 2014, Karim Allah Ahmed <karim.allah.ahmed@gmail.com>

[1] - https://github.com/zyzii/mini-os.git

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
[trini: Drop wmb() from musb-net/linux-compat.h now]
Signed-off-by: Tom Rini <trini@konsulko.com>

arm64: Add memcpy_{from, to}io() and memset_io() helpers

Provide optimized memcpy_{from,to}io() and memset_io(). This is required
when moving large amount of data to and from IO regions such as IP
registers or accessing memory mapped flashes.

Code is borrowed from Linux Kernel v5.4.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>

ARM: asm/io.h: remove redundant #if !defined(readb) block

readb is unconditionally defined earlier in io.h, so there's no point
checking whether it's undefined.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>

ARM: asm/io.h: kill off confusing #ifdef __mem_pci block

No ARM board seems to define __mem_pci - and if it did, one would get tons of

./arch/arm/include/asm/io.h:307:0: warning: "readl" redefined

warnings, because readl and friends are unconditionally defined
earlier in io.h. Moreover, the redefinitions lack the memory barriers
that the first definitions have. So I'm guessing this is practically
dead code.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>

arm: asm: io.h: define readX_relaxed and writeX_relaxed

This patch port the function readX_relaxed and
writeX_relaxed from kernel 4.18.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

arm: Use asm-generic/io.h

Convert the arm architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for arm this is primarily a matter of removing code.

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Reviewed-by: Simon Glass <sjg@chromium.org>

ARM: Rework and correct barrier definitions

As part of testing booting Linux kernels on Rockchip devices, it was
discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for
some cases incomplete isb definitions. This was causing a failure to
boot of the Linux kernel.

In order to solve this problem as well as cover any corner cases that we
may also have had a number of changes are made in order to consolidate
things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb
definitions. This however introduces another complexity. Due to
needing to build SPL for 32bit tegra with -march=armv4 we need to borrow
the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete
form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add
a comment about it. Now that we can always know what the target CPU is
capable off we can get always do the correct thing for the barrier. The
final part of this is that need to be consistent everywhere and call
isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the
function names in others.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Sandy Patterson <apatterson@sightlogix.com>
Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reported-by: Sandy Patterson <apatterson@sightlogix.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

arm, nds32, sh: remove useless ioremap()/iounmap() defines

These defines are valid only when iomem_valid_addr is defined,
but I do not see such defines anywhere. Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

arm: add missing writes[bwql], reads[bwql].

ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
but not the writes[bwql], reads[bwql] needed by some drivers.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

Data types defined for 64 bit physical address

Data types and I/O functions have been defined for
64 bit physical addresses in arm.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

arm: ls102xa: Add Freescale LS102xA SoC support

The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.

Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that have been optimized for high
reliability and pack the highest level of integration
available for sub-3 W embedded communications processors
with Layerscape architecture and with a comprehensive
enablement model focused on ease of programmability.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>

ARM:asm:io.h use static inline

When compiling u-boot with W=1 the extern inline void for
read* is likely causing the most noise. gcc / clang will
warn there is never a actual declaration for these functions.
Instead of declaring these extern make them static inline so
it is actually declared.

cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>

driver/ddr: Fix DDR4 driver for ARM

Previously the driver was only tested on Power SoCs. Different barrier
instructions are needed for ARM SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>

Added 64-bit MMIO accessors for ARMv8

This is needed for accessing peripherals with 64-bit MMIO registers,
from ARMv8 processors.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>

arm: Support iotrace feature

Support the iotrace feature for ARM, when enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>

arm64: core support

Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: Scott Wood <scottwood@freescale.com>

Signed-off-by: David Feng <fenghua@phytium.com.cn>

ARM: fix write*() I/O accessors

Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb
and friends." introduced I/O accessors with memory barriers.
Unfortunately the new write*() accessors introduced a bug:

The problem is that the argument "v" gets evaluated twice. This
breaks code like used here (from "drivers/net/dnet.c"):

for (i = 0; i < wrsz; i++)
writel(*bufp++, &dnet->regs->TX_DATA_FIFO);

Use auxiliary variables to avoid such problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Alexander Holler <holler@ahsoftware.de>
Cc: Dirk Behme <dirk.behme@googlemail.com>

ARM: Avoid compiler optimization for readb, writeb and friends.

gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.

Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel headers avoids such optimizations when
gcc 4.5.1 is used.

Maybe the headers as used in the current linux-kernel should be used,
but to avoid large changes, I've just added a small change to the current headers.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Alessandro Rubini <rubini-list@gnudd.com>
Tested-by: Thomas Weber <weber@corscience.de>
Acked-by: Alexander Holler <holler@ahsoftware.de>
Tested-by: Alexander Holler <holler@ahsoftware.de>

ARM: Define __raw_readX and __raw_writeX

These functions are undefined on ARM when using __io. These are the commonly
used versions and can be redefined.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>

ARM: fix bug in macro __arch_ioremap.

Signed-off-by: Terry Lv <r65388@freescale.com>

Fix commit message and code formatting.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Move architecture-specific includes to arch/$ARCH/include/asm

This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

xen: Port Xen hypervisor related code from mini-os

Port hypervisor related code from Mini-OS. This is referencing the code
of Mini-OS from [1] by Huang Shijie and Volodymyr Babchuk which is for
ARM64.
Update essential arch code to support required bit operations, memory
barriers etc.

Copyright for the bits ported belong to at least the following authors,
please see related files for details:

Copyright (c) 2002-2003, K A Fraser
Copyright (c) 2005, Grzegorz Milos, gm281@cam.ac.uk,Intel Research Cambridge
Copyright (c) 2014, Karim Allah Ahmed <karim.allah.ahmed@gmail.com>

[1] - https://github.com/zyzii/mini-os.git

Signed-off-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
[trini: Drop wmb() from musb-net/linux-compat.h now]
Signed-off-by: Tom Rini <trini@konsulko.com>

arm64: Add memcpy_{from, to}io() and memset_io() helpers

Provide optimized memcpy_{from,to}io() and memset_io(). This is required
when moving large amount of data to and from IO regions such as IP
registers or accessing memory mapped flashes.

Code is borrowed from Linux Kernel v5.4.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>

ARM: asm/io.h: remove redundant #if !defined(readb) block

readb is unconditionally defined earlier in io.h, so there's no point
checking whether it's undefined.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>

ARM: asm/io.h: kill off confusing #ifdef __mem_pci block

No ARM board seems to define __mem_pci - and if it did, one would get tons of

./arch/arm/include/asm/io.h:307:0: warning: "readl" redefined

warnings, because readl and friends are unconditionally defined
earlier in io.h. Moreover, the redefinitions lack the memory barriers
that the first definitions have. So I'm guessing this is practically
dead code.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>

arm: asm: io.h: define readX_relaxed and writeX_relaxed

This patch port the function readX_relaxed and
writeX_relaxed from kernel 4.18.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

arm: Use asm-generic/io.h

Convert the arm architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for arm this is primarily a matter of removing code.

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Reviewed-by: Simon Glass <sjg@chromium.org>

ARM: Rework and correct barrier definitions

As part of testing booting Linux kernels on Rockchip devices, it was
discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for
some cases incomplete isb definitions. This was causing a failure to
boot of the Linux kernel.

In order to solve this problem as well as cover any corner cases that we
may also have had a number of changes are made in order to consolidate
things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb
definitions. This however introduces another complexity. Due to
needing to build SPL for 32bit tegra with -march=armv4 we need to borrow
the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete
form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add
a comment about it. Now that we can always know what the target CPU is
capable off we can get always do the correct thing for the barrier. The
final part of this is that need to be consistent everywhere and call
isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the
function names in others.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Sandy Patterson <apatterson@sightlogix.com>
Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reported-by: Sandy Patterson <apatterson@sightlogix.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

arm, nds32, sh: remove useless ioremap()/iounmap() defines

These defines are valid only when iomem_valid_addr is defined,
but I do not see such defines anywhere. Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

arm: add missing writes[bwql], reads[bwql].

ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
but not the writes[bwql], reads[bwql] needed by some drivers.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

Data types defined for 64 bit physical address

Data types and I/O functions have been defined for
64 bit physical addresses in arm.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

arm: ls102xa: Add Freescale LS102xA SoC support

The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.

Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that have been optimized for high
reliability and pack the highest level of integration
available for sub-3 W embedded communications processors
with Layerscape architecture and with a comprehensive
enablement model focused on ease of programmability.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>

ARM:asm:io.h use static inline

When compiling u-boot with W=1 the extern inline void for
read* is likely causing the most noise. gcc / clang will
warn there is never a actual declaration for these functions.
Instead of declaring these extern make them static inline so
it is actually declared.

cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>

driver/ddr: Fix DDR4 driver for ARM

Previously the driver was only tested on Power SoCs. Different barrier
instructions are needed for ARM SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>

Added 64-bit MMIO accessors for ARMv8

This is needed for accessing peripherals with 64-bit MMIO registers,
from ARMv8 processors.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>

arm: Support iotrace feature

Support the iotrace feature for ARM, when enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>

arm64: core support

Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: Scott Wood <scottwood@freescale.com>

Signed-off-by: David Feng <fenghua@phytium.com.cn>

ARM: fix write*() I/O accessors

Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb
and friends." introduced I/O accessors with memory barriers.
Unfortunately the new write*() accessors introduced a bug:

The problem is that the argument "v" gets evaluated twice. This
breaks code like used here (from "drivers/net/dnet.c"):

for (i = 0; i < wrsz; i++)
writel(*bufp++, &dnet->regs->TX_DATA_FIFO);

Use auxiliary variables to avoid such problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Alexander Holler <holler@ahsoftware.de>
Cc: Dirk Behme <dirk.behme@googlemail.com>

ARM: Avoid compiler optimization for readb, writeb and friends.

gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.

Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel headers avoids such optimizations when
gcc 4.5.1 is used.

Maybe the headers as used in the current linux-kernel should be used,
but to avoid large changes, I've just added a small change to the current headers.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Alessandro Rubini <rubini-list@gnudd.com>
Tested-by: Thomas Weber <weber@corscience.de>
Acked-by: Alexander Holler <holler@ahsoftware.de>
Tested-by: Alexander Holler <holler@ahsoftware.de>

ARM: Define __raw_readX and __raw_writeX

These functions are undefined on ARM when using __io. These are the commonly
used versions and can be redefined.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>

ARM: fix bug in macro __arch_ioremap.

Signed-off-by: Terry Lv <r65388@freescale.com>

Fix commit message and code formatting.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Move architecture-specific includes to arch/$ARCH/include/asm

This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

arm64: Add memcpy_{from, to}io() and memset_io() helpers

Provide optimized memcpy_{from,to}io() and memset_io(). This is required
when moving large amount of data to and from IO regions such as IP
registers or accessing memory mapped flashes.

Code is borrowed from Linux Kernel v5.4.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>

ARM: asm/io.h: remove redundant #if !defined(readb) block

readb is unconditionally defined earlier in io.h, so there's no point
checking whether it's undefined.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>

ARM: asm/io.h: kill off confusing #ifdef __mem_pci block

No ARM board seems to define __mem_pci - and if it did, one would get tons of

./arch/arm/include/asm/io.h:307:0: warning: "readl" redefined

warnings, because readl and friends are unconditionally defined
earlier in io.h. Moreover, the redefinitions lack the memory barriers
that the first definitions have. So I'm guessing this is practically
dead code.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>

arm: asm: io.h: define readX_relaxed and writeX_relaxed

This patch port the function readX_relaxed and
writeX_relaxed from kernel 4.18.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

arm: Use asm-generic/io.h

Convert the arm architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for arm this is primarily a matter of removing code.

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Reviewed-by: Simon Glass <sjg@chromium.org>

ARM: Rework and correct barrier definitions

As part of testing booting Linux kernels on Rockchip devices, it was
discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for
some cases incomplete isb definitions. This was causing a failure to
boot of the Linux kernel.

In order to solve this problem as well as cover any corner cases that we
may also have had a number of changes are made in order to consolidate
things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb
definitions. This however introduces another complexity. Due to
needing to build SPL for 32bit tegra with -march=armv4 we need to borrow
the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete
form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add
a comment about it. Now that we can always know what the target CPU is
capable off we can get always do the correct thing for the barrier. The
final part of this is that need to be consistent everywhere and call
isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the
function names in others.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Sandy Patterson <apatterson@sightlogix.com>
Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reported-by: Sandy Patterson <apatterson@sightlogix.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

arm, nds32, sh: remove useless ioremap()/iounmap() defines

These defines are valid only when iomem_valid_addr is defined,
but I do not see such defines anywhere. Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

arm: add missing writes[bwql], reads[bwql].

ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
but not the writes[bwql], reads[bwql] needed by some drivers.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

Data types defined for 64 bit physical address

Data types and I/O functions have been defined for
64 bit physical addresses in arm.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

arm: ls102xa: Add Freescale LS102xA SoC support

The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.

Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that have been optimized for high
reliability and pack the highest level of integration
available for sub-3 W embedded communications processors
with Layerscape architecture and with a comprehensive
enablement model focused on ease of programmability.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>

ARM:asm:io.h use static inline

When compiling u-boot with W=1 the extern inline void for
read* is likely causing the most noise. gcc / clang will
warn there is never a actual declaration for these functions.
Instead of declaring these extern make them static inline so
it is actually declared.

cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>

driver/ddr: Fix DDR4 driver for ARM

Previously the driver was only tested on Power SoCs. Different barrier
instructions are needed for ARM SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>

Added 64-bit MMIO accessors for ARMv8

This is needed for accessing peripherals with 64-bit MMIO registers,
from ARMv8 processors.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>

arm: Support iotrace feature

Support the iotrace feature for ARM, when enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>

arm64: core support

Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: Scott Wood <scottwood@freescale.com>

Signed-off-by: David Feng <fenghua@phytium.com.cn>

ARM: fix write*() I/O accessors

Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb
and friends." introduced I/O accessors with memory barriers.
Unfortunately the new write*() accessors introduced a bug:

The problem is that the argument "v" gets evaluated twice. This
breaks code like used here (from "drivers/net/dnet.c"):

for (i = 0; i < wrsz; i++)
writel(*bufp++, &dnet->regs->TX_DATA_FIFO);

Use auxiliary variables to avoid such problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Alexander Holler <holler@ahsoftware.de>
Cc: Dirk Behme <dirk.behme@googlemail.com>

ARM: Avoid compiler optimization for readb, writeb and friends.

gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.

Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel headers avoids such optimizations when
gcc 4.5.1 is used.

Maybe the headers as used in the current linux-kernel should be used,
but to avoid large changes, I've just added a small change to the current headers.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Alessandro Rubini <rubini-list@gnudd.com>
Tested-by: Thomas Weber <weber@corscience.de>
Acked-by: Alexander Holler <holler@ahsoftware.de>
Tested-by: Alexander Holler <holler@ahsoftware.de>

ARM: Define __raw_readX and __raw_writeX

These functions are undefined on ARM when using __io. These are the commonly
used versions and can be redefined.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>

ARM: fix bug in macro __arch_ioremap.

Signed-off-by: Terry Lv <r65388@freescale.com>

Fix commit message and code formatting.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Move architecture-specific includes to arch/$ARCH/include/asm

This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

ARM: asm/io.h: remove redundant #if !defined(readb) block

readb is unconditionally defined earlier in io.h, so there's no point
checking whether it's undefined.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>

ARM: asm/io.h: kill off confusing #ifdef __mem_pci block

No ARM board seems to define __mem_pci - and if it did, one would get tons of

./arch/arm/include/asm/io.h:307:0: warning: "readl" redefined

warnings, because readl and friends are unconditionally defined
earlier in io.h. Moreover, the redefinitions lack the memory barriers
that the first definitions have. So I'm guessing this is practically
dead code.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>

arm: asm: io.h: define readX_relaxed and writeX_relaxed

This patch port the function readX_relaxed and
writeX_relaxed from kernel 4.18.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

arm: Use asm-generic/io.h

Convert the arm architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for arm this is primarily a matter of removing code.

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Reviewed-by: Simon Glass <sjg@chromium.org>

ARM: Rework and correct barrier definitions

As part of testing booting Linux kernels on Rockchip devices, it was
discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for
some cases incomplete isb definitions. This was causing a failure to
boot of the Linux kernel.

In order to solve this problem as well as cover any corner cases that we
may also have had a number of changes are made in order to consolidate
things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb
definitions. This however introduces another complexity. Due to
needing to build SPL for 32bit tegra with -march=armv4 we need to borrow
the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete
form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add
a comment about it. Now that we can always know what the target CPU is
capable off we can get always do the correct thing for the barrier. The
final part of this is that need to be consistent everywhere and call
isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the
function names in others.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Sandy Patterson <apatterson@sightlogix.com>
Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reported-by: Sandy Patterson <apatterson@sightlogix.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

arm, nds32, sh: remove useless ioremap()/iounmap() defines

These defines are valid only when iomem_valid_addr is defined,
but I do not see such defines anywhere. Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

arm: add missing writes[bwql], reads[bwql].

ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
but not the writes[bwql], reads[bwql] needed by some drivers.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

Data types defined for 64 bit physical address

Data types and I/O functions have been defined for
64 bit physical addresses in arm.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

arm: ls102xa: Add Freescale LS102xA SoC support

The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.

Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that have been optimized for high
reliability and pack the highest level of integration
available for sub-3 W embedded communications processors
with Layerscape architecture and with a comprehensive
enablement model focused on ease of programmability.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>

ARM:asm:io.h use static inline

When compiling u-boot with W=1 the extern inline void for
read* is likely causing the most noise. gcc / clang will
warn there is never a actual declaration for these functions.
Instead of declaring these extern make them static inline so
it is actually declared.

cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>

driver/ddr: Fix DDR4 driver for ARM

Previously the driver was only tested on Power SoCs. Different barrier
instructions are needed for ARM SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>

Added 64-bit MMIO accessors for ARMv8

This is needed for accessing peripherals with 64-bit MMIO registers,
from ARMv8 processors.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>

arm: Support iotrace feature

Support the iotrace feature for ARM, when enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>

arm64: core support

Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: Scott Wood <scottwood@freescale.com>

Signed-off-by: David Feng <fenghua@phytium.com.cn>

ARM: fix write*() I/O accessors

Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb
and friends." introduced I/O accessors with memory barriers.
Unfortunately the new write*() accessors introduced a bug:

The problem is that the argument "v" gets evaluated twice. This
breaks code like used here (from "drivers/net/dnet.c"):

for (i = 0; i < wrsz; i++)
writel(*bufp++, &dnet->regs->TX_DATA_FIFO);

Use auxiliary variables to avoid such problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Alexander Holler <holler@ahsoftware.de>
Cc: Dirk Behme <dirk.behme@googlemail.com>

ARM: Avoid compiler optimization for readb, writeb and friends.

gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.

Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel headers avoids such optimizations when
gcc 4.5.1 is used.

Maybe the headers as used in the current linux-kernel should be used,
but to avoid large changes, I've just added a small change to the current headers.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Alessandro Rubini <rubini-list@gnudd.com>
Tested-by: Thomas Weber <weber@corscience.de>
Acked-by: Alexander Holler <holler@ahsoftware.de>
Tested-by: Alexander Holler <holler@ahsoftware.de>

ARM: Define __raw_readX and __raw_writeX

These functions are undefined on ARM when using __io. These are the commonly
used versions and can be redefined.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>

ARM: fix bug in macro __arch_ioremap.

Signed-off-by: Terry Lv <r65388@freescale.com>

Fix commit message and code formatting.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Move architecture-specific includes to arch/$ARCH/include/asm

This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

arm: asm: io.h: define readX_relaxed and writeX_relaxed

This patch port the function readX_relaxed and
writeX_relaxed from kernel 4.18.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

arm: Use asm-generic/io.h

Convert the arm architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for arm this is primarily a matter of removing code.

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Reviewed-by: Simon Glass <sjg@chromium.org>

ARM: Rework and correct barrier definitions

As part of testing booting Linux kernels on Rockchip devices, it was
discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for
some cases incomplete isb definitions. This was causing a failure to
boot of the Linux kernel.

In order to solve this problem as well as cover any corner cases that we
may also have had a number of changes are made in order to consolidate
things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb
definitions. This however introduces another complexity. Due to
needing to build SPL for 32bit tegra with -march=armv4 we need to borrow
the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete
form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add
a comment about it. Now that we can always know what the target CPU is
capable off we can get always do the correct thing for the barrier. The
final part of this is that need to be consistent everywhere and call
isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the
function names in others.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Sandy Patterson <apatterson@sightlogix.com>
Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reported-by: Sandy Patterson <apatterson@sightlogix.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

arm, nds32, sh: remove useless ioremap()/iounmap() defines

These defines are valid only when iomem_valid_addr is defined,
but I do not see such defines anywhere. Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

arm: add missing writes[bwql], reads[bwql].

ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
but not the writes[bwql], reads[bwql] needed by some drivers.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

Data types defined for 64 bit physical address

Data types and I/O functions have been defined for
64 bit physical addresses in arm.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

arm: ls102xa: Add Freescale LS102xA SoC support

The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.

Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that have been optimized for high
reliability and pack the highest level of integration
available for sub-3 W embedded communications processors
with Layerscape architecture and with a comprehensive
enablement model focused on ease of programmability.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>

ARM:asm:io.h use static inline

When compiling u-boot with W=1 the extern inline void for
read* is likely causing the most noise. gcc / clang will
warn there is never a actual declaration for these functions.
Instead of declaring these extern make them static inline so
it is actually declared.

cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>

driver/ddr: Fix DDR4 driver for ARM

Previously the driver was only tested on Power SoCs. Different barrier
instructions are needed for ARM SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>

Added 64-bit MMIO accessors for ARMv8

This is needed for accessing peripherals with 64-bit MMIO registers,
from ARMv8 processors.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>

arm: Support iotrace feature

Support the iotrace feature for ARM, when enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>

arm64: core support

Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: Scott Wood <scottwood@freescale.com>

Signed-off-by: David Feng <fenghua@phytium.com.cn>

ARM: fix write*() I/O accessors

Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb
and friends." introduced I/O accessors with memory barriers.
Unfortunately the new write*() accessors introduced a bug:

The problem is that the argument "v" gets evaluated twice. This
breaks code like used here (from "drivers/net/dnet.c"):

for (i = 0; i < wrsz; i++)
writel(*bufp++, &dnet->regs->TX_DATA_FIFO);

Use auxiliary variables to avoid such problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Alexander Holler <holler@ahsoftware.de>
Cc: Dirk Behme <dirk.behme@googlemail.com>

ARM: Avoid compiler optimization for readb, writeb and friends.

gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.

Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel headers avoids such optimizations when
gcc 4.5.1 is used.

Maybe the headers as used in the current linux-kernel should be used,
but to avoid large changes, I've just added a small change to the current headers.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Alessandro Rubini <rubini-list@gnudd.com>
Tested-by: Thomas Weber <weber@corscience.de>
Acked-by: Alexander Holler <holler@ahsoftware.de>
Tested-by: Alexander Holler <holler@ahsoftware.de>

ARM: Define __raw_readX and __raw_writeX

These functions are undefined on ARM when using __io. These are the commonly
used versions and can be redefined.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>

ARM: fix bug in macro __arch_ioremap.

Signed-off-by: Terry Lv <r65388@freescale.com>

Fix commit message and code formatting.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Move architecture-specific includes to arch/$ARCH/include/asm

This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

arm: Use asm-generic/io.h

Convert the arm architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for arm this is primarily a matter of removing code.

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Reviewed-by: Simon Glass <sjg@chromium.org>

ARM: Rework and correct barrier definitions

As part of testing booting Linux kernels on Rockchip devices, it was
discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for
some cases incomplete isb definitions. This was causing a failure to
boot of the Linux kernel.

In order to solve this problem as well as cover any corner cases that we
may also have had a number of changes are made in order to consolidate
things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb
definitions. This however introduces another complexity. Due to
needing to build SPL for 32bit tegra with -march=armv4 we need to borrow
the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete
form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add
a comment about it. Now that we can always know what the target CPU is
capable off we can get always do the correct thing for the barrier. The
final part of this is that need to be consistent everywhere and call
isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the
function names in others.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Sandy Patterson <apatterson@sightlogix.com>
Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reported-by: Sandy Patterson <apatterson@sightlogix.com>
Signed-off-by: Tom Rini <trini@konsulko.com>

arm, nds32, sh: remove useless ioremap()/iounmap() defines

These defines are valid only when iomem_valid_addr is defined,
but I do not see such defines anywhere. Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

arm: add missing writes[bwql], reads[bwql].

ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
but not the writes[bwql], reads[bwql] needed by some drivers.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

Data types defined for 64 bit physical address

Data types and I/O functions have been defined for
64 bit physical addresses in arm.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

arm: ls102xa: Add Freescale LS102xA SoC support

The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.

Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that have been optimized for high
reliability and pack the highest level of integration
available for sub-3 W embedded communications processors
with Layerscape architecture and with a comprehensive
enablement model focused on ease of programmability.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>

ARM:asm:io.h use static inline

When compiling u-boot with W=1 the extern inline void for
read* is likely causing the most noise. gcc / clang will
warn there is never a actual declaration for these functions.
Instead of declaring these extern make them static inline so
it is actually declared.

cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>

driver/ddr: Fix DDR4 driver for ARM

Previously the driver was only tested on Power SoCs. Different barrier
instructions are needed for ARM SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>

Added 64-bit MMIO accessors for ARMv8

This is needed for accessing peripherals with 64-bit MMIO registers,
from ARMv8 processors.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>

arm: Support iotrace feature

Support the iotrace feature for ARM, when enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>

arm64: core support

Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: Scott Wood <scottwood@freescale.com>

Signed-off-by: David Feng <fenghua@phytium.com.cn>

ARM: fix write*() I/O accessors

Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb
and friends." introduced I/O accessors with memory barriers.
Unfortunately the new write*() accessors introduced a bug:

The problem is that the argument "v" gets evaluated twice. This
breaks code like used here (from "drivers/net/dnet.c"):

for (i = 0; i < wrsz; i++)
writel(*bufp++, &dnet->regs->TX_DATA_FIFO);

Use auxiliary variables to avoid such problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Alexander Holler <holler@ahsoftware.de>
Cc: Dirk Behme <dirk.behme@googlemail.com>

ARM: Avoid compiler optimization for readb, writeb and friends.

gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.

Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel headers avoids such optimizations when
gcc 4.5.1 is used.

Maybe the headers as used in the current linux-kernel should be used,
but to avoid large changes, I've just added a small change to the current headers.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Alessandro Rubini <rubini-list@gnudd.com>
Tested-by: Thomas Weber <weber@corscience.de>
Acked-by: Alexander Holler <holler@ahsoftware.de>
Tested-by: Alexander Holler <holler@ahsoftware.de>

ARM: Define __raw_readX and __raw_writeX

These functions are undefined on ARM when using __io. These are the commonly
used versions and can be redefined.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>

ARM: fix bug in macro __arch_ioremap.

Signed-off-by: Terry Lv <r65388@freescale.com>

Fix commit message and code formatting.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Move architecture-specific includes to arch/$ARCH/include/asm

This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>