#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
debd9826 |
|
30-Apr-2024 |
Tom Rini <trini@konsulko.com> |
arm: sunxi: Remove <common.h> and add needed includes Remove <common.h> from all mach-sunxi and board/sunxi files and when needed add missing include files directly. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
352ba256 |
|
11-Oct-2023 |
Sam Edwards <cfsworks@gmail.com> |
sunxi: psci: implement PSCI on R528 This patch adds the necessary code to make nonsec booting and PSCI secondary core management functional on the R528/T113. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Tested-by: Maksim Kiselev <bigunclemax@gmail.com> Tested-by: Kevin Amadiva <kevin.amadiva@mec.at> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
b1fbc20e |
|
11-Oct-2023 |
Sam Edwards <cfsworks@gmail.com> |
sunxi: psci: stop modeling register layout with C structs Since the sunxi support nowadays generally prefers #defined register offsets instead of modeling register layouts using C structs, now is a good time to do this for PSCI as well. This patch moves away from using the structs `sunxi_cpucfg_reg` and `sunxi_prcm_reg` in psci.c. The former struct and its associated header file existed only to support PSCI code, so also delete them altogether. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
3f31c6f1 |
|
11-Oct-2023 |
Sam Edwards <cfsworks@gmail.com> |
sunxi: psci: refactor register access to separate functions This is to prepare for R528, which does not have the typical "CPUCFG" block; it has a "CPUX" block which provides these same functions but is organized differently. Moving the hardware-access bits to their own functions separates the logic from the hardware so we can reuse the same logic. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
f9670d7b |
|
11-Oct-2023 |
Sam Edwards <cfsworks@gmail.com> |
sunxi: psci: clean away preprocessor macros This patch restructures psci.c to get away from the "many different function definitions switched by #ifdef" paradigm to the preferred style of having a single function definition with `if (IS_ENABLED(...))` to make the optimizer include only the appropriate function bodies instead. There are no functional changes here. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
47ca7b57 |
|
13-May-2022 |
qianfan Zhao <qianfanguijin@163.com> |
sunxi: psci: Fix sunxi_power_switch on sun8i-r40 platform linux system will die if we offline one of the cpu on R40 based board: eg: echo 0 > /sys/devices/system/cpu/cpu3/online The reason is that the R40 version of sunxi_cpu_set_power always passes 0 for the CPU number, so we turn off CPU0, regardless of what CPU the CPU_OFF request came for. Fix this by passing the proper CPU number, as there are proper power clamp registers for every of the four cores. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
151a0300 |
|
13-Apr-2022 |
Peng Fan <peng.fan@nxp.com> |
arm: set cntfrq_el0 if CONFIG_COUNTER_FREQUENCY is valid Since COUNTER_FREQUENCY is obselete, so set cntfrq_el0 if CONFIG_COUNTER_FREQUENCY is valid Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> |
#
90526e9f |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3586cb82 |
|
16-Feb-2020 |
Tomasz Duszynski <tduszyns@gmail.com> |
Revert "sunxi: psci: avoid error address-of-packed-member" Using memcpy() for some MMIO access is generally frowned upon and might break things on some platforms. Allwinner H3, which fails to boot, being an example here. Moreover, fields being accessed are naturally aligned and warnings produced by GCC have been quiesced for some time already by: 53dc8ae ("gcc-9: silence 'address-of-packed-member' warning") That said, it should be okay to revert this commit. This reverts commit 9bd34a69a453d409792e08c00953ce8862145e65. Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Tomasz Duszynski <tduszyns@gmail.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9bd34a69 |
|
09-Nov-2019 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
sunxi: psci: avoid error address-of-packed-member Compiling with GCC 9.2.1 leads to build errors: arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’: arch/arm/cpu/armv7/sunxi/psci.c:144:21: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~~~~ arch/arm/cpu/armv7/sunxi/psci.c:144:46: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~ Use memcpy() and void* pointers to resolve the problem caused by packing the struct sunxi_cpucfg_reg. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
e21e3ffd |
|
22-Jul-2019 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
psci: Fix warnings when compiling with W=1 This patch solves the following warnings: arch/arm/mach-stm32mp/psci.c: warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes] Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
9622c7e6 |
|
16-Apr-2018 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
sunxi: psci: save context id in cpu_on command Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
34748272 |
|
07-Jun-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: psci: Move entry address setting to separate function Currently we set the entry address in the psci_cpu_on function. However R40 has a different register for this. This resulted in an #ifdef / #else block in psci_cpu_on, which we avoided having in the first place. Move this part into a separate function, defined differently for the R40 as opposed to the other single cluster platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
0918648d |
|
28-Feb-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI support for R40 The R40's CPU controls are a combination of sun6i and sun7i. All controls are in the CPUCFG block, and it seems the R40 does not have a PRCM block. The core reset, power gating and clamp controls are grouped like sun6i. Last, the R40 does not have a secure SRAM block. This patch adds a PSCI implementation for CPU bring-up and hotplug for the R40. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e4916e85 |
|
15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the frequency of the ARM Generic Timer (aka. arch timer). ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same purpose. It seems useful to unify them. Since there are less occurences of the latter version, lets convert all users over to COUNTER_FREQUENCY. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
a78cd861 |
|
01-Aug-2016 |
Tom Rini <trini@konsulko.com> |
ARM: Rework and correct barrier definitions As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for some cases incomplete isb definitions. This was causing a failure to boot of the Linux kernel. In order to solve this problem as well as cover any corner cases that we may also have had a number of changes are made in order to consolidate things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb definitions. This however introduces another complexity. Due to needing to build SPL for 32bit tegra with -march=armv4 we need to borrow the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add a comment about it. Now that we can always know what the target CPU is capable off we can get always do the correct thing for the barrier. The final part of this is that need to be consistent everywhere and call isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the function names in others. Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Sandy Patterson <apatterson@sightlogix.com> Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reported-by: Sandy Patterson <apatterson@sightlogix.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6e6622de |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Switch to per-CPU target PC storage in secure data section Now that we have a secure data section and space to store per-CPU target PC address, switch to it instead of storing the target PC on the stack. Also save clobbered r4-r7 registers on the stack and restore them on return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
afc1f65f |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: Move __secure definition to common asm/secure.h sunxi and i.mx7 both define the __secure modifier to put functions in the secure section. Move this to a common place. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
28f90357 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Remove unused psci_text_end symbol psci_text_end was used to calculate the PSCI stack address following the secure monitor text. Now that we have an explicit secure stack section, this is no longer used. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
94a389b2 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Move remaining PSCI assembly code to C This patch finishes the rewrite of sunxi specific PSCI parts into C code. The assembly-only stack setup code has been factored out into a common function for ARMv7. The GIC setup code can be renamed as psci_arch_init. And we can use an empty stub function for psci_text_end. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
4257f5f8 |
|
06-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI implementation in C To make the PSCI backend more maintainable and easier to port to newer SoCs, rewrite the current PSCI implementation in C. Some inline assembly bits are required to access coprocessor registers. PSCI stack setup is the only part left completely in assembly. In theory this part could be split out of psci_arch_init into a separate common function, and psci_arch_init could be completely in C. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
debd9826 |
|
30-Apr-2024 |
Tom Rini <trini@konsulko.com> |
arm: sunxi: Remove <common.h> and add needed includes Remove <common.h> from all mach-sunxi and board/sunxi files and when needed add missing include files directly. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
352ba256 |
|
11-Oct-2023 |
Sam Edwards <cfsworks@gmail.com> |
sunxi: psci: implement PSCI on R528 This patch adds the necessary code to make nonsec booting and PSCI secondary core management functional on the R528/T113. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Tested-by: Maksim Kiselev <bigunclemax@gmail.com> Tested-by: Kevin Amadiva <kevin.amadiva@mec.at> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
b1fbc20e |
|
11-Oct-2023 |
Sam Edwards <cfsworks@gmail.com> |
sunxi: psci: stop modeling register layout with C structs Since the sunxi support nowadays generally prefers #defined register offsets instead of modeling register layouts using C structs, now is a good time to do this for PSCI as well. This patch moves away from using the structs `sunxi_cpucfg_reg` and `sunxi_prcm_reg` in psci.c. The former struct and its associated header file existed only to support PSCI code, so also delete them altogether. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
3f31c6f1 |
|
11-Oct-2023 |
Sam Edwards <cfsworks@gmail.com> |
sunxi: psci: refactor register access to separate functions This is to prepare for R528, which does not have the typical "CPUCFG" block; it has a "CPUX" block which provides these same functions but is organized differently. Moving the hardware-access bits to their own functions separates the logic from the hardware so we can reuse the same logic. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
f9670d7b |
|
11-Oct-2023 |
Sam Edwards <cfsworks@gmail.com> |
sunxi: psci: clean away preprocessor macros This patch restructures psci.c to get away from the "many different function definitions switched by #ifdef" paradigm to the preferred style of having a single function definition with `if (IS_ENABLED(...))` to make the optimizer include only the appropriate function bodies instead. There are no functional changes here. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
47ca7b57 |
|
13-May-2022 |
qianfan Zhao <qianfanguijin@163.com> |
sunxi: psci: Fix sunxi_power_switch on sun8i-r40 platform linux system will die if we offline one of the cpu on R40 based board: eg: echo 0 > /sys/devices/system/cpu/cpu3/online The reason is that the R40 version of sunxi_cpu_set_power always passes 0 for the CPU number, so we turn off CPU0, regardless of what CPU the CPU_OFF request came for. Fix this by passing the proper CPU number, as there are proper power clamp registers for every of the four cores. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
151a0300 |
|
13-Apr-2022 |
Peng Fan <peng.fan@nxp.com> |
arm: set cntfrq_el0 if CONFIG_COUNTER_FREQUENCY is valid Since COUNTER_FREQUENCY is obselete, so set cntfrq_el0 if CONFIG_COUNTER_FREQUENCY is valid Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> |
#
90526e9f |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3586cb82 |
|
16-Feb-2020 |
Tomasz Duszynski <tduszyns@gmail.com> |
Revert "sunxi: psci: avoid error address-of-packed-member" Using memcpy() for some MMIO access is generally frowned upon and might break things on some platforms. Allwinner H3, which fails to boot, being an example here. Moreover, fields being accessed are naturally aligned and warnings produced by GCC have been quiesced for some time already by: 53dc8ae ("gcc-9: silence 'address-of-packed-member' warning") That said, it should be okay to revert this commit. This reverts commit 9bd34a69a453d409792e08c00953ce8862145e65. Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Tomasz Duszynski <tduszyns@gmail.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9bd34a69 |
|
09-Nov-2019 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
sunxi: psci: avoid error address-of-packed-member Compiling with GCC 9.2.1 leads to build errors: arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’: arch/arm/cpu/armv7/sunxi/psci.c:144:21: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~~~~ arch/arm/cpu/armv7/sunxi/psci.c:144:46: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~ Use memcpy() and void* pointers to resolve the problem caused by packing the struct sunxi_cpucfg_reg. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
e21e3ffd |
|
22-Jul-2019 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
psci: Fix warnings when compiling with W=1 This patch solves the following warnings: arch/arm/mach-stm32mp/psci.c: warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes] Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
9622c7e6 |
|
16-Apr-2018 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
sunxi: psci: save context id in cpu_on command Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
34748272 |
|
07-Jun-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: psci: Move entry address setting to separate function Currently we set the entry address in the psci_cpu_on function. However R40 has a different register for this. This resulted in an #ifdef / #else block in psci_cpu_on, which we avoided having in the first place. Move this part into a separate function, defined differently for the R40 as opposed to the other single cluster platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
0918648d |
|
28-Feb-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI support for R40 The R40's CPU controls are a combination of sun6i and sun7i. All controls are in the CPUCFG block, and it seems the R40 does not have a PRCM block. The core reset, power gating and clamp controls are grouped like sun6i. Last, the R40 does not have a secure SRAM block. This patch adds a PSCI implementation for CPU bring-up and hotplug for the R40. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e4916e85 |
|
15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the frequency of the ARM Generic Timer (aka. arch timer). ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same purpose. It seems useful to unify them. Since there are less occurences of the latter version, lets convert all users over to COUNTER_FREQUENCY. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
a78cd861 |
|
01-Aug-2016 |
Tom Rini <trini@konsulko.com> |
ARM: Rework and correct barrier definitions As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for some cases incomplete isb definitions. This was causing a failure to boot of the Linux kernel. In order to solve this problem as well as cover any corner cases that we may also have had a number of changes are made in order to consolidate things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb definitions. This however introduces another complexity. Due to needing to build SPL for 32bit tegra with -march=armv4 we need to borrow the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add a comment about it. Now that we can always know what the target CPU is capable off we can get always do the correct thing for the barrier. The final part of this is that need to be consistent everywhere and call isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the function names in others. Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Sandy Patterson <apatterson@sightlogix.com> Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reported-by: Sandy Patterson <apatterson@sightlogix.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6e6622de |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Switch to per-CPU target PC storage in secure data section Now that we have a secure data section and space to store per-CPU target PC address, switch to it instead of storing the target PC on the stack. Also save clobbered r4-r7 registers on the stack and restore them on return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
afc1f65f |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: Move __secure definition to common asm/secure.h sunxi and i.mx7 both define the __secure modifier to put functions in the secure section. Move this to a common place. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
28f90357 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Remove unused psci_text_end symbol psci_text_end was used to calculate the PSCI stack address following the secure monitor text. Now that we have an explicit secure stack section, this is no longer used. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
94a389b2 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Move remaining PSCI assembly code to C This patch finishes the rewrite of sunxi specific PSCI parts into C code. The assembly-only stack setup code has been factored out into a common function for ARMv7. The GIC setup code can be renamed as psci_arch_init. And we can use an empty stub function for psci_text_end. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
4257f5f8 |
|
06-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI implementation in C To make the PSCI backend more maintainable and easier to port to newer SoCs, rewrite the current PSCI implementation in C. Some inline assembly bits are required to access coprocessor registers. PSCI stack setup is the only part left completely in assembly. In theory this part could be split out of psci_arch_init into a separate common function, and psci_arch_init could be completely in C. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
352ba256 |
|
11-Oct-2023 |
Sam Edwards <cfsworks@gmail.com> |
sunxi: psci: implement PSCI on R528 This patch adds the necessary code to make nonsec booting and PSCI secondary core management functional on the R528/T113. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Tested-by: Maksim Kiselev <bigunclemax@gmail.com> Tested-by: Kevin Amadiva <kevin.amadiva@mec.at> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
b1fbc20e |
|
11-Oct-2023 |
Sam Edwards <cfsworks@gmail.com> |
sunxi: psci: stop modeling register layout with C structs Since the sunxi support nowadays generally prefers #defined register offsets instead of modeling register layouts using C structs, now is a good time to do this for PSCI as well. This patch moves away from using the structs `sunxi_cpucfg_reg` and `sunxi_prcm_reg` in psci.c. The former struct and its associated header file existed only to support PSCI code, so also delete them altogether. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
3f31c6f1 |
|
11-Oct-2023 |
Sam Edwards <cfsworks@gmail.com> |
sunxi: psci: refactor register access to separate functions This is to prepare for R528, which does not have the typical "CPUCFG" block; it has a "CPUX" block which provides these same functions but is organized differently. Moving the hardware-access bits to their own functions separates the logic from the hardware so we can reuse the same logic. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
f9670d7b |
|
11-Oct-2023 |
Sam Edwards <cfsworks@gmail.com> |
sunxi: psci: clean away preprocessor macros This patch restructures psci.c to get away from the "many different function definitions switched by #ifdef" paradigm to the preferred style of having a single function definition with `if (IS_ENABLED(...))` to make the optimizer include only the appropriate function bodies instead. There are no functional changes here. Signed-off-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> |
#
47ca7b57 |
|
13-May-2022 |
qianfan Zhao <qianfanguijin@163.com> |
sunxi: psci: Fix sunxi_power_switch on sun8i-r40 platform linux system will die if we offline one of the cpu on R40 based board: eg: echo 0 > /sys/devices/system/cpu/cpu3/online The reason is that the R40 version of sunxi_cpu_set_power always passes 0 for the CPU number, so we turn off CPU0, regardless of what CPU the CPU_OFF request came for. Fix this by passing the proper CPU number, as there are proper power clamp registers for every of the four cores. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
151a0300 |
|
13-Apr-2022 |
Peng Fan <peng.fan@nxp.com> |
arm: set cntfrq_el0 if CONFIG_COUNTER_FREQUENCY is valid Since COUNTER_FREQUENCY is obselete, so set cntfrq_el0 if CONFIG_COUNTER_FREQUENCY is valid Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> |
#
90526e9f |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3586cb82 |
|
16-Feb-2020 |
Tomasz Duszynski <tduszyns@gmail.com> |
Revert "sunxi: psci: avoid error address-of-packed-member" Using memcpy() for some MMIO access is generally frowned upon and might break things on some platforms. Allwinner H3, which fails to boot, being an example here. Moreover, fields being accessed are naturally aligned and warnings produced by GCC have been quiesced for some time already by: 53dc8ae ("gcc-9: silence 'address-of-packed-member' warning") That said, it should be okay to revert this commit. This reverts commit 9bd34a69a453d409792e08c00953ce8862145e65. Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Tomasz Duszynski <tduszyns@gmail.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9bd34a69 |
|
09-Nov-2019 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
sunxi: psci: avoid error address-of-packed-member Compiling with GCC 9.2.1 leads to build errors: arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’: arch/arm/cpu/armv7/sunxi/psci.c:144:21: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~~~~ arch/arm/cpu/armv7/sunxi/psci.c:144:46: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~ Use memcpy() and void* pointers to resolve the problem caused by packing the struct sunxi_cpucfg_reg. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
e21e3ffd |
|
22-Jul-2019 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
psci: Fix warnings when compiling with W=1 This patch solves the following warnings: arch/arm/mach-stm32mp/psci.c: warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes] Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
9622c7e6 |
|
16-Apr-2018 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
sunxi: psci: save context id in cpu_on command Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
34748272 |
|
07-Jun-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: psci: Move entry address setting to separate function Currently we set the entry address in the psci_cpu_on function. However R40 has a different register for this. This resulted in an #ifdef / #else block in psci_cpu_on, which we avoided having in the first place. Move this part into a separate function, defined differently for the R40 as opposed to the other single cluster platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
0918648d |
|
28-Feb-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI support for R40 The R40's CPU controls are a combination of sun6i and sun7i. All controls are in the CPUCFG block, and it seems the R40 does not have a PRCM block. The core reset, power gating and clamp controls are grouped like sun6i. Last, the R40 does not have a secure SRAM block. This patch adds a PSCI implementation for CPU bring-up and hotplug for the R40. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e4916e85 |
|
15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the frequency of the ARM Generic Timer (aka. arch timer). ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same purpose. It seems useful to unify them. Since there are less occurences of the latter version, lets convert all users over to COUNTER_FREQUENCY. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
a78cd861 |
|
01-Aug-2016 |
Tom Rini <trini@konsulko.com> |
ARM: Rework and correct barrier definitions As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for some cases incomplete isb definitions. This was causing a failure to boot of the Linux kernel. In order to solve this problem as well as cover any corner cases that we may also have had a number of changes are made in order to consolidate things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb definitions. This however introduces another complexity. Due to needing to build SPL for 32bit tegra with -march=armv4 we need to borrow the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add a comment about it. Now that we can always know what the target CPU is capable off we can get always do the correct thing for the barrier. The final part of this is that need to be consistent everywhere and call isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the function names in others. Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Sandy Patterson <apatterson@sightlogix.com> Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reported-by: Sandy Patterson <apatterson@sightlogix.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6e6622de |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Switch to per-CPU target PC storage in secure data section Now that we have a secure data section and space to store per-CPU target PC address, switch to it instead of storing the target PC on the stack. Also save clobbered r4-r7 registers on the stack and restore them on return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
afc1f65f |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: Move __secure definition to common asm/secure.h sunxi and i.mx7 both define the __secure modifier to put functions in the secure section. Move this to a common place. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
28f90357 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Remove unused psci_text_end symbol psci_text_end was used to calculate the PSCI stack address following the secure monitor text. Now that we have an explicit secure stack section, this is no longer used. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
94a389b2 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Move remaining PSCI assembly code to C This patch finishes the rewrite of sunxi specific PSCI parts into C code. The assembly-only stack setup code has been factored out into a common function for ARMv7. The GIC setup code can be renamed as psci_arch_init. And we can use an empty stub function for psci_text_end. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
4257f5f8 |
|
06-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI implementation in C To make the PSCI backend more maintainable and easier to port to newer SoCs, rewrite the current PSCI implementation in C. Some inline assembly bits are required to access coprocessor registers. PSCI stack setup is the only part left completely in assembly. In theory this part could be split out of psci_arch_init into a separate common function, and psci_arch_init could be completely in C. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
47ca7b57 |
|
13-May-2022 |
qianfan Zhao <qianfanguijin@163.com> |
sunxi: psci: Fix sunxi_power_switch on sun8i-r40 platform linux system will die if we offline one of the cpu on R40 based board: eg: echo 0 > /sys/devices/system/cpu/cpu3/online The reason is that the R40 version of sunxi_cpu_set_power always passes 0 for the CPU number, so we turn off CPU0, regardless of what CPU the CPU_OFF request came for. Fix this by passing the proper CPU number, as there are proper power clamp registers for every of the four cores. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
151a0300 |
|
13-Apr-2022 |
Peng Fan <peng.fan@nxp.com> |
arm: set cntfrq_el0 if CONFIG_COUNTER_FREQUENCY is valid Since COUNTER_FREQUENCY is obselete, so set cntfrq_el0 if CONFIG_COUNTER_FREQUENCY is valid Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> |
#
90526e9f |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3586cb82 |
|
16-Feb-2020 |
Tomasz Duszynski <tduszyns@gmail.com> |
Revert "sunxi: psci: avoid error address-of-packed-member" Using memcpy() for some MMIO access is generally frowned upon and might break things on some platforms. Allwinner H3, which fails to boot, being an example here. Moreover, fields being accessed are naturally aligned and warnings produced by GCC have been quiesced for some time already by: 53dc8ae ("gcc-9: silence 'address-of-packed-member' warning") That said, it should be okay to revert this commit. This reverts commit 9bd34a69a453d409792e08c00953ce8862145e65. Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Tomasz Duszynski <tduszyns@gmail.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9bd34a69 |
|
09-Nov-2019 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
sunxi: psci: avoid error address-of-packed-member Compiling with GCC 9.2.1 leads to build errors: arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’: arch/arm/cpu/armv7/sunxi/psci.c:144:21: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~~~~ arch/arm/cpu/armv7/sunxi/psci.c:144:46: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~ Use memcpy() and void* pointers to resolve the problem caused by packing the struct sunxi_cpucfg_reg. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
e21e3ffd |
|
22-Jul-2019 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
psci: Fix warnings when compiling with W=1 This patch solves the following warnings: arch/arm/mach-stm32mp/psci.c: warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes] Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
9622c7e6 |
|
16-Apr-2018 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
sunxi: psci: save context id in cpu_on command Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
34748272 |
|
07-Jun-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: psci: Move entry address setting to separate function Currently we set the entry address in the psci_cpu_on function. However R40 has a different register for this. This resulted in an #ifdef / #else block in psci_cpu_on, which we avoided having in the first place. Move this part into a separate function, defined differently for the R40 as opposed to the other single cluster platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
0918648d |
|
28-Feb-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI support for R40 The R40's CPU controls are a combination of sun6i and sun7i. All controls are in the CPUCFG block, and it seems the R40 does not have a PRCM block. The core reset, power gating and clamp controls are grouped like sun6i. Last, the R40 does not have a secure SRAM block. This patch adds a PSCI implementation for CPU bring-up and hotplug for the R40. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e4916e85 |
|
15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the frequency of the ARM Generic Timer (aka. arch timer). ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same purpose. It seems useful to unify them. Since there are less occurences of the latter version, lets convert all users over to COUNTER_FREQUENCY. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
a78cd861 |
|
01-Aug-2016 |
Tom Rini <trini@konsulko.com> |
ARM: Rework and correct barrier definitions As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for some cases incomplete isb definitions. This was causing a failure to boot of the Linux kernel. In order to solve this problem as well as cover any corner cases that we may also have had a number of changes are made in order to consolidate things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb definitions. This however introduces another complexity. Due to needing to build SPL for 32bit tegra with -march=armv4 we need to borrow the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add a comment about it. Now that we can always know what the target CPU is capable off we can get always do the correct thing for the barrier. The final part of this is that need to be consistent everywhere and call isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the function names in others. Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Sandy Patterson <apatterson@sightlogix.com> Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reported-by: Sandy Patterson <apatterson@sightlogix.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6e6622de |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Switch to per-CPU target PC storage in secure data section Now that we have a secure data section and space to store per-CPU target PC address, switch to it instead of storing the target PC on the stack. Also save clobbered r4-r7 registers on the stack and restore them on return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
afc1f65f |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: Move __secure definition to common asm/secure.h sunxi and i.mx7 both define the __secure modifier to put functions in the secure section. Move this to a common place. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
28f90357 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Remove unused psci_text_end symbol psci_text_end was used to calculate the PSCI stack address following the secure monitor text. Now that we have an explicit secure stack section, this is no longer used. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
94a389b2 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Move remaining PSCI assembly code to C This patch finishes the rewrite of sunxi specific PSCI parts into C code. The assembly-only stack setup code has been factored out into a common function for ARMv7. The GIC setup code can be renamed as psci_arch_init. And we can use an empty stub function for psci_text_end. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
4257f5f8 |
|
06-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI implementation in C To make the PSCI backend more maintainable and easier to port to newer SoCs, rewrite the current PSCI implementation in C. Some inline assembly bits are required to access coprocessor registers. PSCI stack setup is the only part left completely in assembly. In theory this part could be split out of psci_arch_init into a separate common function, and psci_arch_init could be completely in C. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
151a0300 |
|
13-Apr-2022 |
Peng Fan <peng.fan@nxp.com> |
arm: set cntfrq_el0 if CONFIG_COUNTER_FREQUENCY is valid Since COUNTER_FREQUENCY is obselete, so set cntfrq_el0 if CONFIG_COUNTER_FREQUENCY is valid Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> |
#
90526e9f |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3586cb82 |
|
16-Feb-2020 |
Tomasz Duszynski <tduszyns@gmail.com> |
Revert "sunxi: psci: avoid error address-of-packed-member" Using memcpy() for some MMIO access is generally frowned upon and might break things on some platforms. Allwinner H3, which fails to boot, being an example here. Moreover, fields being accessed are naturally aligned and warnings produced by GCC have been quiesced for some time already by: 53dc8ae ("gcc-9: silence 'address-of-packed-member' warning") That said, it should be okay to revert this commit. This reverts commit 9bd34a69a453d409792e08c00953ce8862145e65. Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Tomasz Duszynski <tduszyns@gmail.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9bd34a69 |
|
09-Nov-2019 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
sunxi: psci: avoid error address-of-packed-member Compiling with GCC 9.2.1 leads to build errors: arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’: arch/arm/cpu/armv7/sunxi/psci.c:144:21: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~~~~ arch/arm/cpu/armv7/sunxi/psci.c:144:46: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~ Use memcpy() and void* pointers to resolve the problem caused by packing the struct sunxi_cpucfg_reg. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
e21e3ffd |
|
22-Jul-2019 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
psci: Fix warnings when compiling with W=1 This patch solves the following warnings: arch/arm/mach-stm32mp/psci.c: warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes] Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
9622c7e6 |
|
16-Apr-2018 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
sunxi: psci: save context id in cpu_on command Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
34748272 |
|
07-Jun-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: psci: Move entry address setting to separate function Currently we set the entry address in the psci_cpu_on function. However R40 has a different register for this. This resulted in an #ifdef / #else block in psci_cpu_on, which we avoided having in the first place. Move this part into a separate function, defined differently for the R40 as opposed to the other single cluster platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
0918648d |
|
28-Feb-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI support for R40 The R40's CPU controls are a combination of sun6i and sun7i. All controls are in the CPUCFG block, and it seems the R40 does not have a PRCM block. The core reset, power gating and clamp controls are grouped like sun6i. Last, the R40 does not have a secure SRAM block. This patch adds a PSCI implementation for CPU bring-up and hotplug for the R40. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e4916e85 |
|
15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the frequency of the ARM Generic Timer (aka. arch timer). ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same purpose. It seems useful to unify them. Since there are less occurences of the latter version, lets convert all users over to COUNTER_FREQUENCY. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
a78cd861 |
|
01-Aug-2016 |
Tom Rini <trini@konsulko.com> |
ARM: Rework and correct barrier definitions As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for some cases incomplete isb definitions. This was causing a failure to boot of the Linux kernel. In order to solve this problem as well as cover any corner cases that we may also have had a number of changes are made in order to consolidate things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb definitions. This however introduces another complexity. Due to needing to build SPL for 32bit tegra with -march=armv4 we need to borrow the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add a comment about it. Now that we can always know what the target CPU is capable off we can get always do the correct thing for the barrier. The final part of this is that need to be consistent everywhere and call isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the function names in others. Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Sandy Patterson <apatterson@sightlogix.com> Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reported-by: Sandy Patterson <apatterson@sightlogix.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6e6622de |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Switch to per-CPU target PC storage in secure data section Now that we have a secure data section and space to store per-CPU target PC address, switch to it instead of storing the target PC on the stack. Also save clobbered r4-r7 registers on the stack and restore them on return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
afc1f65f |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: Move __secure definition to common asm/secure.h sunxi and i.mx7 both define the __secure modifier to put functions in the secure section. Move this to a common place. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
28f90357 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Remove unused psci_text_end symbol psci_text_end was used to calculate the PSCI stack address following the secure monitor text. Now that we have an explicit secure stack section, this is no longer used. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
94a389b2 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Move remaining PSCI assembly code to C This patch finishes the rewrite of sunxi specific PSCI parts into C code. The assembly-only stack setup code has been factored out into a common function for ARMv7. The GIC setup code can be renamed as psci_arch_init. And we can use an empty stub function for psci_text_end. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
4257f5f8 |
|
06-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI implementation in C To make the PSCI backend more maintainable and easier to port to newer SoCs, rewrite the current PSCI implementation in C. Some inline assembly bits are required to access coprocessor registers. PSCI stack setup is the only part left completely in assembly. In theory this part could be split out of psci_arch_init into a separate common function, and psci_arch_init could be completely in C. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
90526e9f |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3586cb82 |
|
16-Feb-2020 |
Tomasz Duszynski <tduszyns@gmail.com> |
Revert "sunxi: psci: avoid error address-of-packed-member" Using memcpy() for some MMIO access is generally frowned upon and might break things on some platforms. Allwinner H3, which fails to boot, being an example here. Moreover, fields being accessed are naturally aligned and warnings produced by GCC have been quiesced for some time already by: 53dc8ae ("gcc-9: silence 'address-of-packed-member' warning") That said, it should be okay to revert this commit. This reverts commit 9bd34a69a453d409792e08c00953ce8862145e65. Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Tomasz Duszynski <tduszyns@gmail.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9bd34a69 |
|
09-Nov-2019 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
sunxi: psci: avoid error address-of-packed-member Compiling with GCC 9.2.1 leads to build errors: arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’: arch/arm/cpu/armv7/sunxi/psci.c:144:21: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~~~~ arch/arm/cpu/armv7/sunxi/psci.c:144:46: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~ Use memcpy() and void* pointers to resolve the problem caused by packing the struct sunxi_cpucfg_reg. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
e21e3ffd |
|
22-Jul-2019 |
Patrick Delaunay <patrick.delaunay@st.com> |
psci: Fix warnings when compiling with W=1 This patch solves the following warnings: arch/arm/mach-stm32mp/psci.c: warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes] Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
9622c7e6 |
|
16-Apr-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
sunxi: psci: save context id in cpu_on command Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
34748272 |
|
07-Jun-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: psci: Move entry address setting to separate function Currently we set the entry address in the psci_cpu_on function. However R40 has a different register for this. This resulted in an #ifdef / #else block in psci_cpu_on, which we avoided having in the first place. Move this part into a separate function, defined differently for the R40 as opposed to the other single cluster platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
0918648d |
|
28-Feb-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI support for R40 The R40's CPU controls are a combination of sun6i and sun7i. All controls are in the CPUCFG block, and it seems the R40 does not have a PRCM block. The core reset, power gating and clamp controls are grouped like sun6i. Last, the R40 does not have a secure SRAM block. This patch adds a PSCI implementation for CPU bring-up and hotplug for the R40. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e4916e85 |
|
15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the frequency of the ARM Generic Timer (aka. arch timer). ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same purpose. It seems useful to unify them. Since there are less occurences of the latter version, lets convert all users over to COUNTER_FREQUENCY. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
a78cd861 |
|
01-Aug-2016 |
Tom Rini <trini@konsulko.com> |
ARM: Rework and correct barrier definitions As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for some cases incomplete isb definitions. This was causing a failure to boot of the Linux kernel. In order to solve this problem as well as cover any corner cases that we may also have had a number of changes are made in order to consolidate things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb definitions. This however introduces another complexity. Due to needing to build SPL for 32bit tegra with -march=armv4 we need to borrow the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add a comment about it. Now that we can always know what the target CPU is capable off we can get always do the correct thing for the barrier. The final part of this is that need to be consistent everywhere and call isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the function names in others. Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Sandy Patterson <apatterson@sightlogix.com> Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reported-by: Sandy Patterson <apatterson@sightlogix.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6e6622de |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Switch to per-CPU target PC storage in secure data section Now that we have a secure data section and space to store per-CPU target PC address, switch to it instead of storing the target PC on the stack. Also save clobbered r4-r7 registers on the stack and restore them on return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
afc1f65f |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: Move __secure definition to common asm/secure.h sunxi and i.mx7 both define the __secure modifier to put functions in the secure section. Move this to a common place. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
28f90357 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Remove unused psci_text_end symbol psci_text_end was used to calculate the PSCI stack address following the secure monitor text. Now that we have an explicit secure stack section, this is no longer used. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
94a389b2 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Move remaining PSCI assembly code to C This patch finishes the rewrite of sunxi specific PSCI parts into C code. The assembly-only stack setup code has been factored out into a common function for ARMv7. The GIC setup code can be renamed as psci_arch_init. And we can use an empty stub function for psci_text_end. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
4257f5f8 |
|
06-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI implementation in C To make the PSCI backend more maintainable and easier to port to newer SoCs, rewrite the current PSCI implementation in C. Some inline assembly bits are required to access coprocessor registers. PSCI stack setup is the only part left completely in assembly. In theory this part could be split out of psci_arch_init into a separate common function, and psci_arch_init could be completely in C. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
3586cb82 |
|
16-Feb-2020 |
Tomasz Duszynski <tduszyns@gmail.com> |
Revert "sunxi: psci: avoid error address-of-packed-member" Using memcpy() for some MMIO access is generally frowned upon and might break things on some platforms. Allwinner H3, which fails to boot, being an example here. Moreover, fields being accessed are naturally aligned and warnings produced by GCC have been quiesced for some time already by: 53dc8ae ("gcc-9: silence 'address-of-packed-member' warning") That said, it should be okay to revert this commit. This reverts commit 9bd34a69a453d409792e08c00953ce8862145e65. Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Tomasz Duszynski <tduszyns@gmail.com> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
9bd34a69 |
|
09-Nov-2019 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
sunxi: psci: avoid error address-of-packed-member Compiling with GCC 9.2.1 leads to build errors: arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’: arch/arm/cpu/armv7/sunxi/psci.c:144:21: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~~~~ arch/arm/cpu/armv7/sunxi/psci.c:144:46: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~ Use memcpy() and void* pointers to resolve the problem caused by packing the struct sunxi_cpucfg_reg. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
e21e3ffd |
|
22-Jul-2019 |
Patrick Delaunay <patrick.delaunay@st.com> |
psci: Fix warnings when compiling with W=1 This patch solves the following warnings: arch/arm/mach-stm32mp/psci.c: warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes] Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
9622c7e6 |
|
16-Apr-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
sunxi: psci: save context id in cpu_on command Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
34748272 |
|
07-Jun-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: psci: Move entry address setting to separate function Currently we set the entry address in the psci_cpu_on function. However R40 has a different register for this. This resulted in an #ifdef / #else block in psci_cpu_on, which we avoided having in the first place. Move this part into a separate function, defined differently for the R40 as opposed to the other single cluster platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
0918648d |
|
28-Feb-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI support for R40 The R40's CPU controls are a combination of sun6i and sun7i. All controls are in the CPUCFG block, and it seems the R40 does not have a PRCM block. The core reset, power gating and clamp controls are grouped like sun6i. Last, the R40 does not have a secure SRAM block. This patch adds a PSCI implementation for CPU bring-up and hotplug for the R40. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e4916e85 |
|
15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the frequency of the ARM Generic Timer (aka. arch timer). ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same purpose. It seems useful to unify them. Since there are less occurences of the latter version, lets convert all users over to COUNTER_FREQUENCY. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
a78cd861 |
|
01-Aug-2016 |
Tom Rini <trini@konsulko.com> |
ARM: Rework and correct barrier definitions As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for some cases incomplete isb definitions. This was causing a failure to boot of the Linux kernel. In order to solve this problem as well as cover any corner cases that we may also have had a number of changes are made in order to consolidate things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb definitions. This however introduces another complexity. Due to needing to build SPL for 32bit tegra with -march=armv4 we need to borrow the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add a comment about it. Now that we can always know what the target CPU is capable off we can get always do the correct thing for the barrier. The final part of this is that need to be consistent everywhere and call isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the function names in others. Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Sandy Patterson <apatterson@sightlogix.com> Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reported-by: Sandy Patterson <apatterson@sightlogix.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6e6622de |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Switch to per-CPU target PC storage in secure data section Now that we have a secure data section and space to store per-CPU target PC address, switch to it instead of storing the target PC on the stack. Also save clobbered r4-r7 registers on the stack and restore them on return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
afc1f65f |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: Move __secure definition to common asm/secure.h sunxi and i.mx7 both define the __secure modifier to put functions in the secure section. Move this to a common place. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
28f90357 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Remove unused psci_text_end symbol psci_text_end was used to calculate the PSCI stack address following the secure monitor text. Now that we have an explicit secure stack section, this is no longer used. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
94a389b2 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Move remaining PSCI assembly code to C This patch finishes the rewrite of sunxi specific PSCI parts into C code. The assembly-only stack setup code has been factored out into a common function for ARMv7. The GIC setup code can be renamed as psci_arch_init. And we can use an empty stub function for psci_text_end. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
4257f5f8 |
|
06-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI implementation in C To make the PSCI backend more maintainable and easier to port to newer SoCs, rewrite the current PSCI implementation in C. Some inline assembly bits are required to access coprocessor registers. PSCI stack setup is the only part left completely in assembly. In theory this part could be split out of psci_arch_init into a separate common function, and psci_arch_init could be completely in C. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
9bd34a69 |
|
09-Nov-2019 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
sunxi: psci: avoid error address-of-packed-member Compiling with GCC 9.2.1 leads to build errors: arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’: arch/arm/cpu/armv7/sunxi/psci.c:144:21: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~~~~ arch/arm/cpu/armv7/sunxi/psci.c:144:46: error: taking address of packed member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff, | ^~~~~~~~~~~~~~~~~~~~ Use memcpy() and void* pointers to resolve the problem caused by packing the struct sunxi_cpucfg_reg. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Jagan Teki <jagan@amarulasolutions.com> |
#
e21e3ffd |
|
22-Jul-2019 |
Patrick Delaunay <patrick.delaunay@st.com> |
psci: Fix warnings when compiling with W=1 This patch solves the following warnings: arch/arm/mach-stm32mp/psci.c: warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes] Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
9622c7e6 |
|
16-Apr-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
sunxi: psci: save context id in cpu_on command Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
34748272 |
|
07-Jun-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: psci: Move entry address setting to separate function Currently we set the entry address in the psci_cpu_on function. However R40 has a different register for this. This resulted in an #ifdef / #else block in psci_cpu_on, which we avoided having in the first place. Move this part into a separate function, defined differently for the R40 as opposed to the other single cluster platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
0918648d |
|
28-Feb-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI support for R40 The R40's CPU controls are a combination of sun6i and sun7i. All controls are in the CPUCFG block, and it seems the R40 does not have a PRCM block. The core reset, power gating and clamp controls are grouped like sun6i. Last, the R40 does not have a secure SRAM block. This patch adds a PSCI implementation for CPU bring-up and hotplug for the R40. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e4916e85 |
|
15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the frequency of the ARM Generic Timer (aka. arch timer). ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same purpose. It seems useful to unify them. Since there are less occurences of the latter version, lets convert all users over to COUNTER_FREQUENCY. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
a78cd861 |
|
01-Aug-2016 |
Tom Rini <trini@konsulko.com> |
ARM: Rework and correct barrier definitions As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for some cases incomplete isb definitions. This was causing a failure to boot of the Linux kernel. In order to solve this problem as well as cover any corner cases that we may also have had a number of changes are made in order to consolidate things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb definitions. This however introduces another complexity. Due to needing to build SPL for 32bit tegra with -march=armv4 we need to borrow the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add a comment about it. Now that we can always know what the target CPU is capable off we can get always do the correct thing for the barrier. The final part of this is that need to be consistent everywhere and call isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the function names in others. Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Sandy Patterson <apatterson@sightlogix.com> Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reported-by: Sandy Patterson <apatterson@sightlogix.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6e6622de |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Switch to per-CPU target PC storage in secure data section Now that we have a secure data section and space to store per-CPU target PC address, switch to it instead of storing the target PC on the stack. Also save clobbered r4-r7 registers on the stack and restore them on return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
afc1f65f |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: Move __secure definition to common asm/secure.h sunxi and i.mx7 both define the __secure modifier to put functions in the secure section. Move this to a common place. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
28f90357 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Remove unused psci_text_end symbol psci_text_end was used to calculate the PSCI stack address following the secure monitor text. Now that we have an explicit secure stack section, this is no longer used. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
94a389b2 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Move remaining PSCI assembly code to C This patch finishes the rewrite of sunxi specific PSCI parts into C code. The assembly-only stack setup code has been factored out into a common function for ARMv7. The GIC setup code can be renamed as psci_arch_init. And we can use an empty stub function for psci_text_end. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
4257f5f8 |
|
06-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI implementation in C To make the PSCI backend more maintainable and easier to port to newer SoCs, rewrite the current PSCI implementation in C. Some inline assembly bits are required to access coprocessor registers. PSCI stack setup is the only part left completely in assembly. In theory this part could be split out of psci_arch_init into a separate common function, and psci_arch_init could be completely in C. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
e21e3ffd |
|
22-Jul-2019 |
Patrick Delaunay <patrick.delaunay@st.com> |
psci: Fix warnings when compiling with W=1 This patch solves the following warnings: arch/arm/mach-stm32mp/psci.c: warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes] Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
9622c7e6 |
|
16-Apr-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
sunxi: psci: save context id in cpu_on command Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
34748272 |
|
07-Jun-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: psci: Move entry address setting to separate function Currently we set the entry address in the psci_cpu_on function. However R40 has a different register for this. This resulted in an #ifdef / #else block in psci_cpu_on, which we avoided having in the first place. Move this part into a separate function, defined differently for the R40 as opposed to the other single cluster platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> |
#
0918648d |
|
28-Feb-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI support for R40 The R40's CPU controls are a combination of sun6i and sun7i. All controls are in the CPUCFG block, and it seems the R40 does not have a PRCM block. The core reset, power gating and clamp controls are grouped like sun6i. Last, the R40 does not have a secure SRAM block. This patch adds a PSCI implementation for CPU bring-up and hotplug for the R40. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
#
e4916e85 |
|
15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the frequency of the ARM Generic Timer (aka. arch timer). ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same purpose. It seems useful to unify them. Since there are less occurences of the latter version, lets convert all users over to COUNTER_FREQUENCY. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
a78cd861 |
|
01-Aug-2016 |
Tom Rini <trini@konsulko.com> |
ARM: Rework and correct barrier definitions As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for some cases incomplete isb definitions. This was causing a failure to boot of the Linux kernel. In order to solve this problem as well as cover any corner cases that we may also have had a number of changes are made in order to consolidate things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb definitions. This however introduces another complexity. Due to needing to build SPL for 32bit tegra with -march=armv4 we need to borrow the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add a comment about it. Now that we can always know what the target CPU is capable off we can get always do the correct thing for the barrier. The final part of this is that need to be consistent everywhere and call isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the function names in others. Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Sandy Patterson <apatterson@sightlogix.com> Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reported-by: Sandy Patterson <apatterson@sightlogix.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6e6622de |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Switch to per-CPU target PC storage in secure data section Now that we have a secure data section and space to store per-CPU target PC address, switch to it instead of storing the target PC on the stack. Also save clobbered r4-r7 registers on the stack and restore them on return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
afc1f65f |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: Move __secure definition to common asm/secure.h sunxi and i.mx7 both define the __secure modifier to put functions in the secure section. Move this to a common place. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
#
28f90357 |
|
18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Remove unused psci_text_end symbol psci_text_end was used to calculate the PSCI stack address following the secure monitor text. Now that we have an explicit secure stack section, this is no longer used. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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94a389b2 |
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18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Move remaining PSCI assembly code to C This patch finishes the rewrite of sunxi specific PSCI parts into C code. The assembly-only stack setup code has been factored out into a common function for ARMv7. The GIC setup code can be renamed as psci_arch_init. And we can use an empty stub function for psci_text_end. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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4257f5f8 |
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06-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI implementation in C To make the PSCI backend more maintainable and easier to port to newer SoCs, rewrite the current PSCI implementation in C. Some inline assembly bits are required to access coprocessor registers. PSCI stack setup is the only part left completely in assembly. In theory this part could be split out of psci_arch_init into a separate common function, and psci_arch_init could be completely in C. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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9622c7e6 |
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16-Apr-2018 |
Patrick Delaunay <patrick.delaunay@st.com> |
sunxi: psci: save context id in cpu_on command Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
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34748272 |
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07-Jun-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: psci: Move entry address setting to separate function Currently we set the entry address in the psci_cpu_on function. However R40 has a different register for this. This resulted in an #ifdef / #else block in psci_cpu_on, which we avoided having in the first place. Move this part into a separate function, defined differently for the R40 as opposed to the other single cluster platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
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0918648d |
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28-Feb-2017 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI support for R40 The R40's CPU controls are a combination of sun6i and sun7i. All controls are in the CPUCFG block, and it seems the R40 does not have a PRCM block. The core reset, power gating and clamp controls are grouped like sun6i. Last, the R40 does not have a secure SRAM block. This patch adds a PSCI implementation for CPU bring-up and hotplug for the R40. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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e4916e85 |
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15-Feb-2017 |
Andre Przywara <andre.przywara@arm.com> |
ARM: rename CONFIG_TIMER_CLK_FREQ to COUNTER_FREQUENCY Many ARMv8 boards define a constant COUNTER_FREQUENCY to specify the frequency of the ARM Generic Timer (aka. arch timer). ARMv7 boards traditionally used CONFIG_TIMER_CLK_FREQ for the same purpose. It seems useful to unify them. Since there are less occurences of the latter version, lets convert all users over to COUNTER_FREQUENCY. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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a78cd861 |
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01-Aug-2016 |
Tom Rini <trini@konsulko.com> |
ARM: Rework and correct barrier definitions As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for some cases incomplete isb definitions. This was causing a failure to boot of the Linux kernel. In order to solve this problem as well as cover any corner cases that we may also have had a number of changes are made in order to consolidate things. First, <asm/barriers.h> now becomes the source of isb/dsb/dmb definitions. This however introduces another complexity. Due to needing to build SPL for 32bit tegra with -march=armv4 we need to borrow the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete form. Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add a comment about it. Now that we can always know what the target CPU is capable off we can get always do the correct thing for the barrier. The final part of this is that need to be consistent everywhere and call isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the function names in others. Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Sandy Patterson <apatterson@sightlogix.com> Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reported-by: Sandy Patterson <apatterson@sightlogix.com> Signed-off-by: Tom Rini <trini@konsulko.com>
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6e6622de |
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18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Switch to per-CPU target PC storage in secure data section Now that we have a secure data section and space to store per-CPU target PC address, switch to it instead of storing the target PC on the stack. Also save clobbered r4-r7 registers on the stack and restore them on return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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afc1f65f |
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18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: Move __secure definition to common asm/secure.h sunxi and i.mx7 both define the __secure modifier to put functions in the secure section. Move this to a common place. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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28f90357 |
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18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
ARM: PSCI: Remove unused psci_text_end symbol psci_text_end was used to calculate the PSCI stack address following the secure monitor text. Now that we have an explicit secure stack section, this is no longer used. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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94a389b2 |
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18-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Move remaining PSCI assembly code to C This patch finishes the rewrite of sunxi specific PSCI parts into C code. The assembly-only stack setup code has been factored out into a common function for ARMv7. The GIC setup code can be renamed as psci_arch_init. And we can use an empty stub function for psci_text_end. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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4257f5f8 |
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06-Jun-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add PSCI implementation in C To make the PSCI backend more maintainable and easier to port to newer SoCs, rewrite the current PSCI implementation in C. Some inline assembly bits are required to access coprocessor registers. PSCI stack setup is the only part left completely in assembly. In theory this part could be split out of psci_arch_init into a separate common function, and psci_arch_init could be completely in C. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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