1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2011
4 * Texas Instruments, <www.ti.com>
5 *
6 * Author :
7 *     Tom Rini <trini@ti.com>
8 *
9 * Initial Code from:
10 *     Richard Woodruff <r-woodruff2@ti.com>
11 *     Jian Zhang <jzhang@ti.com>
12 */
13
14#include <common.h>
15#include <jffs2/load_kernel.h>
16#include <linux/mtd/rawnand.h>
17#include <linux/mtd/omap_gpmc.h>
18#include <asm/io.h>
19#include <asm/arch/sys_proto.h>
20#include <asm/arch/mem.h>
21
22/*
23 * Many boards will want to know the results of the NAND_CMD_READID command
24 * in order to decide what to do about DDR initialization.  This function
25 * allows us to do that very early and to pass those results back to the
26 * board so it can make whatever decisions need to be made.
27 */
28int identify_nand_chip(int *mfr, int *id)
29{
30	int loops = 1000;
31
32	/* Make sure that we have setup GPMC for NAND correctly. */
33	set_gpmc_cs0(MTD_DEV_TYPE_NAND);
34
35	sdelay(2000);
36
37	/* Issue a RESET and then READID */
38	writeb(NAND_CMD_RESET, &gpmc_cfg->cs[0].nand_cmd);
39	writeb(NAND_CMD_STATUS, &gpmc_cfg->cs[0].nand_cmd);
40	while ((readl(&gpmc_cfg->cs[0].nand_dat) & NAND_STATUS_READY)
41	                                        != NAND_STATUS_READY) {
42		sdelay(100);
43		if (--loops == 0)
44			return 1;
45	}
46	writeb(NAND_CMD_READID, &gpmc_cfg->cs[0].nand_cmd);
47
48	/* Set the address to read to 0x0 */
49	writeb(0x0, &gpmc_cfg->cs[0].nand_adr);
50
51	/* Read off the manufacturer and device id. */
52	*mfr = readb(&gpmc_cfg->cs[0].nand_dat);
53	*id = readb(&gpmc_cfg->cs[0].nand_dat);
54
55	return 0;
56}
57