Searched refs:wa (Results 1 - 25 of 34) sorted by relevance

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/linux-master/drivers/crypto/ccp/
H A Dccp-ops.c64 static void ccp_sg_free(struct ccp_sg_workarea *wa) argument
66 if (wa->dma_count)
67 dma_unmap_sg(wa->dma_dev, wa->dma_sg_head, wa->nents, wa->dma_dir);
69 wa->dma_count = 0;
72 static int ccp_init_sg_workarea(struct ccp_sg_workarea *wa, struct device *dev, argument
76 memset(wa, 0, sizeof(*wa));
106 ccp_update_sg_workarea(struct ccp_sg_workarea *wa, unsigned int len) argument
135 ccp_dm_free(struct ccp_dm_workarea *wa) argument
152 ccp_init_dm_workarea(struct ccp_dm_workarea *wa, struct ccp_cmd_queue *cmd_q, unsigned int len, enum dma_data_direction dir) argument
195 ccp_set_dm_area(struct ccp_dm_workarea *wa, unsigned int wa_offset, struct scatterlist *sg, unsigned int sg_offset, unsigned int len) argument
209 ccp_get_dm_area(struct ccp_dm_workarea *wa, unsigned int wa_offset, struct scatterlist *sg, unsigned int sg_offset, unsigned int len) argument
219 ccp_reverse_set_dm_area(struct ccp_dm_workarea *wa, unsigned int wa_offset, struct scatterlist *sg, unsigned int sg_offset, unsigned int len) argument
244 ccp_reverse_get_dm_area(struct ccp_dm_workarea *wa, unsigned int wa_offset, struct scatterlist *sg, unsigned int sg_offset, unsigned int len) argument
429 ccp_copy_to_from_sb(struct ccp_cmd_queue *cmd_q, struct ccp_dm_workarea *wa, u32 jobid, u32 sb, u32 byte_swap, bool from) argument
461 ccp_copy_to_sb(struct ccp_cmd_queue *cmd_q, struct ccp_dm_workarea *wa, u32 jobid, u32 sb, u32 byte_swap) argument
468 ccp_copy_from_sb(struct ccp_cmd_queue *cmd_q, struct ccp_dm_workarea *wa, u32 jobid, u32 sb, u32 byte_swap) argument
[all...]
/linux-master/drivers/gpu/drm/i915/gt/
H A Dintel_workarounds.c133 struct i915_wa *wa; local
136 for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
138 wa->reg,
145 static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa) argument
147 unsigned int addr = i915_mmio_reg_offset(wa->reg);
158 list = kmalloc_array(ALIGN(wal->count + 1, grow), sizeof(*wa),
166 memcpy(list, wal->list, sizeof(*wa) * wal->count);
183 if ((wa->clr | wa_->clr) && !(wa
218 struct i915_wa wa = { local
232 struct i915_wa wa = { local
973 struct i915_wa *wa; local
1812 wa_verify(struct intel_gt *gt, const struct i915_wa *wa, u32 cur, const char *name, const char *from) argument
1833 struct i915_wa *wa; local
1885 struct i915_wa *wa; local
1933 struct i915_wa wa = { local
1950 struct i915_wa wa = { local
2268 struct i915_wa *wa; local
3127 const struct i915_wa *wa; local
3163 const struct i915_wa *wa; local
[all...]
H A Dselftest_workarounds.c1041 const struct i915_wa *wa = &engine->whitelist.list[i]; local
1043 if (i915_mmio_reg_offset(wa->reg) &
1047 if (!fn(engine, a[i], b[i], wa->reg))
/linux-master/drivers/net/wireless/broadcom/b43/
H A DMakefile4 b43-$(CONFIG_B43_PHY_G) += phy_g.o tables.o lo.o wa.o
/linux-master/scripts/
H A Dkallsyms.c743 int wa, wb; local
752 wa = (sa->sym[0] == 'w') || (sa->sym[0] == 'W');
754 if (wa != wb)
755 return wa - wb;
758 wa = may_be_linker_script_provide_symbol(sa);
760 if (wa != wb)
761 return wa - wb;
764 wa = strspn(sym_name(sa), "_");
766 if (wa != wb)
767 return wa
[all...]
/linux-master/drivers/clocksource/
H A Darm_arch_timer.c524 bool arch_timer_check_dt_erratum(const struct arch_timer_erratum_workaround *wa, argument
529 return of_property_read_bool(np, wa->id);
533 bool arch_timer_check_local_cap_erratum(const struct arch_timer_erratum_workaround *wa, argument
536 return this_cpu_has_cap((uintptr_t)wa->id);
541 bool arch_timer_check_acpi_oem_erratum(const struct arch_timer_erratum_workaround *wa, argument
545 const struct ate_acpi_oem_info *info = wa->id;
580 void arch_timer_enable_workaround(const struct arch_timer_erratum_workaround *wa, argument
586 __this_cpu_write(timer_unstable_counter_workaround, wa);
589 per_cpu(timer_unstable_counter_workaround, i) = wa;
592 if (wa
613 const struct arch_timer_erratum_workaround *wa, *__wa; local
[all...]
/linux-master/drivers/gpu/drm/i915/
H A Di915_debugfs.c490 const struct i915_wa *wa; local
500 for (wa = wal->list; count--; wa++)
502 i915_mmio_reg_offset(wa->reg),
503 wa->set, wa->clr);
/linux-master/drivers/gpu/drm/amd/display/dc/
H A Ddc_ddc_types.h187 union ddc_wa wa; member in struct:ddc_service
/linux-master/drivers/media/pci/zoran/
H A Dzoran_device.c233 unsigned int wa, we, ha, he; local
239 wa = tvn->wa;
246 video_width > wa || video_height > ha) {
255 X = DIV_ROUND_UP(vid_win_wid * 64, tvn->wa);
258 hcrop1 = 2 * ((tvn->wa - we) / 4);
259 hcrop2 = tvn->wa - we - hcrop1;
269 h_end = h_start + tvn->wa - 1;
H A Dvideocodec.h222 u16 wt, wa, h_start, h_sync_start, ht, ha, v_start; member in struct:tvnorm
H A Dzoran.h51 #define BUZ_MAX_WIDTH (zr->timing->wa)
H A Dzr36060.c574 reg += norm->wa; /* BHend */
608 reg += norm->wa + 8; /* SHend */
/linux-master/drivers/accel/ivpu/
H A Divpu_drv.h83 #define IVPU_WA(wa_name) (vdev->wa.wa_name)
111 struct ivpu_wa_table wa; member in struct:ivpu_device
H A Divpu_fw.c224 vdev->wa.disable_d0i3_msg = true;
228 vdev->wa.disable_d0i3_msg = false;
H A Divpu_hw_37xx.c76 vdev->wa.punit_disabled = false;
77 vdev->wa.clear_runtime_mem = false;
82 vdev->wa.interrupt_clear_with_0 = true;
H A Divpu_hw_40xx.c124 vdev->wa.punit_disabled = ivpu_is_fpga(vdev);
125 vdev->wa.clear_runtime_mem = false;
128 vdev->wa.disable_clock_relinquish = true;
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dce/
H A Ddce_hwseq.c80 if (hws->wa.blnd_crtc_trigger) {
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/
H A Dhw_sequencer_private.h182 struct dce_hwseq_wa wa; member in struct:dce_hwseq
/linux-master/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_ads.c362 struct i915_wa *wa; local
385 for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
386 ret |= GUC_MCR_REG_ADD(gt, regset, wa->mcr_reg, wa->masked_reg);
/linux-master/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_mem_input.c756 if (dce_mi->wa.single_head_rdreq_dmif_limit) {
758 dce_mi->wa.single_head_rdreq_dmif_limit;
786 if (dce_mi->wa.single_head_rdreq_dmif_limit) {
788 dce_mi->wa.single_head_rdreq_dmif_limit;
H A Ddce_mem_input.h429 struct dce_mem_input_wa wa; member in struct:dce_mem_input
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn10/
H A Ddcn10_resource.c865 hws->wa.DEGVIDCN10_253 = true;
866 hws->wa.false_optc_underflow = true;
867 hws->wa.DEGVIDCN10_254 = true;
877 hws->wa.wait_hubpret_read_start_during_mpo_transition = true;
880 hws->wa.wait_hubpret_read_start_during_mpo_transition = false;
/linux-master/arch/arm/mm/
H A Dcache-l2x0-pmu.c374 L220_PLUS_EVENT_ATTR(wa, 0x9),
/linux-master/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_ddc.c155 ddc_service->wa.raw = 0;
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dce110/
H A Ddce110_resource.c570 hws->wa.blnd_crtc_trigger = true;
616 dce_mi->wa.single_head_rdreq_dmif_limit = 3;

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