| /linux-master/drivers/gpu/drm/i915/display/ |
| H A D | intel_cdclk.h | 20 u8 voltage_level; member in struct:intel_cdclk_config
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| H A D | intel_cdclk.c | 548 cdclk_config->voltage_level = (val & DSPFREQGUAR_MASK) >>
551 cdclk_config->voltage_level = (val & DSPFREQGUAR_MASK_CHV) >>
597 u32 val, cmd = cdclk_config->voltage_level;
686 u32 val, cmd = cdclk_config->voltage_level;
779 cdclk_config->voltage_level =
845 cdclk_config->voltage_level);
986 cdclk_config->voltage_level =
1149 cdclk_config->voltage_level);
1220 cdclk_config.voltage_level = skl_calc_voltage_level(cdclk_config.cdclk);
1231 cdclk_config.voltage_level
1475 int voltage_level; local
2339 intel_pcode_notify(struct drm_i915_private *i915, u8 voltage_level, u8 active_pipe_count, u16 cdclk, bool cdclk_update_valid, bool pipe_count_update_valid) argument
2447 unsigned int cdclk = 0; u8 voltage_level, num_active_pipes = 0; local
2492 unsigned int cdclk = 0; u8 voltage_level, num_active_pipes = 0; local
[all...] |
| H A D | intel_pmdemand.c | 294 new_cdclk_state->actual.voltage_level !=
295 old_cdclk_state->actual.voltage_level))
346 new_cdclk_state->actual.voltage_level;
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| /linux-master/drivers/firmware/arm_scmi/ |
| H A D | voltage.c | 60 __le32 voltage_level; member in struct:scmi_msg_cmd_level_set
65 __le32 voltage_level; member in struct:scmi_resp_voltage_level_set_complete
342 cmd->voltage_level = cpu_to_le32(volt_uV);
358 le32_to_cpu(resp->voltage_level));
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| /linux-master/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calcs.c | 499 input->clks_cfg.voltage = v->voltage_level;
560 if (v->voltage_level < 2) {
590 if (v->voltage_level < 3) {
614 v->fabric_and_dram_bandwidth = v->fabric_and_dram_bandwidth_per_state[v->voltage_level];
618 v->dcfclk = v->dcfclk_per_state[v->voltage_level];
629 if (v->voltage_level >= 2) {
633 if (v->voltage_level >= 3)
1062 if (v->voltage_level != 0
1069 if (v->voltage_level == 0 &&
1122 if (v->voltage_level !
[all...] |
| H A D | dcn_calc_auto.c | 1000 v->voltage_level = v->voltage_level_without_immediate_flip;
1004 v->voltage_level = v->voltage_level_with_immediate_flip;
1006 v->dcfclk = v->dcfclk_per_state[v->voltage_level];
1007 v->fabric_and_dram_bandwidth = v->fabric_and_dram_bandwidth_per_state[v->voltage_level];
1009 v->required_dispclk_per_ratio[j] = v->required_dispclk[v->voltage_level][j];
1011 v->dpp_per_plane_per_ratio[j][k] = v->no_of_dpp[v->voltage_level][j][k];
1013 v->dispclk_dppclk_support_per_ratio[j] = v->dispclk_dppclk_support[v->voltage_level][j];
1015 v->max_phyclk = v->phyclk_per_state[v->voltage_level];
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| /linux-master/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | dcn_calcs.h | 211 int voltage_level; member in struct:dcn_bw_internal_vars
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| /linux-master/drivers/gpu/drm/radeon/ |
| H A D | radeon_atombios.c | 3107 void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type) argument
3111 u8 frev, crev, volt_index = voltage_level;
3117 if (voltage_level == 0xff01)
3129 args.v2.usVoltageLevel = cpu_to_le16(voltage_level);
3134 args.v3.usVoltageLevel = cpu_to_le16(voltage_level);
3342 u16 voltage_level, u8 voltage_type,
3358 args.v2.usVoltageLevel = cpu_to_le16(voltage_level);
3366 args.v2.usVoltageLevel = cpu_to_le16(voltage_level);
3341 radeon_atom_get_voltage_gpio_settings(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type, u32 *gpio_value, u32 *gpio_mask) argument
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| H A D | radeon.h | 303 void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type);
305 u16 voltage_level, u8 voltage_type,
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| H A D | ci_dpm.c | 2950 SMU7_Discrete_VoltageLevel voltage_level; local
3017 if (ci_populate_mvdd_value(rdev, 0, &voltage_level))
3021 cpu_to_be32(voltage_level.Voltage * VOLTAGE_SCALE);
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| /linux-master/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | iceland_smumgr.c | 1430 SMU71_Discrete_VoltageLevel voltage_level; local
1504 if (0 == iceland_populate_mvdd_value(hwmgr, 0, &voltage_level))
1506 PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE);
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| H A D | tonga_smumgr.c | 1182 SMIO_Pattern voltage_level; local
1246 if (0 == tonga_populate_mvdd_value(hwmgr, 0, &voltage_level))
1248 PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE);
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| H A D | ci_smumgr.c | 1384 SMU7_Discrete_VoltageLevel voltage_level; local
1458 if (0 == ci_populate_mvdd_value(hwmgr, 0, &voltage_level))
1460 PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE);
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| /linux-master/drivers/gpu/drm/i915/ |
| H A D | i915_reg.h | 5361 #define DISPLAY_TO_PCODE_UPDATE_MASK(cdclk, num_pipes, voltage_level) \
5364 (DISPLAY_TO_PCODE_VOLTAGE(voltage_level)))
|