Searched refs:target_rate (Results 1 - 20 of 20) sorted by relevance

/linux-master/drivers/clk/ti/
H A Dclkt_dpll.c125 * @target_rate: the desired DPLL rate
129 * resulting rate will not be higher than the target_rate, and that
134 * new_rate as close as possible to target_rate (but not greater than
135 * target_rate) given the current (parent_rate, n, prescaled m)
141 unsigned long target_rate,
156 if (*new_rate > target_rate) {
273 * @target_rate: desired DPLL clock rate
283 long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate, argument
302 if (dd->max_rate && target_rate > dd->max_rate)
303 target_rate
140 _dpll_test_mult(int *m, int n, unsigned long *new_rate, unsigned long target_rate, unsigned long parent_rate) argument
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H A Ddpll44xx.c139 * @target_rate: the desired rate of the DPLL
144 * @target_rate. Takes the REGM4XEN bit into consideration, which is
150 unsigned long target_rate,
168 r = omap2_dpll_round_rate(hw, target_rate, NULL);
177 r = omap2_dpll_round_rate(hw, target_rate / OMAP4430_REGM4XEN_MULT,
149 omap4_dpll_regm4xen_round_rate(struct clk_hw *hw, unsigned long target_rate, unsigned long *parent_rate) argument
H A Dclock.h276 long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
300 unsigned long target_rate,
/linux-master/drivers/clk/analogbits/
H A Dwrpll-cln28hpc.c135 * @target_rate: target PLL output clock rate
139 * target output rate @target_rate for the PLL. Along with returning the
149 static u8 __wrpll_calc_divq(u32 target_rate, u64 *vco_rate) argument
159 s = div_u64(MAX_VCO_FREQ, target_rate);
168 *vco_rate = (u64)target_rate << divq;
208 * @target_rate: target PLL output clock rate (post-Q-divider)
226 int wrpll_configure_for_rate(struct wrpll_cfg *c, u32 target_rate, argument
252 if (target_rate == parent_rate) {
260 divq = __wrpll_calc_divq(target_rate, &target_vco_rate);
295 delta = abs(target_rate
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/linux-master/drivers/devfreq/
H A Drk3399_dmc.c50 unsigned long rate, target_rate; member in struct:rk3399_dmcfreq
76 unsigned long target_volt, target_rate; local
89 target_rate = dev_pm_opp_get_freq(opp);
93 if (dmcfreq->rate == target_rate)
115 ddrcon_mhz = target_rate / USEC_PER_SEC / 2;
137 if (target_rate >= dmcfreq->sr_idle_dis_freq)
140 if (target_rate >= dmcfreq->sr_mc_gate_idle_dis_freq)
143 if (target_rate >= dmcfreq->standby_idle_dis_freq)
146 if (target_rate >= dmcfreq->pd_idle_dis_freq)
149 if (target_rate >
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/linux-master/include/linux/clk/
H A Danalogbits-wrpll-cln28hpc.h71 int wrpll_configure_for_rate(struct wrpll_cfg *c, u32 target_rate,
/linux-master/arch/arm/mach-omap2/
H A Dclkt2xxx_dpllcore.c75 static long omap2_dpllcore_round_rate(unsigned long target_rate) argument
90 if (target_rate > high)
93 return target_rate;
95 if (target_rate > low)
/linux-master/drivers/memory/samsung/
H A Dexynos5422-dmc.c283 * @target_rate: requested frequency in KHz
289 unsigned long target_rate)
294 if (dmc->opp[i].freq_hz <= target_rate)
406 * @target_rate: target frequency of the DMC
415 unsigned long target_rate)
420 if (dmc->opp[idx].freq_hz <= target_rate)
500 * @target_rate: new frequency which is chosen to be final
505 unsigned long target_rate)
507 int idx = find_target_freq_idx(dmc, target_rate);
520 * @target_rate
288 find_target_freq_idx(struct exynos5_dmc *dmc, unsigned long target_rate) argument
414 exynos5_dram_change_timings(struct exynos5_dmc *dmc, unsigned long target_rate) argument
504 exynos5_dmc_align_bypass_dram_timings(struct exynos5_dmc *dmc, unsigned long target_rate) argument
529 exynos5_dmc_switch_to_bypass_configuration(struct exynos5_dmc *dmc, unsigned long target_rate, unsigned long target_volt) argument
583 exynos5_dmc_change_freq_and_volt(struct exynos5_dmc *dmc, unsigned long target_rate, unsigned long target_volt) argument
652 exynos5_dmc_get_volt_freq(struct exynos5_dmc *dmc, unsigned long *freq, unsigned long *target_rate, unsigned long *target_volt, u32 flags) argument
686 unsigned long target_rate = 0; local
1258 unsigned long target_rate = 0; local
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/linux-master/drivers/clk/sunxi-ng/
H A Dccu_common.c43 unsigned long target_rate,
48 return abs(current_rate - target_rate) < abs(best_rate - target_rate);
50 return current_rate <= target_rate && current_rate > best_rate;
42 ccu_is_better_rate(struct ccu_common *common, unsigned long target_rate, unsigned long current_rate, unsigned long best_rate) argument
H A Dccu_common.h57 unsigned long target_rate,
/linux-master/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_dp_training_fixed_vs_pe_retimer.c108 uint8_t target_rate = 0x6; local
118 apply_toggle_rate_wa = ((link->vendor_specific_lttpr_link_rate_wa == target_rate) || (link->vendor_specific_lttpr_link_rate_wa == 0));
119 target_rate = get_dpcd_link_rate(&lt_settings->link_settings);
120 toggle_rate = (target_rate == 0x6) ? 0xA : 0x6;
136 &target_rate,
140 link->vendor_specific_lttpr_link_rate_wa = target_rate;
/linux-master/sound/soc/sh/rcar/
H A Dadg.c128 unsigned int target_rate,
157 diff = abs(target_rate - sel_rate[sel] / div);
195 unsigned int target_rate; local
205 target_rate = 0;
209 target_rate = out_rate;
212 target_rate = in_rate;
216 if (target_rate)
218 target_rate,
126 __rsnd_adg_get_timesel_ratio(struct rsnd_priv *priv, struct rsnd_dai_stream *io, unsigned int target_rate, unsigned int *target_val, unsigned int *target_en) argument
/linux-master/drivers/clk/
H A Dclk-plldig.c127 unsigned long target_rate)
131 div = DIV_ROUND_CLOSEST(vco_freq, target_rate);
126 plldig_calc_target_div(unsigned long vco_freq, unsigned long target_rate) argument
H A Dclk-cdce925.c403 unsigned long target_rate = rate * pdiv_now; local
404 long pll_rate = clk_round_rate(pll, target_rate);
/linux-master/drivers/clk/bcm/
H A Dclk-iproc-pll.c81 static int pll_calc_param(unsigned long target_rate, argument
87 ndiv_int = target_rate / parent_rate;
92 residual = target_rate - (ndiv_int * parent_rate);
118 static int pll_get_rate_index(struct iproc_pll *pll, unsigned int target_rate) argument
123 if (target_rate == pll->vco_param[i].rate)
/linux-master/drivers/staging/rtl8192e/
H A Drtllib_softmac_wx.c197 u32 target_rate = wrqu->bitrate.value; local
199 ieee->rate = target_rate / 100000;
/linux-master/drivers/media/i2c/
H A Dds90ub953.c926 unsigned long target_rate,
938 clkout_rate = ub953_calc_clkout_ub971(priv, target_rate,
945 __func__, fc_rate, m, n, clkout_rate, target_rate);
949 clkout_rate = ub953_calc_clkout_ub953(priv, target_rate,
958 target_rate);
925 ub953_calc_clkout_params(struct ub953_data *priv, unsigned long target_rate, struct ub953_clkout_data *clkout_data) argument
/linux-master/drivers/net/wireless/intel/ipw2x00/
H A Dipw2200.c9074 u32 target_rate = wrqu->bitrate.value; local
9081 if (target_rate == -1) {
9091 if (target_rate == 1000000 || !fixed)
9093 if (target_rate == 1000000)
9096 if (target_rate == 2000000 || !fixed)
9098 if (target_rate == 2000000)
9101 if (target_rate == 5500000 || !fixed)
9103 if (target_rate == 5500000)
9106 if (target_rate == 6000000 || !fixed)
9108 if (target_rate
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H A Dipw2100.c7035 u32 target_rate = wrqu->bitrate.value; local
7047 if (target_rate == 1000000 ||
7048 (!wrqu->bitrate.fixed && target_rate > 1000000))
7050 if (target_rate == 2000000 ||
7051 (!wrqu->bitrate.fixed && target_rate > 2000000))
7053 if (target_rate == 5500000 ||
7054 (!wrqu->bitrate.fixed && target_rate > 5500000))
7056 if (target_rate == 11000000 ||
7057 (!wrqu->bitrate.fixed && target_rate > 11000000))
/linux-master/drivers/staging/rtl8712/
H A Drtl871x_ioctl_linux.c1267 u32 target_rate = wrqu->bitrate.value; local
1274 if (target_rate == -1) {
1278 target_rate = target_rate / 100000;
1279 switch (target_rate) {

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