Searched refs:si (Results 1 - 25 of 242) sorted by relevance

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/haiku/src/add-ons/accelerants/neomagic/engine/
H A Dnm_info.c13 si->ps.f_ref = 14.31818;
14 si->ps.max_system_vco = 65;
15 si->ps.min_system_vco = 11;
16 si->ps.max_pixel_vco = 65;
17 si->ps.min_pixel_vco = 11;
18 si->ps.max_dac1_clock = 65;
19 si->ps.max_dac1_clock_8 = 65;
20 si->ps.max_dac1_clock_16 = 65;
22 si->ps.max_dac1_clock_24 = 0;
23 si
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H A Dnm_acc.c61 switch(si->dm.space)
65 si->engine.control = (1 << 8);
66 si->engine.depth = 1;
70 si->engine.control = (2 << 8);
71 si->engine.depth = 2;
75 si->engine.control = (3 << 8);
76 si->engine.depth = 3;
78 if (si->ps.card_type >= NM2200) break;
86 if(si->ps.card_type > NM2070)
88 switch(si
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/haiku/src/add-ons/accelerants/matrox/engine/
H A Dmga_info.c23 si->ps.pins_status = B_ERROR;
27 rom = (uint8 *) si->rom_mirror;
63 /* fill out the si->ps struct if possible */
91 /* fill out the si->ps struct */
107 si->ps.pins_status = B_OK;
122 si->ps.f_ref = 0;
124 si->ps.max_system_vco = 0;
125 si->ps.min_system_vco = 0;
126 si->ps.min_pixel_vco = 0;
127 si
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/haiku/src/add-ons/accelerants/via/engine/
H A Dinfo.c31 si->ps.pins_status = B_ERROR;
35 rom = (uint8 *) si->rom_mirror;
54 si->ps.pins_status = B_OK;
81 switch (si->ps.card_arch)
91 switch (si->ps.card_arch)
112 if (si->settings.memory != 0)
115 si->ps.memory_size = si->settings.memory * 1024 * 1024;
119 si->ps.tvout = false;
120 si
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/haiku/src/add-ons/accelerants/3dfx/
H A D3dfx_init.cpp53 SharedInfo& si = *gInfo.sharedInfo; local
55 si.videoMemSize = TDFX_GetVideoMemorySize();
57 si.cursorOffset = 0;
58 si.frameBufferOffset = si.cursorOffset + CURSOR_BYTES;
59 si.maxFrameBufferSize = si.videoMemSize - si.frameBufferOffset;
61 TRACE("Video Memory size: %d MB\n", si.videoMemSize / 1024 / 1024);
63 si
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/haiku/src/add-ons/kernel/drivers/graphics/radeon/
H A Dmem_controller.c41 shared_info *si = di->si; local
51 si->memory[mt_local].virtual_addr_start = aper0;
52 si->memory[mt_local].virtual_size = di->local_mem_size;
59 si->memory[mt_PCI].virtual_addr_start = (getTopOfRam() + 4095) & ~4095;
60 si->memory[mt_PCI].virtual_size = ATI_MAX_PCIGART_PAGES * ATI_PCIGART_PAGE_SIZE;
67 si->memory[mt_AGP].virtual_addr_start =
68 (si->memory[mt_PCI].virtual_addr_start + si->memory[mt_PCI].virtual_size
70 si
114 shared_info *si = di->si; local
141 shared_info *si = di->si; local
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/haiku/src/add-ons/accelerants/intel_810/
H A Di810_init.cpp54 SharedInfo& si = *gInfo.sharedInfo; local
58 si.maxFrameBufferSize = si.videoMemSize;
62 si.colorSpaces[0] = B_CMAP8;
63 si.colorSpaces[1] = B_RGB16;
64 si.colorSpaceCount = 2;
/haiku/src/add-ons/accelerants/nvidia/
H A DGetDeviceInfo.c18 strcpy(adi->name, si->adi.name);
19 strcpy(adi->chipset, si->adi.chipset);
21 adi->memory = si->ps.memory_size;
22 adi->dac_speed = si->ps.max_dac1_clock;
32 if (!si->ps.crtc1_screen.have_full_edid && !si->ps.crtc2_screen.have_full_edid) {
44 if (si->ps.crtc1_screen.have_full_edid && si->ps.crtc2_screen.have_full_edid) {
48 if (si->ps.crtc1_screen.aspect < (si
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H A DInitAccelerant.c23 // LOG not available from here to next LOG: NULL si
35 shared_info_area = clone_area(DRIVER_PREFIX " shared", (void **)&si, B_ANY_ADDRESS,
41 // LOG is now available, si !NULL
43 si->settings.logmask, si->settings.memory, si->settings.hardcursor, si->settings.usebios, si->settings.switchhead, si->settings.force_pci));
45 si
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H A DCursor.c30 if ((si->dm.flags & DUALHEAD_BITS) != DUALHEAD_OFF)
34 si->cursor.width = width;
35 si->cursor.height = height;
36 si->cursor.hot_x = hot_x;
37 si->cursor.hot_y = hot_y;
46 uint16 hds = si->dm.h_display_start; /* the current horizontal starting pixel */
47 uint16 vds = si->dm.v_display_start; /* the current vertical starting line */
51 if (x >= si->dm.virtual_width) x = si->dm.virtual_width - 1;
52 if (y >= si
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H A DGetModeInfo.c23 *current_mode = si->dm;
33 *afb = si->fbc;
54 switch (si->ps.card_type)
57 *low = ((si->ps.min_video_vco * 1000) / 16);
65 max_pclk = si->ps.max_dac2_clock_8;
69 max_pclk = si->ps.max_dac2_clock_16;
72 max_pclk = si->ps.max_dac2_clock_24;
76 max_pclk = si->ps.max_dac2_clock_32dh;
80 max_pclk = si->ps.max_dac2_clock_32dh;
90 switch (si
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H A DSetDisplayMode.c54 si->engine.threeD.mode_changing = true;
56 si->engine.threeD.newmode = 0xffffffff;
59 si->engine.threeD.clones = 0x00000000;
63 if (si->ps.secondary_head) head2_interrupt_enable(false);
66 if (si->ps.tvout) BT_stop_tvout();
70 if (si->ps.secondary_head) head2_dpms(false, false, false, true);
71 if (si->ps.tvout) BT_dpms(false);
74 startadd = (uint8*)si->fbc.frame_buffer - (uint8*)si->framebuffer;
77 nv_general_validate_pic_size (&target, &si
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/haiku/src/add-ons/accelerants/nvidia/engine/
H A Dnv_general.c19 #define DUMP_CFG(reg, type) if (si->ps.card_type >= type) do { \
98 if (si->ps.int_assigned)
104 si->ps.laptop = false;
114 si->ps.card_type = NV04;
115 si->ps.card_arch = NV04A;
116 sprintf(si->adi.name, "Nvidia TNT1");
117 sprintf(si->adi.chipset, "NV04");
124 si->ps.card_type = NV05;
125 si->ps.card_arch = NV04A;
126 sprintf(si
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/haiku/src/add-ons/accelerants/skeleton/
H A DGetModeInfo.c23 *current_mode = si->dm;
33 *afb = si->fbc;
54 switch (si->ps.card_type)
57 *low = ((si->ps.min_video_vco * 1000) / 16);
65 max_pclk = si->ps.max_dac2_clock_8;
69 max_pclk = si->ps.max_dac2_clock_16;
72 max_pclk = si->ps.max_dac2_clock_24;
76 max_pclk = si->ps.max_dac2_clock_32dh;
80 max_pclk = si->ps.max_dac2_clock_32dh;
90 switch (si
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H A DCursor.c30 if ((si->dm.flags & DUALHEAD_BITS) != DUALHEAD_OFF)
34 si->cursor.width = width;
35 si->cursor.height = height;
36 si->cursor.hot_x = hot_x;
37 si->cursor.hot_y = hot_y;
46 uint16 hds = si->dm.h_display_start; /* the current horizontal starting pixel */
47 uint16 vds = si->dm.v_display_start; /* the current vertical starting line */
51 if (x >= si->dm.virtual_width) x = si->dm.virtual_width - 1;
52 if (y >= si
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/haiku/src/add-ons/accelerants/via/
H A DGetModeInfo.c23 *current_mode = si->dm;
33 *afb = si->fbc;
54 switch (si->ps.card_type)
57 *low = ((si->ps.min_video_vco * 1000) / 16);
65 max_pclk = si->ps.max_dac2_clock_8;
69 max_pclk = si->ps.max_dac2_clock_16;
72 max_pclk = si->ps.max_dac2_clock_24;
76 max_pclk = si->ps.max_dac2_clock_32dh;
80 max_pclk = si->ps.max_dac2_clock_32dh;
90 switch (si
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H A DCursor.c30 if ((si->dm.flags & DUALHEAD_BITS) != DUALHEAD_OFF)
34 si->cursor.width = width;
35 si->cursor.height = height;
36 si->cursor.hot_x = hot_x;
37 si->cursor.hot_y = hot_y;
46 uint16 hds = si->dm.h_display_start; /* the current horizontal starting pixel */
47 uint16 vds = si->dm.v_display_start; /* the current vertical starting line */
51 if (x >= si->dm.virtual_width) x = si->dm.virtual_width - 1;
52 if (y >= si
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/haiku/src/add-ons/accelerants/matrox/
H A DGetModeInfo.c25 *current_mode = si->dm;
35 *afb = si->fbc;
57 switch (si->ps.card_type)
61 *low = ((si->ps.min_video_vco * 1000) / 16);
64 *low = ((si->ps.min_video_vco * 1000) / 8);
71 max_pclk = si->ps.max_dac2_clock_8;
75 max_pclk = si->ps.max_dac2_clock_16;
78 max_pclk = si->ps.max_dac2_clock_24;
82 max_pclk = si->ps.max_dac2_clock_32dh;
86 max_pclk = si
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H A DCursor.c41 si->cursor.width = width;
42 si->cursor.height = height;
43 si->cursor.hot_x = hot_x;
44 si->cursor.hot_y = hot_y;
53 uint16 hds = si->dm.h_display_start; /* the current horizontal starting pixel */
54 uint16 vds = si->dm.v_display_start; /* the current vertical starting line */
58 if (x >= si->dm.virtual_width) x = si->dm.virtual_width - 1;
59 if (y >= si->dm.virtual_height) y = si
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/haiku/src/add-ons/accelerants/neomagic/
H A DCursor.c31 si->cursor.width = width;
32 si->cursor.height = height;
33 si->cursor.hot_x = hot_x;
34 si->cursor.hot_y = hot_y;
43 uint16 hds = si->dm.h_display_start; /* the current horizontal starting pixel */
44 uint16 vds = si->dm.v_display_start; /* the current vertical starting line */
46 uint16 h_display = si->dm.timing.h_display; /* local copy needed for flatpanel */
47 uint16 v_display = si->dm.timing.v_display; /* local copy needed for flatpanel */
50 if (x >= si->dm.virtual_width) x = si
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H A DOverlay.c76 AQUIRE_BEN(si->overlay.lock)
78 LOG(4,("Overlay: cardRAM_start = $%p\n",((uint8*)si->framebuffer)));
79 LOG(4,("Overlay: cardRAM_start_DMA = $%p\n",((uint8*)si->framebuffer_pci)));
80 LOG(4,("Overlay: cardRAM_size = %dKb\n",si->ps.memory_size));
85 if (si->overlay.myBuffer[offset].buffer == NULL) break;
99 si->overlay.myBuffer[offset].width = width;
103 si->overlay.myBuffer[offset].width = (width & ~0x0007) + 8;
105 si->overlay.myBuffer[offset].bytes_per_row = 2 * si->overlay.myBuffer[offset].width;
109 if (si
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H A DGetDeviceInfo.c18 sprintf(adi->name, si->adi.name);
19 sprintf(adi->chipset, si->adi.chipset);
21 adi->memory = (si->ps.memory_size * 1024);
22 adi->dac_speed = si->ps.max_dac1_clock;
/haiku/src/add-ons/accelerants/ati/
H A Dmach64_init.cpp25 SharedInfo& si = *gInfo.sharedInfo; local
26 M64_Params& params = si.m64Params;
64 if (si.chipType < MACH64_264VT4) {
77 if (si.videoMemSize <= 1024 * 1024) {
87 if (si.videoMemSize <= 1024 * 1024) {
96 if (si.videoMemSize <= 1024 * 1024) {
133 SharedInfo& si = *gInfo.sharedInfo; local
153 if (si.chipType >= MACH64_264VTB) {
154 if ((si.chipType >= MACH64_264VT4) && (si
177 SharedInfo& si = *gInfo.sharedInfo; local
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H A Drage128_init.cpp119 SharedInfo& si = *gInfo.sharedInfo; local
121 si.videoMemSize = INREG(R128_CONFIG_MEMSIZE);
123 si.cursorOffset = (si.videoMemSize - CURSOR_BYTES) & ~0xfff; // align to 4k boundary
124 si.frameBufferOffset = 0;
125 si.maxFrameBufferSize = si.cursorOffset - si.frameBufferOffset;
128 si.videoMemSize / 1024 / 1024, si
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/haiku/src/add-ons/accelerants/s3/
H A Dvirge_init.cpp81 SharedInfo& si = *gInfo.sharedInfo; local
92 WritePIO_8(CRTC_DATA, (uint8)((uint32)(si.videoMemPCI) >> 24));
94 WritePIO_8(CRTC_DATA, (uint8)((uint32)(si.videoMemPCI) >> 16));
101 if (si.chipType == S3_TRIO_3D)
114 if (si.chipType == S3_VIRGE_VX) {
140 } else if (si.chipType == S3_TRIO_3D_2X) {
155 } else if (si.chipType == S3_TRIO_3D) {
165 } else if (si.chipType == S3_VIRGE_GX2 || S3_VIRGE_MX_SERIES(si.chipType)) {
193 si
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