1/* setup initialisation information for card */
2/* Authors:
3   Rudolf Cornelissen 4/2003-6/2004
4*/
5
6#define MODULE_BIT 0x00002000
7
8#include "nm_std.h"
9
10static void set_nm2070(void)
11{
12	/* setup cardspecs */
13	si->ps.f_ref = 14.31818;
14	si->ps.max_system_vco = 65;
15	si->ps.min_system_vco = 11;
16	si->ps.max_pixel_vco = 65;
17	si->ps.min_pixel_vco = 11;
18	si->ps.max_dac1_clock = 65;
19	si->ps.max_dac1_clock_8 = 65;
20	si->ps.max_dac1_clock_16 = 65;
21	/* 24bit color is not supported */
22	si->ps.max_dac1_clock_24 = 0;
23	si->ps.memory_size = 896;
24	si->ps.curmem_size = 2048;
25	si->ps.max_crtc_width = 1024;
26	si->ps.max_crtc_height = 1000;
27	si->ps.std_engine_clock = 0;
28}
29
30static void set_nm2090_nm2093(void)
31{
32	/* setup cardspecs */
33	si->ps.f_ref = 14.31818;
34	si->ps.max_system_vco = 80;
35	si->ps.min_system_vco = 11;
36	si->ps.max_pixel_vco = 80;
37	si->ps.min_pixel_vco = 11;
38	si->ps.max_dac1_clock = 80;
39	si->ps.max_dac1_clock_8 = 80;
40	si->ps.max_dac1_clock_16 = 80;
41	si->ps.max_dac1_clock_24 = 65;
42	si->ps.memory_size = 1152;
43	si->ps.curmem_size = 2048;
44	si->ps.max_crtc_width = 1024;
45	si->ps.max_crtc_height = 1000;
46	si->ps.std_engine_clock = 0;
47}
48
49static void set_nm2097(void)
50{
51	/* setup cardspecs */
52	si->ps.f_ref = 14.31818;
53	si->ps.max_system_vco = 80;
54	si->ps.min_system_vco = 11;
55	si->ps.max_pixel_vco = 80;
56	si->ps.min_pixel_vco = 11;
57	si->ps.max_dac1_clock = 80;
58	si->ps.max_dac1_clock_8 = 80;
59	si->ps.max_dac1_clock_16 = 80;
60	si->ps.max_dac1_clock_24 = 65;
61	si->ps.memory_size = 1152;
62	si->ps.curmem_size = 1024;
63	si->ps.max_crtc_width = 1024;
64	si->ps.max_crtc_height = 1000;
65	si->ps.std_engine_clock = 0;
66}
67
68static void set_nm2160(void)
69{
70	/* setup cardspecs */
71	si->ps.f_ref = 14.31818;
72	si->ps.max_system_vco = 90;
73	si->ps.min_system_vco = 11;
74	si->ps.max_pixel_vco = 90;
75	si->ps.min_pixel_vco = 11;
76	si->ps.max_dac1_clock = 90;
77	si->ps.max_dac1_clock_8 = 90;
78	si->ps.max_dac1_clock_16 = 90;
79	si->ps.max_dac1_clock_24 = 70;
80	si->ps.memory_size = 2048;
81	si->ps.curmem_size = 1024;
82	si->ps.max_crtc_width = 1024;
83	si->ps.max_crtc_height = 1000;
84	si->ps.std_engine_clock = 0;
85}
86
87static void set_nm2200(void)
88{
89	/* setup cardspecs */
90	si->ps.f_ref = 14.31818;
91	si->ps.max_system_vco = 110;
92	si->ps.min_system_vco = 11;
93	si->ps.max_pixel_vco = 110;
94	si->ps.min_pixel_vco = 11;
95	si->ps.max_dac1_clock = 110;
96	si->ps.max_dac1_clock_8 = 110;
97	si->ps.max_dac1_clock_16 = 110;
98	si->ps.max_dac1_clock_24 = 90;
99	si->ps.memory_size = 2560;
100	si->ps.curmem_size = 1024;
101	si->ps.max_crtc_width = 1280;
102	si->ps.max_crtc_height = 1024;
103	si->ps.std_engine_clock = 0;
104}
105
106static void set_nm2230(void)
107{
108	/* setup cardspecs */
109	si->ps.f_ref = 14.31818;
110	si->ps.max_system_vco = 110;
111	si->ps.min_system_vco = 11;
112	si->ps.max_pixel_vco = 110;
113	si->ps.min_pixel_vco = 11;
114	si->ps.max_dac1_clock = 110;
115	si->ps.max_dac1_clock_8 = 110;
116	si->ps.max_dac1_clock_16 = 110;
117	si->ps.max_dac1_clock_24 = 90;
118	si->ps.memory_size = 3008;
119	si->ps.curmem_size = 1024;
120	si->ps.max_crtc_width = 1280;
121	si->ps.max_crtc_height = 1024;
122	si->ps.std_engine_clock = 0;
123}
124
125static void set_nm2360(void)
126{
127	/* setup cardspecs */
128	si->ps.f_ref = 14.31818;
129	si->ps.max_system_vco = 110;
130	si->ps.min_system_vco = 11;
131	si->ps.max_pixel_vco = 110;
132	si->ps.min_pixel_vco = 11;
133	si->ps.max_dac1_clock = 110;
134	si->ps.max_dac1_clock_8 = 110;
135	si->ps.max_dac1_clock_16 = 110;
136	si->ps.max_dac1_clock_24 = 90;
137	si->ps.memory_size = 4096;
138	si->ps.curmem_size = 1024;
139	si->ps.max_crtc_width = 1280;
140	si->ps.max_crtc_height = 1024;
141	si->ps.std_engine_clock = 0;
142}
143
144static void set_nm2380(void)
145{
146	/* setup cardspecs */
147	si->ps.f_ref = 14.31818;
148	si->ps.max_system_vco = 110;
149	si->ps.min_system_vco = 11;
150	si->ps.max_pixel_vco = 110;
151	si->ps.min_pixel_vco = 11;
152	si->ps.max_dac1_clock = 110;
153	si->ps.max_dac1_clock_8 = 110;
154	si->ps.max_dac1_clock_16 = 110;
155	si->ps.max_dac1_clock_24 = 90;
156	si->ps.memory_size = 6144;
157	si->ps.curmem_size = 1024;
158	si->ps.max_crtc_width = 1280;
159	si->ps.max_crtc_height = 1024;
160	si->ps.std_engine_clock = 0;
161}
162
163void set_specs(void)
164{
165	uint8 size_outputs, type;
166
167	LOG(8,("INFO: setting cardspecs\n"));
168
169	switch (si->ps.card_type)
170	{
171		case NM2070:
172			set_nm2070();
173			break;
174		case NM2090:
175		case NM2093:
176			set_nm2090_nm2093();
177			break;
178		case NM2097:
179			set_nm2097();
180			break;
181		case NM2160:
182			set_nm2160();
183			break;
184		case NM2200:
185			set_nm2200();
186			break;
187		case NM2230:
188			set_nm2230();
189			break;
190		case NM2360:
191			set_nm2360();
192			break;
193		case NM2380:
194			set_nm2380();
195			break;
196	}
197
198	/* get output properties: */
199    /* read panelsize and preselected outputs (via BIOS) */
200    size_outputs = ISAGRPHR(PANELCTRL1);
201    /* read the panel type */
202    type = ISAGRPHR(PANELTYPE);
203
204    /* setup panelspecs */
205    switch ((size_outputs & 0x18) >> 3)
206    {
207    case 0x00 :
208		si->ps.panel_width = 640;
209		si->ps.panel_height = 480;
210		break;
211    case 0x01 :
212		si->ps.panel_width = 800;
213		si->ps.panel_height = 600;
214		break;
215    case 0x02 :
216		si->ps.panel_width = 1024;
217		si->ps.panel_height = 768;
218		break;
219    case 0x03 :
220        /* fixme: 1280x1024 panel support still needs to be done */
221		si->ps.panel_width = 1280;
222		si->ps.panel_height = 1024;
223	}
224	/* make note of paneltype */
225	si->ps.panel_type = (type & 0x12);
226	/* make note of preselected outputs (via BIOS) */
227	si->ps.outputs = (size_outputs & 0x03);
228	/* check for illegal setting */
229	if (si->ps.outputs == 0)
230	{
231		LOG(4, ("INFO: illegal outputmode detected, assuming internal mode!\n"));
232		si->ps.outputs = 2;
233	}
234}
235
236void dump_specs(void)
237{
238	LOG(2,("INFO: cardspecs and settings follow:\n"));
239	LOG(2,("f_ref: %fMhz\n", si->ps.f_ref));
240	LOG(2,("max_system_vco: %dMhz\n", si->ps.max_system_vco));
241	LOG(2,("min_system_vco: %dMhz\n", si->ps.min_system_vco));
242	LOG(2,("max_pixel_vco: %dMhz\n", si->ps.max_pixel_vco));
243	LOG(2,("min_pixel_vco: %dMhz\n", si->ps.min_pixel_vco));
244	LOG(2,("std_engine_clock: %dMhz\n", si->ps.std_engine_clock));
245	LOG(2,("max_dac1_clock: %dMhz\n", si->ps.max_dac1_clock));
246	LOG(2,("max_dac1_clock_8: %dMhz\n", si->ps.max_dac1_clock_8));
247	LOG(2,("max_dac1_clock_16: %dMhz\n", si->ps.max_dac1_clock_16));
248	LOG(2,("max_dac1_clock_24: %dMhz\n", si->ps.max_dac1_clock_24));
249	LOG(2,("card memory_size: %dKbytes\n", si->ps.memory_size));
250	LOG(2,("card curmem_size: %dbytes\n", si->ps.curmem_size));
251	LOG(2,("card max_crtc_width: %d\n", si->ps.max_crtc_width));
252	LOG(2,("card max_crtc_height: %d\n", si->ps.max_crtc_height));
253	switch (si->ps.panel_type)
254	{
255	case 0x00:
256		LOG(2, ("B/W dualscan LCD panel detected\n"));
257		break;
258	case 0x02:
259		LOG(2, ("color dualscan LCD panel detected\n"));
260		break;
261	case 0x10:
262		LOG(2, ("B/W TFT LCD panel detected\n"));
263		break;
264	case 0x12:
265		LOG(2, ("color TFT LCD panel detected\n"));
266		break;
267	}
268	LOG(2,("internal panel width: %d\n", si->ps.panel_width));
269	LOG(2,("internal panel height: %d\n", si->ps.panel_height));
270	switch (si->ps.outputs)
271	{
272	case 0x01:
273		LOG(2, ("external CRT only mode preset\n"));
274		break;
275	case 0x02:
276		LOG(2, ("internal LCD only mode preset\n"));
277		break;
278	case 0x03:
279		LOG(2, ("simultaneous LCD/CRT mode preset\n"));
280		break;
281	}
282	LOG(2,("INFO: end cardspecs and settings.\n"));
283}
284