1/* Authors: 2 Mark Watson 12/1999, 3 Apsed, 4 Rudolf Cornelissen 10/2002-1/2016 5 tst.. 6*/ 7 8#define MODULE_BIT 0x00008000 9 10#include "nv_std.h" 11 12static status_t test_ram(void); 13static status_t nvxx_general_powerup (void); 14static void unlock_card(void); 15static status_t nv_general_bios_to_powergraphics(void); 16 17static void nv_dump_configuration_space (void) 18{ 19#define DUMP_CFG(reg, type) if (si->ps.card_type >= type) do { \ 20 uint32 value = CFGR(reg); \ 21 MSG(("configuration_space 0x%02x %20s 0x%08x\n", \ 22 NVCFG_##reg, #reg, value)); \ 23} while (0) 24 DUMP_CFG (DEVID, 0); 25 DUMP_CFG (DEVCTRL, 0); 26 DUMP_CFG (CLASS, 0); 27 DUMP_CFG (HEADER, 0); 28 DUMP_CFG (BASE1REGS,0); 29 DUMP_CFG (BASE2FB, 0); 30 DUMP_CFG (BASE3, 0); 31 DUMP_CFG (BASE4, 0); 32 DUMP_CFG (BASE5, 0); 33 DUMP_CFG (BASE6, 0); 34 DUMP_CFG (BASE7, 0); 35 DUMP_CFG (SUBSYSID1,0); 36 DUMP_CFG (ROMBASE, 0); 37 DUMP_CFG (CAPPTR, 0); 38 DUMP_CFG (CFG_1, 0); 39 DUMP_CFG (INTERRUPT,0); 40 DUMP_CFG (SUBSYSID2,0); 41 DUMP_CFG (AGPREF, 0); 42 DUMP_CFG (AGPSTAT, 0); 43 DUMP_CFG (AGPCMD, 0); 44 DUMP_CFG (ROMSHADOW,0); 45 DUMP_CFG (VGA, 0); 46 DUMP_CFG (SCHRATCH, 0); 47 DUMP_CFG (CFG_10, 0); 48 DUMP_CFG (CFG_11, 0); 49 DUMP_CFG (CFG_12, 0); 50 DUMP_CFG (CFG_13, 0); 51 DUMP_CFG (CFG_14, 0); 52 DUMP_CFG (CFG_15, 0); 53 DUMP_CFG (CFG_16, 0); 54 DUMP_CFG (PCIEREF, 0); 55 DUMP_CFG (PCIEDCAP, 0); 56 DUMP_CFG (PCIEDCTST,0); 57 DUMP_CFG (PCIELCAP, 0); 58 DUMP_CFG (PCIELCTST,0); 59 DUMP_CFG (CFG_22, 0); 60 DUMP_CFG (CFG_23, 0); 61 DUMP_CFG (CFG_24, 0); 62 DUMP_CFG (CFG_25, 0); 63 DUMP_CFG (CFG_26, 0); 64 DUMP_CFG (CFG_27, 0); 65 DUMP_CFG (CFG_28, 0); 66 DUMP_CFG (CFG_29, 0); 67 DUMP_CFG (CFG_30, 0); 68 DUMP_CFG (CFG_31, 0); 69 DUMP_CFG (CFG_32, 0); 70 DUMP_CFG (CFG_33, 0); 71 DUMP_CFG (CFG_34, 0); 72 DUMP_CFG (CFG_35, 0); 73 DUMP_CFG (CFG_36, 0); 74 DUMP_CFG (CFG_37, 0); 75 DUMP_CFG (CFG_38, 0); 76 DUMP_CFG (CFG_39, 0); 77 DUMP_CFG (CFG_40, 0); 78 DUMP_CFG (CFG_41, 0); 79 DUMP_CFG (CFG_42, 0); 80 DUMP_CFG (CFG_43, 0); 81 DUMP_CFG (CFG_44, 0); 82 DUMP_CFG (CFG_45, 0); 83 DUMP_CFG (CFG_46, 0); 84 DUMP_CFG (CFG_47, 0); 85 DUMP_CFG (CFG_48, 0); 86 DUMP_CFG (CFG_49, 0); 87 DUMP_CFG (CFG_50, 0); 88#undef DUMP_CFG 89} 90 91status_t nv_general_powerup() 92{ 93 status_t status; 94 95 LOG(1,("POWERUP: Haiku nVidia Accelerant 1.16 running.\n")); 96 97 /* log VBLANK INT usability status */ 98 if (si->ps.int_assigned) 99 LOG(4,("POWERUP: Usable INT assigned to HW; Vblank semaphore enabled\n")); 100 else 101 LOG(4,("POWERUP: No (usable) INT assigned to HW; Vblank semaphore disabled\n")); 102 103 /* preset no laptop */ 104 si->ps.laptop = false; 105 106 /* WARNING: 107 * _adi.name_ and _adi.chipset_ can contain 31 readable characters max.!!! */ 108 109 /* detect card type and power it up */ 110 switch(CFGR(DEVID)) 111 { 112 /* Vendor Nvidia */ 113 case 0x002010de: /* Nvidia TNT1 */ 114 si->ps.card_type = NV04; 115 si->ps.card_arch = NV04A; 116 sprintf(si->adi.name, "Nvidia TNT1"); 117 sprintf(si->adi.chipset, "NV04"); 118 status = nvxx_general_powerup(); 119 break; 120 case 0x002810de: /* Nvidia TNT2 (pro) */ 121 case 0x002910de: /* Nvidia TNT2 Ultra */ 122 case 0x002a10de: /* Nvidia TNT2 */ 123 case 0x002b10de: /* Nvidia TNT2 */ 124 si->ps.card_type = NV05; 125 si->ps.card_arch = NV04A; 126 sprintf(si->adi.name, "Nvidia TNT2"); 127 sprintf(si->adi.chipset, "NV05"); 128 status = nvxx_general_powerup(); 129 break; 130 case 0x002c10de: /* Nvidia Vanta (Lt) */ 131 si->ps.card_type = NV05; 132 si->ps.card_arch = NV04A; 133 sprintf(si->adi.name, "Nvidia Vanta (Lt)"); 134 sprintf(si->adi.chipset, "NV05"); 135 status = nvxx_general_powerup(); 136 break; 137 case 0x002d10de: /* Nvidia TNT2-M64 (Pro) */ 138 si->ps.card_type = NV05M64; 139 si->ps.card_arch = NV04A; 140 sprintf(si->adi.name, "Nvidia TNT2-M64 (Pro)"); 141 sprintf(si->adi.chipset, "NV05 model 64"); 142 status = nvxx_general_powerup(); 143 break; 144 case 0x002e10de: /* Nvidia NV06 Vanta */ 145 case 0x002f10de: /* Nvidia NV06 Vanta */ 146 si->ps.card_type = NV06; 147 si->ps.card_arch = NV04A; 148 sprintf(si->adi.name, "Nvidia Vanta"); 149 sprintf(si->adi.chipset, "NV06"); 150 status = nvxx_general_powerup(); 151 break; 152 case 0x004010de: /* Nvidia Geforce FX 6800 Ultra */ 153 case 0x004110de: /* Nvidia Geforce FX 6800 */ 154 case 0x004210de: /* Nvidia Geforce FX 6800LE */ 155 si->ps.card_type = NV40; 156 si->ps.card_arch = NV40A; 157 sprintf(si->adi.name, "Nvidia Geforce FX 6800"); 158 sprintf(si->adi.chipset, "NV40"); 159 status = nvxx_general_powerup(); 160 break; 161 case 0x004310de: /* Nvidia Geforce 6800 XE */ 162 si->ps.card_type = NV40; 163 si->ps.card_arch = NV40A; 164 sprintf(si->adi.name, "Nvidia Geforce 6800 XE"); 165 sprintf(si->adi.chipset, "NV40"); 166 status = nvxx_general_powerup(); 167 break; 168 case 0x004510de: /* Nvidia Geforce FX 6800 GT */ 169 case 0x004610de: /* Nvidia Geforce FX 6800 GT */ 170 case 0x004710de: /* Nvidia Geforce FX 6800 GS */ 171 case 0x004810de: /* Nvidia Geforce FX 6800 XT */ 172 si->ps.card_type = NV40; 173 si->ps.card_arch = NV40A; 174 sprintf(si->adi.name, "Nvidia Geforce FX 6800"); 175 sprintf(si->adi.chipset, "NV40"); 176 status = nvxx_general_powerup(); 177 break; 178 case 0x004910de: /* Nvidia unknown FX */ 179 si->ps.card_type = NV40; 180 si->ps.card_arch = NV40A; 181 sprintf(si->adi.name, "Nvidia unknown FX"); 182 sprintf(si->adi.chipset, "NV40"); 183 status = nvxx_general_powerup(); 184 break; 185 case 0x004d10de: /* Nvidia Quadro FX 4400 */ 186 case 0x004e10de: /* Nvidia Quadro FX 4000 */ 187 si->ps.card_type = NV40; 188 si->ps.card_arch = NV40A; 189 sprintf(si->adi.name, "Nvidia Quadro FX 4000/4400"); 190 sprintf(si->adi.chipset, "NV40"); 191 status = nvxx_general_powerup(); 192 break; 193 case 0x009110de: /* Nvidia Geforce 7800 GTX PCIe */ 194 case 0x009210de: /* Nvidia Geforce 7800 GT PCIe */ 195 si->ps.card_type = G70; 196 si->ps.card_arch = NV40A; 197 sprintf(si->adi.name, "Nvidia Geforce 7800 GT PCIe"); 198 sprintf(si->adi.chipset, "G70"); 199 status = nvxx_general_powerup(); 200 break; 201 case 0x009810de: /* Nvidia Geforce 7800 Go PCIe */ 202 case 0x009910de: /* Nvidia Geforce 7800 GTX Go PCIe */ 203 si->ps.card_type = G70; 204 si->ps.card_arch = NV40A; 205 si->ps.laptop = true; 206 sprintf(si->adi.name, "Nvidia Geforce 7800 GTX Go PCIe"); 207 sprintf(si->adi.chipset, "G70"); 208 status = nvxx_general_powerup(); 209 break; 210 case 0x009d10de: /* Nvidia Quadro FX 4500 */ 211 si->ps.card_type = G70; 212 si->ps.card_arch = NV40A; 213 sprintf(si->adi.name, "Nvidia Quadro FX 4500"); 214 sprintf(si->adi.chipset, "G70"); 215 status = nvxx_general_powerup(); 216 break; 217 case 0x00a010de: /* Nvidia Aladdin TNT2 */ 218 si->ps.card_type = NV05; 219 si->ps.card_arch = NV04A; 220 sprintf(si->adi.name, "Nvidia Aladdin TNT2"); 221 sprintf(si->adi.chipset, "NV05"); 222 status = nvxx_general_powerup(); 223 break; 224 case 0x00c010de: /* Nvidia Geforce 6800 GS */ 225 si->ps.card_type = NV41; 226 si->ps.card_arch = NV40A; 227 sprintf(si->adi.name, "Nvidia Geforce 6800 GS"); 228 sprintf(si->adi.chipset, "NV41"); 229 status = nvxx_general_powerup(); 230 break; 231 case 0x00c110de: /* Nvidia Geforce FX 6800 */ 232 case 0x00c210de: /* Nvidia Geforce FX 6800LE */ 233 case 0x00c310de: /* Nvidia Geforce FX 6800 XT */ 234 si->ps.card_type = NV41; 235 si->ps.card_arch = NV40A; 236 sprintf(si->adi.name, "Nvidia Geforce FX 6800"); 237 sprintf(si->adi.chipset, "NV41"); 238 status = nvxx_general_powerup(); 239 break; 240 case 0x00c810de: /* Nvidia Geforce FX 6800 Go */ 241 case 0x00c910de: /* Nvidia Geforce FX 6800 Ultra Go */ 242 si->ps.card_type = NV41; 243 si->ps.card_arch = NV40A; 244 si->ps.laptop = true; 245 sprintf(si->adi.name, "Nvidia Geforce FX 6800 Go"); 246 sprintf(si->adi.chipset, "NV41"); 247 status = nvxx_general_powerup(); 248 break; 249 case 0x00cc10de: /* Nvidia Quadro FX 1400 Go */ 250 si->ps.card_type = NV41; 251 si->ps.card_arch = NV40A; 252 si->ps.laptop = true; 253 sprintf(si->adi.name, "Nvidia Quadro FX 1400 Go"); 254 sprintf(si->adi.chipset, "NV41"); 255 status = nvxx_general_powerup(); 256 break; 257 case 0x00cd10de: /* Nvidia Quadro FX 3450/4000 SDI */ 258 si->ps.card_type = NV41; 259 si->ps.card_arch = NV40A; 260 sprintf(si->adi.name, "Nvidia Quadro FX 3450/4000 SDI"); 261 sprintf(si->adi.chipset, "NV41"); 262 status = nvxx_general_powerup(); 263 break; 264 case 0x00ce10de: /* Nvidia Quadro FX 1400 */ 265 si->ps.card_type = NV41; 266 si->ps.card_arch = NV40A; 267 sprintf(si->adi.name, "Nvidia Quadro FX 1400"); 268 sprintf(si->adi.chipset, "NV41"); 269 status = nvxx_general_powerup(); 270 break; 271 case 0x00f010de: /* Nvidia Geforce FX 6800 (Ultra) AGP(?) */ 272 si->ps.card_type = NV40; 273 si->ps.card_arch = NV40A; 274 sprintf(si->adi.name, "Nvidia Geforce FX 6800 AGP(?)"); 275 sprintf(si->adi.chipset, "NV40(?)"); 276 status = nvxx_general_powerup(); 277 break; 278 case 0x00f110de: /* Nvidia Geforce FX 6600 GT AGP */ 279 case 0x00f210de: /* Nvidia Geforce FX 6600 AGP */ 280 si->ps.card_type = NV43; 281 si->ps.card_arch = NV40A; 282 sprintf(si->adi.name, "Nvidia Geforce FX 6600 (GT) AGP"); 283 sprintf(si->adi.chipset, "NV43"); 284 status = nvxx_general_powerup(); 285 break; 286 case 0x00f310de: /* Nvidia Geforce 6200 */ 287 si->ps.card_type = NV44; 288 si->ps.card_arch = NV40A; 289 sprintf(si->adi.name, "Nvidia Geforce 6200"); 290 sprintf(si->adi.chipset, "NV44"); 291 status = nvxx_general_powerup(); 292 break; 293 case 0x00f410de: /* Nvidia Geforce 6600 LE */ 294 si->ps.card_type = NV43; 295 si->ps.card_arch = NV40A; 296 sprintf(si->adi.name, "Nvidia Geforce 6600 LE"); 297 sprintf(si->adi.chipset, "NV43"); 298 status = nvxx_general_powerup(); 299 break; 300 case 0x00f510de: /* Nvidia Geforce FX 7800 GS AGP */ 301 si->ps.card_type = G70; 302 si->ps.card_arch = NV40A; 303 sprintf(si->adi.name, "Nvidia Geforce 7800 GS AGP"); 304 sprintf(si->adi.chipset, "G70"); 305 status = nvxx_general_powerup(); 306 break; 307 case 0x00f610de: /* Nvidia Geforce 6800 GS */ 308 si->ps.card_type = NV43; 309 si->ps.card_arch = NV40A; 310 sprintf(si->adi.name, "Nvidia Geforce 6800 GS"); 311 sprintf(si->adi.chipset, "NV43"); 312 status = nvxx_general_powerup(); 313 break; 314 case 0x00f810de: /* Nvidia Quadro FX 3400/4400 PCIe */ 315 si->ps.card_type = NV45; 316 si->ps.card_arch = NV40A; 317 sprintf(si->adi.name, "Nvidia Quadro FX 3400 PCIe"); 318 sprintf(si->adi.chipset, "NV45"); 319 status = nvxx_general_powerup(); 320 break; 321 case 0x00f910de: /* Nvidia Geforce PCX 6800 PCIe */ 322 si->ps.card_type = NV45; 323 si->ps.card_arch = NV40A; 324 sprintf(si->adi.name, "Nvidia Geforce PCX 6800 PCIe"); 325 sprintf(si->adi.chipset, "NV45"); 326 status = nvxx_general_powerup(); 327 break; 328 case 0x00fa10de: /* Nvidia Geforce PCX 5750 PCIe */ 329 si->ps.card_type = NV36; 330 si->ps.card_arch = NV30A; 331 sprintf(si->adi.name, "Nvidia Geforce PCX 5750 PCIe"); 332 sprintf(si->adi.chipset, "NV36"); 333 status = nvxx_general_powerup(); 334 break; 335 case 0x00fb10de: /* Nvidia Geforce PCX 5900 PCIe */ 336 si->ps.card_type = NV35; 337 si->ps.card_arch = NV30A; 338 sprintf(si->adi.name, "Nvidia Geforce PCX 5900 PCIe"); 339 sprintf(si->adi.chipset, "NV35(?)"); 340 status = nvxx_general_powerup(); 341 break; 342 case 0x00fc10de: /* Nvidia Geforce PCX 5300 PCIe */ 343 si->ps.card_type = NV34; 344 si->ps.card_arch = NV30A; 345 sprintf(si->adi.name, "Nvidia Geforce PCX 5300 PCIe"); 346 sprintf(si->adi.chipset, "NV34"); 347 status = nvxx_general_powerup(); 348 break; 349 case 0x00fd10de: /* Nvidia Quadro PCX PCIe */ 350 si->ps.card_type = NV45; 351 si->ps.card_arch = NV40A; 352 sprintf(si->adi.name, "Nvidia Quadro PCX PCIe"); 353 sprintf(si->adi.chipset, "NV45"); 354 status = nvxx_general_powerup(); 355 break; 356 case 0x00fe10de: /* Nvidia Quadro FX 1300 PCIe(?) */ 357 si->ps.card_type = NV36; 358 si->ps.card_arch = NV30A; 359 sprintf(si->adi.name, "Nvidia Quadro FX 1300 PCIe(?)"); 360 sprintf(si->adi.chipset, "NV36(?)"); 361 status = nvxx_general_powerup(); 362 break; 363 case 0x00ff10de: /* Nvidia Geforce PCX 4300 PCIe */ 364 si->ps.card_type = NV18; 365 si->ps.card_arch = NV10A; 366 sprintf(si->adi.name, "Nvidia Geforce PCX 4300 PCIe"); 367 sprintf(si->adi.chipset, "NV18"); 368 status = nvxx_general_powerup(); 369 break; 370 case 0x010010de: /* Nvidia Geforce256 SDR */ 371 case 0x010110de: /* Nvidia Geforce256 DDR */ 372 case 0x010210de: /* Nvidia Geforce256 Ultra */ 373 si->ps.card_type = NV10; 374 si->ps.card_arch = NV10A; 375 sprintf(si->adi.name, "Nvidia Geforce256"); 376 sprintf(si->adi.chipset, "NV10"); 377 status = nvxx_general_powerup(); 378 break; 379 case 0x010310de: /* Nvidia Quadro */ 380 si->ps.card_type = NV10; 381 si->ps.card_arch = NV10A; 382 sprintf(si->adi.name, "Nvidia Quadro"); 383 sprintf(si->adi.chipset, "NV10"); 384 status = nvxx_general_powerup(); 385 break; 386 case 0x011010de: /* Nvidia Geforce2 MX/MX400 */ 387 case 0x011110de: /* Nvidia Geforce2 MX100/MX200 DDR */ 388 si->ps.card_type = NV11; 389 si->ps.card_arch = NV10A; 390 sprintf(si->adi.name, "Nvidia Geforce2 MX"); 391 sprintf(si->adi.chipset, "NV11"); 392 status = nvxx_general_powerup(); 393 break; 394 case 0x011210de: /* Nvidia Geforce2 Go */ 395 si->ps.card_type = NV11; 396 si->ps.card_arch = NV10A; 397 si->ps.laptop = true; 398 sprintf(si->adi.name, "Nvidia Geforce2 Go"); 399 sprintf(si->adi.chipset, "NV11"); 400 status = nvxx_general_powerup(); 401 break; 402 case 0x011310de: /* Nvidia Quadro2 MXR/EX/Go */ 403 si->ps.card_type = NV11; 404 si->ps.card_arch = NV10A; 405 sprintf(si->adi.name, "Nvidia Quadro2 MXR/EX/Go"); 406 sprintf(si->adi.chipset, "NV11"); 407 status = nvxx_general_powerup(); 408 break; 409 case 0x014010de: /* Nvidia Geforce FX 6600 GT */ 410 case 0x014110de: /* Nvidia Geforce FX 6600 */ 411 case 0x014210de: /* Nvidia Geforce FX 6600LE */ 412 si->ps.card_type = NV43; 413 si->ps.card_arch = NV40A; 414 sprintf(si->adi.name, "Nvidia Geforce FX 6600"); 415 sprintf(si->adi.chipset, "NV43"); 416 status = nvxx_general_powerup(); 417 break; 418 case 0x014310de: /* Nvidia Geforce 6600 VE */ 419 si->ps.card_type = NV43; 420 si->ps.card_arch = NV40A; 421 sprintf(si->adi.name, "Nvidia Geforce 6600 VE"); 422 sprintf(si->adi.chipset, "NV43"); 423 status = nvxx_general_powerup(); 424 break; 425 case 0x014410de: /* Nvidia Geforce FX 6600 Go */ 426 si->ps.card_type = NV43; 427 si->ps.card_arch = NV40A; 428 si->ps.laptop = true; 429 sprintf(si->adi.name, "Nvidia Geforce FX 6600 Go"); 430 sprintf(si->adi.chipset, "NV43"); 431 status = nvxx_general_powerup(); 432 break; 433 case 0x014510de: /* Nvidia Geforce FX 6610 XL */ 434 si->ps.card_type = NV43; 435 si->ps.card_arch = NV40A; 436 sprintf(si->adi.name, "Nvidia Geforce FX 6610 XL"); 437 sprintf(si->adi.chipset, "NV43"); 438 status = nvxx_general_powerup(); 439 break; 440 case 0x014710de: /* Nvidia Geforce FX 6700 XL */ 441 si->ps.card_type = NV43; 442 si->ps.card_arch = NV40A; 443 sprintf(si->adi.name, "Nvidia Geforce FX 6700 XL"); 444 sprintf(si->adi.chipset, "NV43"); 445 status = nvxx_general_powerup(); 446 break; 447 case 0x014610de: /* Nvidia Geforce FX 6600 TE Go / 6200 TE Go */ 448 case 0x014810de: /* Nvidia Geforce FX 6600 Go */ 449 case 0x014910de: /* Nvidia Geforce FX 6600 GT Go */ 450 si->ps.card_type = NV43; 451 si->ps.card_arch = NV40A; 452 si->ps.laptop = true; 453 sprintf(si->adi.name, "Nvidia Geforce FX 6600Go/6200Go"); 454 sprintf(si->adi.chipset, "NV43"); 455 status = nvxx_general_powerup(); 456 break; 457 case 0x014b10de: /* Nvidia unknown FX */ 458 case 0x014c10de: /* Nvidia Quadro FX 540 MXM */ 459 case 0x014d10de: /* Nvidia unknown FX */ 460 si->ps.card_type = NV43; 461 si->ps.card_arch = NV40A; 462 sprintf(si->adi.name, "Nvidia Quadro FX"); 463 sprintf(si->adi.chipset, "NV43"); 464 status = nvxx_general_powerup(); 465 break; 466 case 0x014e10de: /* Nvidia Quadro FX 540 */ 467 si->ps.card_type = NV43; 468 si->ps.card_arch = NV40A; 469 sprintf(si->adi.name, "Nvidia Quadro FX 540"); 470 sprintf(si->adi.chipset, "NV43"); 471 status = nvxx_general_powerup(); 472 break; 473 case 0x014f10de: /* Nvidia Geforce 6200 PCIe (128Mb) */ 474 si->ps.card_type = NV44; 475 si->ps.card_arch = NV40A; 476 sprintf(si->adi.name, "Nvidia Geforce 6200 PCIe 128Mb"); 477 sprintf(si->adi.chipset, "NV44"); 478 status = nvxx_general_powerup(); 479 break; 480 case 0x015010de: /* Nvidia Geforce2 GTS/Pro */ 481 case 0x015110de: /* Nvidia Geforce2 Ti DDR */ 482 case 0x015210de: /* Nvidia Geforce2 Ultra */ 483 si->ps.card_type = NV15; 484 si->ps.card_arch = NV10A; 485 sprintf(si->adi.name, "Nvidia Geforce2"); 486 sprintf(si->adi.chipset, "NV15"); 487 status = nvxx_general_powerup(); 488 break; 489 case 0x015310de: /* Nvidia Quadro2 Pro */ 490 si->ps.card_type = NV15; 491 si->ps.card_arch = NV10A; 492 sprintf(si->adi.name, "Nvidia Quadro2 Pro"); 493 sprintf(si->adi.chipset, "NV15"); 494 status = nvxx_general_powerup(); 495 break; 496 case 0x016010de: /* Nvidia Geforce 6500 Go */ 497 si->ps.card_type = NV44; 498 si->ps.card_arch = NV40A; 499 si->ps.laptop = true; 500 sprintf(si->adi.name, "Nvidia Geforce 6500 Go"); 501 sprintf(si->adi.chipset, "NV44"); 502 status = nvxx_general_powerup(); 503 break; 504 case 0x016110de: /* Nvidia Geforce 6200 TurboCache */ 505 si->ps.card_type = NV44; 506 si->ps.card_arch = NV40A; 507 sprintf(si->adi.name, "Nvidia Geforce 6200 TC"); 508 sprintf(si->adi.chipset, "NV44"); 509 status = nvxx_general_powerup(); 510 break; 511 case 0x016210de: /* Nvidia Geforce 6200SE TurboCache */ 512 si->ps.card_type = NV44; 513 si->ps.card_arch = NV40A; 514 sprintf(si->adi.name, "Nvidia Geforce 6200SE TC"); 515 sprintf(si->adi.chipset, "NV44"); 516 status = nvxx_general_powerup(); 517 break; 518 case 0x016310de: /* Nvidia Geforce 6200LE */ 519 si->ps.card_type = NV44; 520 si->ps.card_arch = NV40A; 521 sprintf(si->adi.name, "Nvidia Geforce 6200LE"); 522 sprintf(si->adi.chipset, "NV44"); 523 status = nvxx_general_powerup(); 524 break; 525 case 0x016410de: /* Nvidia Geforce FX 6200 Go */ 526 si->ps.card_type = NV44; 527 si->ps.card_arch = NV40A; 528 si->ps.laptop = true; 529 sprintf(si->adi.name, "Nvidia Geforce FX 6200 Go"); 530 sprintf(si->adi.chipset, "NV44"); 531 status = nvxx_general_powerup(); 532 break; 533 case 0x016510de: /* Nvidia Quadro FX NVS 285 */ 534 si->ps.card_type = NV44; 535 si->ps.card_arch = NV40A; 536 sprintf(si->adi.name, "Nvidia Quadro FX NVS 285"); 537 sprintf(si->adi.chipset, "NV44"); 538 status = nvxx_general_powerup(); 539 break; 540 case 0x016610de: /* Nvidia Geforce 6400 Go */ 541 si->ps.card_type = NV44; 542 si->ps.card_arch = NV40A; 543 si->ps.laptop = true; 544 sprintf(si->adi.name, "Nvidia Geforce 6400 Go"); 545 sprintf(si->adi.chipset, "NV44"); 546 status = nvxx_general_powerup(); 547 break; 548 case 0x016710de: /* Nvidia Geforce 6200 Go */ 549 si->ps.card_type = NV44; 550 si->ps.card_arch = NV40A; 551 si->ps.laptop = true; 552 sprintf(si->adi.name, "Nvidia Geforce 6200 Go"); 553 sprintf(si->adi.chipset, "NV44"); 554 status = nvxx_general_powerup(); 555 break; 556 case 0x016810de: /* Nvidia Geforce 6400 Go */ 557 si->ps.card_type = NV44; 558 si->ps.card_arch = NV40A; 559 si->ps.laptop = true; 560 sprintf(si->adi.name, "Nvidia Geforce 6400 Go"); 561 sprintf(si->adi.chipset, "NV44"); 562 status = nvxx_general_powerup(); 563 break; 564 case 0x016910de: /* Nvidia Geforce 6250 Go */ 565 si->ps.card_type = NV44; 566 si->ps.card_arch = NV40A; 567 si->ps.laptop = true; 568 sprintf(si->adi.name, "Nvidia Geforce 6250 Go"); 569 sprintf(si->adi.chipset, "NV44"); 570 status = nvxx_general_powerup(); 571 break; 572 case 0x016a10de: /* Nvidia 7100 GS */ 573 si->ps.card_type = NV44; 574 si->ps.card_arch = NV40A; 575 sprintf(si->adi.name, "Nvidia Geforce 7100 GS"); 576 sprintf(si->adi.chipset, "NV44"); 577 status = nvxx_general_powerup(); 578 break; 579 case 0x016b10de: /* Nvidia unknown FX Go */ 580 case 0x016c10de: /* Nvidia unknown FX Go */ 581 case 0x016d10de: /* Nvidia unknown FX Go */ 582 si->ps.card_type = NV44; 583 si->ps.card_arch = NV40A; 584 si->ps.laptop = true; 585 sprintf(si->adi.name, "Nvidia unknown FX Go"); 586 sprintf(si->adi.chipset, "NV44"); 587 status = nvxx_general_powerup(); 588 break; 589 case 0x016e10de: /* Nvidia unknown FX */ 590 si->ps.card_type = NV44; 591 si->ps.card_arch = NV40A; 592 sprintf(si->adi.name, "Nvidia unknown FX"); 593 sprintf(si->adi.chipset, "NV44"); 594 status = nvxx_general_powerup(); 595 break; 596 case 0x017010de: /* Nvidia Geforce4 MX 460 */ 597 case 0x017110de: /* Nvidia Geforce4 MX 440 */ 598 case 0x017210de: /* Nvidia Geforce4 MX 420 */ 599 case 0x017310de: /* Nvidia Geforce4 MX 440SE */ 600 si->ps.card_type = NV17; 601 si->ps.card_arch = NV10A; 602 sprintf(si->adi.name, "Nvidia Geforce4 MX"); 603 sprintf(si->adi.chipset, "NV17"); 604 status = nvxx_general_powerup(); 605 break; 606 case 0x017410de: /* Nvidia Geforce4 440 Go */ 607 case 0x017510de: /* Nvidia Geforce4 420 Go */ 608 case 0x017610de: /* Nvidia Geforce4 420 Go 32M */ 609 case 0x017710de: /* Nvidia Geforce4 460 Go */ 610 case 0x017910de: /* Nvidia Geforce4 440 Go 64M (on PPC Geforce4 MX) */ 611 si->ps.card_type = NV17; 612 si->ps.card_arch = NV10A; 613 si->ps.laptop = true; 614 sprintf(si->adi.name, "Nvidia Geforce4 Go"); 615 sprintf(si->adi.chipset, "NV17"); 616 status = nvxx_general_powerup(); 617 break; 618 case 0x017810de: /* Nvidia Quadro4 500 XGL/550 XGL */ 619 case 0x017a10de: /* Nvidia Quadro4 200 NVS/400 NVS */ 620 si->ps.card_type = NV17; 621 si->ps.card_arch = NV10A; 622 sprintf(si->adi.name, "Nvidia Quadro4"); 623 sprintf(si->adi.chipset, "NV17"); 624 status = nvxx_general_powerup(); 625 break; 626 case 0x017c10de: /* Nvidia Quadro4 500 GoGL */ 627 si->ps.card_type = NV17; 628 si->ps.card_arch = NV10A; 629 si->ps.laptop = true; 630 sprintf(si->adi.name, "Nvidia Quadro4 500 GoGL"); 631 sprintf(si->adi.chipset, "NV17"); 632 status = nvxx_general_powerup(); 633 break; 634 case 0x017d10de: /* Nvidia Geforce4 410 Go 16M*/ 635 si->ps.card_type = NV17; 636 si->ps.card_arch = NV10A; 637 si->ps.laptop = true; 638 sprintf(si->adi.name, "Nvidia Geforce4 410 Go"); 639 sprintf(si->adi.chipset, "NV17"); 640 status = nvxx_general_powerup(); 641 break; 642 case 0x018110de: /* Nvidia Geforce4 MX 440 AGP8X */ 643 case 0x018210de: /* Nvidia Geforce4 MX 440SE AGP8X */ 644 case 0x018310de: /* Nvidia Geforce4 MX 420 AGP8X */ 645 case 0x018510de: /* Nvidia Geforce4 MX 4000 AGP8X */ 646 si->ps.card_type = NV18; 647 si->ps.card_arch = NV10A; 648 sprintf(si->adi.name, "Nvidia Geforce4 MX AGP8X"); 649 sprintf(si->adi.chipset, "NV18"); 650 status = nvxx_general_powerup(); 651 break; 652 case 0x018610de: /* Nvidia Geforce4 448 Go */ 653 case 0x018710de: /* Nvidia Geforce4 488 Go */ 654 si->ps.card_type = NV18; 655 si->ps.card_arch = NV10A; 656 si->ps.laptop = true; 657 sprintf(si->adi.name, "Nvidia Geforce4 Go"); 658 sprintf(si->adi.chipset, "NV18"); 659 status = nvxx_general_powerup(); 660 break; 661 case 0x018810de: /* Nvidia Quadro4 580 XGL */ 662 si->ps.card_type = NV18; 663 si->ps.card_arch = NV10A; 664 sprintf(si->adi.name, "Nvidia Quadro4"); 665 sprintf(si->adi.chipset, "NV18"); 666 status = nvxx_general_powerup(); 667 break; 668 case 0x018910de: /* Nvidia Geforce4 MX AGP8X (PPC) */ 669 si->ps.card_type = NV18; 670 si->ps.card_arch = NV10A; 671 sprintf(si->adi.name, "Nvidia Geforce4 MX AGP8X"); 672 sprintf(si->adi.chipset, "NV18"); 673 status = nvxx_general_powerup(); 674 break; 675 case 0x018a10de: /* Nvidia Quadro4 280 NVS AGP8X */ 676 case 0x018b10de: /* Nvidia Quadro4 380 XGL */ 677 case 0x018c10de: /* Nvidia Quadro4 NVS 50 PCI */ 678 si->ps.card_type = NV18; 679 si->ps.card_arch = NV10A; 680 sprintf(si->adi.name, "Nvidia Quadro4"); 681 sprintf(si->adi.chipset, "NV18"); 682 status = nvxx_general_powerup(); 683 break; 684 case 0x018d10de: /* Nvidia Geforce4 448 Go */ 685 si->ps.card_type = NV18; 686 si->ps.card_arch = NV10A; 687 si->ps.laptop = true; 688 sprintf(si->adi.name, "Nvidia Geforce4 Go"); 689 sprintf(si->adi.chipset, "NV18"); 690 status = nvxx_general_powerup(); 691 break; 692 case 0x01a010de: /* Nvidia Geforce2 Integrated GPU */ 693 si->ps.card_type = NV11; 694 si->ps.card_arch = NV10A; 695 sprintf(si->adi.name, "Nvidia Geforce2 Integrated GPU"); 696 sprintf(si->adi.chipset, "CRUSH, NV11"); 697 status = nvxx_general_powerup(); 698 break; 699 case 0x01d110de: /* Nvidia Geforce 7300 LE */ 700 case 0x01d310de: /* Nvidia Geforce 7300 SE */ 701 case 0x01df10de: /* Nvidia Geforce 7300 GS */ 702 si->ps.card_type = G72; 703 si->ps.card_arch = NV40A; 704 sprintf(si->adi.name, "Nvidia Geforce 7300"); 705 sprintf(si->adi.chipset, "G72"); 706 status = nvxx_general_powerup(); 707 break; 708 case 0x01d710de: /* Nvidia Quadro NVS 110M/Geforce 7300 Go */ 709 si->ps.card_type = G72; 710 si->ps.card_arch = NV40A; 711 si->ps.laptop = true; 712 sprintf(si->adi.name, "Nvidia Quadro NVS M/GF 7300 Go"); 713 sprintf(si->adi.chipset, "G72"); 714 status = nvxx_general_powerup(); 715 break; 716 case 0x01d810de: /* Nvidia Geforce 7400 Go */ 717 si->ps.card_type = G72; 718 si->ps.card_arch = NV40A; 719 si->ps.laptop = true; 720 sprintf(si->adi.name, "Nvidia Geforce 7400 Go"); 721 sprintf(si->adi.chipset, "G72"); 722 status = nvxx_general_powerup(); 723 break; 724 case 0x01dd10de: /* Nvidia Geforce 7500 LE */ 725 si->ps.card_type = G72; 726 si->ps.card_arch = NV40A; 727 sprintf(si->adi.name, "Nvidia Geforce 7500 LE"); 728 sprintf(si->adi.chipset, "G72"); 729 status = nvxx_general_powerup(); 730 break; 731 case 0x01f010de: /* Nvidia Geforce4 MX Integrated GPU */ 732 si->ps.card_type = NV17; 733 si->ps.card_arch = NV10A; 734 sprintf(si->adi.name, "Nvidia Geforce4 MX Integr. GPU"); 735 sprintf(si->adi.chipset, "NFORCE2, NV17"); 736 status = nvxx_general_powerup(); 737 break; 738 case 0x020010de: /* Nvidia Geforce3 */ 739 case 0x020110de: /* Nvidia Geforce3 Ti 200 */ 740 case 0x020210de: /* Nvidia Geforce3 Ti 500 */ 741 si->ps.card_type = NV20; 742 si->ps.card_arch = NV20A; 743 sprintf(si->adi.name, "Nvidia Geforce3"); 744 sprintf(si->adi.chipset, "NV20"); 745 status = nvxx_general_powerup(); 746 break; 747 case 0x020310de: /* Nvidia Quadro DCC */ 748 si->ps.card_type = NV20; 749 si->ps.card_arch = NV20A; 750 sprintf(si->adi.name, "Nvidia Quadro DCC"); 751 sprintf(si->adi.chipset, "NV20"); 752 status = nvxx_general_powerup(); 753 break; 754 case 0x021110de: /* Nvidia Geforce FX 6800 */ 755 case 0x021210de: /* Nvidia Geforce FX 6800LE */ 756 case 0x021510de: /* Nvidia Geforce FX 6800 GT */ 757 si->ps.card_type = NV45; /* NV48 is NV45 with 512Mb */ 758 si->ps.card_arch = NV40A; 759 sprintf(si->adi.name, "Nvidia Geforce FX 6800"); 760 sprintf(si->adi.chipset, "NV48"); 761 status = nvxx_general_powerup(); 762 break; 763 case 0x021810de: /* Nvidia Geforce 6800 XT */ 764 si->ps.card_type = NV40; 765 si->ps.card_arch = NV40A; 766 sprintf(si->adi.name, "Nvidia Geforce 6800 XT"); 767 sprintf(si->adi.chipset, "NV40"); 768 status = nvxx_general_powerup(); 769 break; 770 case 0x022010de: /* Nvidia unknown FX */ 771 si->ps.card_type = NV44; 772 si->ps.card_arch = NV40A; 773 sprintf(si->adi.name, "Nvidia unknown FX"); 774 sprintf(si->adi.chipset, "NV44"); 775 status = nvxx_general_powerup(); 776 break; 777 case 0x022110de: /* Nvidia Geforce 6200 AGP (256Mb - 128bit) */ 778 si->ps.card_type = NV44; 779 si->ps.card_arch = NV40A; 780 sprintf(si->adi.name, "Nvidia Geforce 6200 AGP 256Mb"); 781 sprintf(si->adi.chipset, "NV44"); 782 status = nvxx_general_powerup(); 783 break; 784 case 0x022210de: /* Nvidia unknown FX */ 785 si->ps.card_type = NV44; 786 si->ps.card_arch = NV40A; 787 sprintf(si->adi.name, "Nvidia unknown FX"); 788 sprintf(si->adi.chipset, "NV44"); 789 status = nvxx_general_powerup(); 790 break; 791 case 0x022810de: /* Nvidia unknown FX Go */ 792 si->ps.card_type = NV44; 793 si->ps.card_arch = NV40A; 794 si->ps.laptop = true; 795 sprintf(si->adi.name, "Nvidia unknown FX Go"); 796 sprintf(si->adi.chipset, "NV44"); 797 status = nvxx_general_powerup(); 798 break; 799 case 0x024010de: /* Nvidia Geforce 6150 (NFORCE4 Integr.GPU) */ 800 si->ps.card_type = NV44; 801 si->ps.card_arch = NV40A; 802 sprintf(si->adi.name, "Nvidia Geforce 6150, C51PV"); 803 sprintf(si->adi.chipset, "NV44"); 804 status = nvxx_general_powerup(); 805 break; 806 case 0x024110de: /* Nvidia Geforce 6150 LE (NFORCE4 Integr.GPU) */ 807 si->ps.card_type = NV44; 808 si->ps.card_arch = NV40A; 809 sprintf(si->adi.name, "Nvidia Geforce 6150, C51"); 810 sprintf(si->adi.chipset, "NV44"); 811 status = nvxx_general_powerup(); 812 break; 813 case 0x024210de: /* Nvidia Geforce 6100 (NFORCE4 Integr.GPU) */ 814 si->ps.card_type = NV44; 815 si->ps.card_arch = NV40A; 816 sprintf(si->adi.name, "Nvidia Geforce 6100, C51G"); 817 sprintf(si->adi.chipset, "NV44"); 818 status = nvxx_general_powerup(); 819 break; 820 case 0x024410de: /* Nvidia Geforce 6150 Go (NFORCE4 Integr.GPU) */ 821 si->ps.card_type = NV44; 822 si->ps.card_arch = NV40A; 823 si->ps.laptop = true; 824 sprintf(si->adi.name, "Nvidia Geforce 6150 Go, C51"); 825 sprintf(si->adi.chipset, "NV44"); 826 status = nvxx_general_powerup(); 827 break; 828 case 0x024510de: /* Nvidia Quadro NVS 210S / NVIDIA Geforce 6150LE (NFORCE4 Integr.GPU) */ 829 si->ps.card_type = NV44; 830 si->ps.card_arch = NV40A; 831 sprintf(si->adi.name, "Nvidia Geforce 6150, C51"); 832 sprintf(si->adi.chipset, "NV44"); 833 status = nvxx_general_powerup(); 834 break; 835 case 0x024710de: /* Nvidia Geforce 6100 Go (NFORCE4 Integr.GPU) */ 836 si->ps.card_type = NV44; 837 si->ps.card_arch = NV40A; 838 si->ps.laptop = true; 839 sprintf(si->adi.name, "Nvidia Geforce 6100 Go, C51"); 840 sprintf(si->adi.chipset, "NV44"); 841 status = nvxx_general_powerup(); 842 break; 843 case 0x025010de: /* Nvidia Geforce4 Ti 4600 */ 844 case 0x025110de: /* Nvidia Geforce4 Ti 4400 */ 845 case 0x025210de: /* Nvidia Geforce4 Ti 4600 */ 846 case 0x025310de: /* Nvidia Geforce4 Ti 4200 */ 847 si->ps.card_type = NV25; 848 si->ps.card_arch = NV20A; 849 sprintf(si->adi.name, "Nvidia Geforce4 Ti"); 850 sprintf(si->adi.chipset, "NV25"); 851 status = nvxx_general_powerup(); 852 break; 853 case 0x025810de: /* Nvidia Quadro4 900 XGL */ 854 case 0x025910de: /* Nvidia Quadro4 750 XGL */ 855 case 0x025b10de: /* Nvidia Quadro4 700 XGL */ 856 si->ps.card_type = NV25; 857 si->ps.card_arch = NV20A; 858 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 859 sprintf(si->adi.chipset, "NV25"); 860 status = nvxx_general_powerup(); 861 break; 862 case 0x028010de: /* Nvidia Geforce4 Ti 4800 AGP8X */ 863 case 0x028110de: /* Nvidia Geforce4 Ti 4200 AGP8X */ 864 si->ps.card_type = NV28; 865 si->ps.card_arch = NV20A; 866 sprintf(si->adi.name, "Nvidia Geforce4 Ti AGP8X"); 867 sprintf(si->adi.chipset, "NV28"); 868 status = nvxx_general_powerup(); 869 break; 870 case 0x028210de: /* Nvidia Geforce4 Ti 4800SE */ 871 si->ps.card_type = NV28; 872 si->ps.card_arch = NV20A; 873 sprintf(si->adi.name, "Nvidia Geforce4 Ti 4800SE"); 874 sprintf(si->adi.chipset, "NV28"); 875 status = nvxx_general_powerup(); 876 break; 877 case 0x028610de: /* Nvidia Geforce4 4200 Go */ 878 si->ps.card_type = NV28; 879 si->ps.card_arch = NV20A; 880 si->ps.laptop = true; 881 sprintf(si->adi.name, "Nvidia Geforce4 4200 Go"); 882 sprintf(si->adi.chipset, "NV28"); 883 status = nvxx_general_powerup(); 884 break; 885 case 0x028810de: /* Nvidia Quadro4 980 XGL */ 886 case 0x028910de: /* Nvidia Quadro4 780 XGL */ 887 si->ps.card_type = NV28; 888 si->ps.card_arch = NV20A; 889 sprintf(si->adi.name, "Nvidia Quadro4 XGL"); 890 sprintf(si->adi.chipset, "NV28"); 891 status = nvxx_general_powerup(); 892 break; 893 case 0x028c10de: /* Nvidia Quadro4 700 GoGL */ 894 si->ps.card_type = NV28; 895 si->ps.card_arch = NV20A; 896 si->ps.laptop = true; 897 sprintf(si->adi.name, "Nvidia Quadro4 700 GoGL"); 898 sprintf(si->adi.chipset, "NV28"); 899 status = nvxx_general_powerup(); 900 break; 901 case 0x029010de: /* Nvidia Geforce 7900 GTX */ 902 case 0x029110de: /* Nvidia Geforce 7900 GT */ 903 case 0x029210de: /* Nvidia Geforce 7900 GS */ 904 case 0x029310de: /* Nvidia Geforce 7900 GX2 */ 905 si->ps.card_type = G71; 906 si->ps.card_arch = NV40A; 907 sprintf(si->adi.name, "Nvidia Geforce 7900"); 908 sprintf(si->adi.chipset, "G71"); 909 status = nvxx_general_powerup(); 910 break; 911 case 0x029410de: /* Nvidia Geforce 7950 GX2 */ 912 case 0x029510de: /* Nvidia Geforce 7950 GT */ 913 si->ps.card_type = G71; 914 si->ps.card_arch = NV40A; 915 sprintf(si->adi.name, "Nvidia Geforce 7950"); 916 sprintf(si->adi.chipset, "G71"); 917 status = nvxx_general_powerup(); 918 break; 919 case 0x029810de: /* Nvidia Geforce Go 7900 GS */ 920 case 0x029910de: /* Nvidia Geforce Go 7900 GTX */ 921 si->ps.card_type = G71; 922 si->ps.card_arch = NV40A; 923 si->ps.laptop = true; 924 sprintf(si->adi.name, "Nvidia Geforce Go 7900"); 925 sprintf(si->adi.chipset, "G71"); 926 status = nvxx_general_powerup(); 927 break; 928 case 0x029c10de: /* Nvidia Quadro FX 5500 */ 929 si->ps.card_type = G71; 930 si->ps.card_arch = NV40A; 931 sprintf(si->adi.name, "Nvidia Quadro FX 5500"); 932 sprintf(si->adi.chipset, "G71"); 933 status = nvxx_general_powerup(); 934 break; 935 case 0x029f10de: /* Nvidia Quadro FX 4500 X2 */ 936 si->ps.card_type = G70; 937 si->ps.card_arch = NV40A; 938 sprintf(si->adi.name, "Nvidia Quadro FX 4500 X2"); 939 sprintf(si->adi.chipset, "G70"); 940 status = nvxx_general_powerup(); 941 break; 942 case 0x02a010de: /* Nvidia Geforce3 Integrated GPU */ 943 si->ps.card_type = NV20; 944 si->ps.card_arch = NV20A; 945 sprintf(si->adi.name, "Nvidia Geforce3 Integrated GPU"); 946 sprintf(si->adi.chipset, "XBOX, NV20"); 947 status = nvxx_general_powerup(); 948 break; 949 case 0x02e010de: /* Nvidia Geforce 7600 GT */ 950 case 0x02e110de: /* Nvidia Geforce 7600 GS */ 951 si->ps.card_type = G73; 952 si->ps.card_arch = NV40A; 953 sprintf(si->adi.name, "Nvidia Geforce 7600"); 954 sprintf(si->adi.chipset, "G73"); 955 status = nvxx_general_powerup(); 956 break; 957 case 0x02e210de: /* Nvidia Geforce 7300 GT */ 958 si->ps.card_type = G73; 959 si->ps.card_arch = NV40A; 960 sprintf(si->adi.name, "Nvidia GeForce 7300 GT"); 961 sprintf(si->adi.chipset, "G73"); 962 status = nvxx_general_powerup(); 963 break; 964 case 0x030110de: /* Nvidia Geforce FX 5800 Ultra */ 965 case 0x030210de: /* Nvidia Geforce FX 5800 */ 966 si->ps.card_type = NV30; 967 si->ps.card_arch = NV30A; 968 sprintf(si->adi.name, "Nvidia Geforce FX 5800"); 969 sprintf(si->adi.chipset, "NV30"); 970 status = nvxx_general_powerup(); 971 break; 972 case 0x030810de: /* Nvidia Quadro FX 2000 */ 973 case 0x030910de: /* Nvidia Quadro FX 1000 */ 974 si->ps.card_type = NV30; 975 si->ps.card_arch = NV30A; 976 sprintf(si->adi.name, "Nvidia Quadro FX"); 977 sprintf(si->adi.chipset, "NV30"); 978 status = nvxx_general_powerup(); 979 break; 980 case 0x031110de: /* Nvidia Geforce FX 5600 Ultra */ 981 case 0x031210de: /* Nvidia Geforce FX 5600 */ 982 si->ps.card_type = NV31; 983 si->ps.card_arch = NV30A; 984 sprintf(si->adi.name, "Nvidia Geforce FX 5600"); 985 sprintf(si->adi.chipset, "NV31"); 986 status = nvxx_general_powerup(); 987 break; 988 case 0x031310de: /* Nvidia unknown FX */ 989 si->ps.card_type = NV31; 990 si->ps.card_arch = NV30A; 991 sprintf(si->adi.name, "Nvidia unknown FX"); 992 sprintf(si->adi.chipset, "NV31"); 993 status = nvxx_general_powerup(); 994 break; 995 case 0x031410de: /* Nvidia Geforce FX 5600XT */ 996 si->ps.card_type = NV31; 997 si->ps.card_arch = NV30A; 998 sprintf(si->adi.name, "Nvidia Geforce FX 5600XT"); 999 sprintf(si->adi.chipset, "NV31"); 1000 status = nvxx_general_powerup(); 1001 break; 1002 case 0x031610de: /* Nvidia unknown FX Go */ 1003 case 0x031710de: /* Nvidia unknown FX Go */ 1004 si->ps.card_type = NV31; 1005 si->ps.card_arch = NV30A; 1006 si->ps.laptop = true; 1007 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1008 sprintf(si->adi.chipset, "NV31"); 1009 status = nvxx_general_powerup(); 1010 break; 1011 case 0x031a10de: /* Nvidia Geforce FX 5600 Go */ 1012 si->ps.card_type = NV31; 1013 si->ps.card_arch = NV30A; 1014 si->ps.laptop = true; 1015 sprintf(si->adi.name, "Nvidia Geforce FX 5600 Go"); 1016 sprintf(si->adi.chipset, "NV31"); 1017 status = nvxx_general_powerup(); 1018 break; 1019 case 0x031b10de: /* Nvidia Geforce FX 5650 Go */ 1020 si->ps.card_type = NV31; 1021 si->ps.card_arch = NV30A; 1022 si->ps.laptop = true; 1023 sprintf(si->adi.name, "Nvidia Geforce FX 5650 Go"); 1024 sprintf(si->adi.chipset, "NV31"); 1025 status = nvxx_general_powerup(); 1026 break; 1027 case 0x031c10de: /* Nvidia Quadro FX 700 Go */ 1028 si->ps.card_type = NV31; 1029 si->ps.card_arch = NV30A; 1030 si->ps.laptop = true; 1031 sprintf(si->adi.name, "Nvidia Quadro FX 700 Go"); 1032 sprintf(si->adi.chipset, "NV31"); 1033 status = nvxx_general_powerup(); 1034 break; 1035 case 0x031d10de: /* Nvidia unknown FX Go */ 1036 case 0x031e10de: /* Nvidia unknown FX Go */ 1037 case 0x031f10de: /* Nvidia unknown FX Go */ 1038 si->ps.card_type = NV31; 1039 si->ps.card_arch = NV30A; 1040 si->ps.laptop = true; 1041 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1042 sprintf(si->adi.chipset, "NV31"); 1043 status = nvxx_general_powerup(); 1044 break; 1045 case 0x032010de: /* Nvidia Geforce FX 5200 */ 1046 case 0x032110de: /* Nvidia Geforce FX 5200 Ultra */ 1047 case 0x032210de: /* Nvidia Geforce FX 5200 */ 1048 case 0x032310de: /* Nvidia Geforce FX 5200LE */ 1049 si->ps.card_type = NV34; 1050 si->ps.card_arch = NV30A; 1051 sprintf(si->adi.name, "Nvidia Geforce FX 5200"); 1052 sprintf(si->adi.chipset, "NV34"); 1053 status = nvxx_general_powerup(); 1054 break; 1055 case 0x032410de: /* Nvidia Geforce FX 5200 Go */ 1056 si->ps.card_type = NV34; 1057 si->ps.card_arch = NV30A; 1058 si->ps.laptop = true; 1059 sprintf(si->adi.name, "Nvidia Geforce FX 5200 Go"); 1060 sprintf(si->adi.chipset, "NV34"); 1061 status = nvxx_general_powerup(); 1062 break; 1063 case 0x032510de: /* Nvidia Geforce FX 5250 Go */ 1064 si->ps.card_type = NV34; 1065 si->ps.card_arch = NV30A; 1066 si->ps.laptop = true; 1067 sprintf(si->adi.name, "Nvidia Geforce FX 5250 Go"); 1068 sprintf(si->adi.chipset, "NV34"); 1069 status = nvxx_general_powerup(); 1070 break; 1071 case 0x032610de: /* Nvidia Geforce FX 5500 */ 1072 si->ps.card_type = NV34; 1073 si->ps.card_arch = NV30A; 1074 sprintf(si->adi.name, "Nvidia Geforce FX 5500"); 1075 sprintf(si->adi.chipset, "NV34"); 1076 status = nvxx_general_powerup(); 1077 break; 1078 case 0x032710de: /* Nvidia Geforce FX 5100 */ 1079 si->ps.card_type = NV34; 1080 si->ps.card_arch = NV30A; 1081 sprintf(si->adi.name, "Nvidia Geforce FX 5100"); 1082 sprintf(si->adi.chipset, "NV34"); 1083 status = nvxx_general_powerup(); 1084 break; 1085 case 0x032810de: /* Nvidia Geforce FX 5200 Go 32M/64M */ 1086 si->ps.card_type = NV34; 1087 si->ps.card_arch = NV30A; 1088 si->ps.laptop = true; 1089 sprintf(si->adi.name, "Nvidia Geforce FX 5200 Go"); 1090 sprintf(si->adi.chipset, "NV34"); 1091 status = nvxx_general_powerup(); 1092 break; 1093 case 0x032910de: /* Nvidia Geforce FX 5200 (PPC) */ 1094 si->ps.card_type = NV34; 1095 si->ps.card_arch = NV30A; 1096 sprintf(si->adi.name, "Nvidia Geforce FX 5200"); 1097 sprintf(si->adi.chipset, "NV34"); 1098 status = nvxx_general_powerup(); 1099 break; 1100 case 0x032a10de: /* Nvidia Quadro NVS 280 PCI */ 1101 si->ps.card_type = NV34; 1102 si->ps.card_arch = NV30A; 1103 sprintf(si->adi.name, "Nvidia Quadro NVS 280 PCI"); 1104 sprintf(si->adi.chipset, "NV34"); 1105 status = nvxx_general_powerup(); 1106 break; 1107 case 0x032b10de: /* Nvidia Quadro FX 500/600 PCI */ 1108 si->ps.card_type = NV34; 1109 si->ps.card_arch = NV30A; 1110 sprintf(si->adi.name, "Nvidia Quadro FX 500/600 PCI"); 1111 sprintf(si->adi.chipset, "NV34"); 1112 status = nvxx_general_powerup(); 1113 break; 1114 case 0x032c10de: /* Nvidia Geforce FX 5300 Go */ 1115 case 0x032d10de: /* Nvidia Geforce FX 5100 Go */ 1116 si->ps.card_type = NV34; 1117 si->ps.card_arch = NV30A; 1118 si->ps.laptop = true; 1119 sprintf(si->adi.name, "Nvidia Geforce FX Go"); 1120 sprintf(si->adi.chipset, "NV34"); 1121 status = nvxx_general_powerup(); 1122 break; 1123 case 0x032e10de: /* Nvidia unknown FX Go */ 1124 case 0x032f10de: /* Nvidia unknown FX Go */ 1125 si->ps.card_type = NV34; 1126 si->ps.card_arch = NV30A; 1127 si->ps.laptop = true; 1128 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1129 sprintf(si->adi.chipset, "NV34"); 1130 status = nvxx_general_powerup(); 1131 break; 1132 case 0x033010de: /* Nvidia Geforce FX 5900 Ultra */ 1133 case 0x033110de: /* Nvidia Geforce FX 5900 */ 1134 si->ps.card_type = NV35; 1135 si->ps.card_arch = NV30A; 1136 sprintf(si->adi.name, "Nvidia Geforce FX 5900"); 1137 sprintf(si->adi.chipset, "NV35"); 1138 status = nvxx_general_powerup(); 1139 break; 1140 case 0x033210de: /* Nvidia Geforce FX 5900 XT */ 1141 si->ps.card_type = NV35; 1142 si->ps.card_arch = NV30A; 1143 sprintf(si->adi.name, "Nvidia Geforce FX 5900 XT"); 1144 sprintf(si->adi.chipset, "NV35"); 1145 status = nvxx_general_powerup(); 1146 break; 1147 case 0x033310de: /* Nvidia Geforce FX 5950 Ultra */ 1148 si->ps.card_type = NV38; 1149 si->ps.card_arch = NV30A; 1150 sprintf(si->adi.name, "Nvidia Geforce FX 5950 Ultra"); 1151 sprintf(si->adi.chipset, "NV38"); 1152 status = nvxx_general_powerup(); 1153 break; 1154 case 0x033410de: /* Nvidia Geforce FX 5900 ZT */ 1155 si->ps.card_type = NV38; 1156 si->ps.card_arch = NV30A; 1157 sprintf(si->adi.name, "Nvidia Geforce FX 5900 ZT"); 1158 sprintf(si->adi.chipset, "NV38(?)"); 1159 status = nvxx_general_powerup(); 1160 break; 1161 case 0x033810de: /* Nvidia Quadro FX 3000 */ 1162 si->ps.card_type = NV35; 1163 si->ps.card_arch = NV30A; 1164 sprintf(si->adi.name, "Nvidia Quadro FX 3000"); 1165 sprintf(si->adi.chipset, "NV35"); 1166 status = nvxx_general_powerup(); 1167 break; 1168 case 0x033f10de: /* Nvidia Quadro FX 700 */ 1169 si->ps.card_type = NV35; 1170 si->ps.card_arch = NV30A; 1171 sprintf(si->adi.name, "Nvidia Quadro FX 700"); 1172 sprintf(si->adi.chipset, "NV35"); 1173 status = nvxx_general_powerup(); 1174 break; 1175 case 0x034110de: /* Nvidia Geforce FX 5700 Ultra */ 1176 case 0x034210de: /* Nvidia Geforce FX 5700 */ 1177 case 0x034310de: /* Nvidia Geforce FX 5700LE */ 1178 case 0x034410de: /* Nvidia Geforce FX 5700VE */ 1179 si->ps.card_type = NV36; 1180 si->ps.card_arch = NV30A; 1181 sprintf(si->adi.name, "Nvidia Geforce FX 5700"); 1182 sprintf(si->adi.chipset, "NV36"); 1183 status = nvxx_general_powerup(); 1184 break; 1185 case 0x034510de: /* Nvidia unknown FX */ 1186 si->ps.card_type = NV36; 1187 si->ps.card_arch = NV30A; 1188 sprintf(si->adi.name, "Nvidia unknown FX"); 1189 sprintf(si->adi.chipset, "NV36"); 1190 status = nvxx_general_powerup(); 1191 break; 1192 case 0x034710de: /* Nvidia Geforce FX 5700 Go */ 1193 case 0x034810de: /* Nvidia Geforce FX 5700 Go */ 1194 si->ps.card_type = NV36; 1195 si->ps.card_arch = NV30A; 1196 si->ps.laptop = true; 1197 sprintf(si->adi.name, "Nvidia Geforce FX 5700 Go"); 1198 sprintf(si->adi.chipset, "NV36"); 1199 status = nvxx_general_powerup(); 1200 break; 1201 case 0x034910de: /* Nvidia unknown FX Go */ 1202 case 0x034b10de: /* Nvidia unknown FX Go */ 1203 si->ps.card_type = NV36; 1204 si->ps.card_arch = NV30A; 1205 si->ps.laptop = true; 1206 sprintf(si->adi.name, "Nvidia unknown FX Go"); 1207 sprintf(si->adi.chipset, "NV36"); 1208 status = nvxx_general_powerup(); 1209 break; 1210 case 0x034c10de: /* Nvidia Quadro FX 1000 Go */ 1211 si->ps.card_type = NV36; 1212 si->ps.card_arch = NV30A; 1213 si->ps.laptop = true; 1214 sprintf(si->adi.name, "Nvidia Quadro FX 1000 Go"); 1215 sprintf(si->adi.chipset, "NV36"); 1216 status = nvxx_general_powerup(); 1217 break; 1218 case 0x034e10de: /* Nvidia Quadro FX 1100 */ 1219 si->ps.card_type = NV36; 1220 si->ps.card_arch = NV30A; 1221 sprintf(si->adi.name, "Nvidia Quadro FX 1100"); 1222 sprintf(si->adi.chipset, "NV36"); 1223 status = nvxx_general_powerup(); 1224 break; 1225 case 0x034f10de: /* Nvidia unknown FX */ 1226 si->ps.card_type = NV36; 1227 si->ps.card_arch = NV30A; 1228 sprintf(si->adi.name, "Nvidia unknown FX"); 1229 sprintf(si->adi.chipset, "NV36(?)"); 1230 status = nvxx_general_powerup(); 1231 break; 1232 case 0x039110de: /* Nvidia Geforce 7600 GT */ 1233 si->ps.card_type = G73; 1234 si->ps.card_arch = NV40A; 1235 sprintf(si->adi.name, "Nvidia Geforce 7600 GT"); 1236 sprintf(si->adi.chipset, "G73"); 1237 status = nvxx_general_powerup(); 1238 break; 1239 case 0x039210de: /* Nvidia Geforce 7600 GS */ 1240 si->ps.card_type = G73; 1241 si->ps.card_arch = NV40A; 1242 sprintf(si->adi.name, "Nvidia Geforce 7600 GS"); 1243 sprintf(si->adi.chipset, "G73"); 1244 status = nvxx_general_powerup(); 1245 break; 1246 case 0x039310de: /* Nvidia Geforce 7300 GT */ 1247 si->ps.card_type = G73; 1248 si->ps.card_arch = NV40A; 1249 sprintf(si->adi.name, "Nvidia Geforce 7300 GT"); 1250 sprintf(si->adi.chipset, "G73"); 1251 status = nvxx_general_powerup(); 1252 break; 1253 case 0x039410de: /* Nvidia Geforce 7600 LE */ 1254 si->ps.card_type = G70; 1255 si->ps.card_arch = NV40A; 1256 sprintf(si->adi.name, "Nvidia Geforce 7600 LE"); 1257 sprintf(si->adi.chipset, "G70"); 1258 status = nvxx_general_powerup(); 1259 break; 1260 case 0x039810de: /* Nvidia Geforce 7600 GO */ 1261 si->ps.card_type = G73; 1262 si->ps.card_arch = NV40A; 1263 si->ps.laptop = true; 1264 sprintf(si->adi.name, "Nvidia Geforce 7600 GO"); 1265 sprintf(si->adi.chipset, "G73"); 1266 status = nvxx_general_powerup(); 1267 break; 1268 case 0x03d010de: /* Nvidia Geforce 6100 nForce 430 */ 1269 case 0x03d110de: /* Nvidia Geforce 6100 nForce 405 */ 1270 case 0x03d210de: /* Nvidia Geforce 6100 nForce 400 */ 1271 case 0x03d510de: /* Nvidia Geforce 6100 nForce 420 */ 1272 si->ps.card_type = NV44; 1273 si->ps.card_arch = NV40A; 1274 sprintf(si->adi.name, "Nvidia Geforce 6100 nForce, C61"); 1275 sprintf(si->adi.chipset, "NV44"); 1276 status = nvxx_general_powerup(); 1277 break; 1278 case 0x03d610de: /* Nvidia Geforce 7025 nForce 630a */ 1279 si->ps.card_type = NV44; 1280 si->ps.card_arch = NV40A; 1281 sprintf(si->adi.name, "Nvidia Geforce 7025 nForce 630a"); 1282 sprintf(si->adi.chipset, "NV44"); 1283 status = nvxx_general_powerup(); 1284 break; 1285#if 0 1286 case 0x06e410de: /* Nvidia Geforce 9200M G98M */ 1287 si->ps.card_type = G70; 1288 si->ps.card_arch = NV40A; 1289 sprintf(si->adi.name, "Nvidia Geforce 8400 GS"); 1290 sprintf(si->adi.chipset, "G98"); 1291 status = nvxx_general_powerup(); 1292 break; 1293 case 0x06e810de: /* Nvidia Geforce 9200M G98M */ 1294 si->ps.card_type = G70; 1295 si->ps.card_arch = NV40A; 1296 sprintf(si->adi.name, "Nvidia Geforce 9200M"); 1297 sprintf(si->adi.chipset, "G98"); 1298 status = nvxx_general_powerup(); 1299 break; 1300#endif 1301 case 0x07e110de: /* Nvidia Geforce 7100 nForce 630i */ 1302 si->ps.card_type = NV44; 1303 si->ps.card_arch = NV40A; 1304 sprintf(si->adi.name, "Nvidia Geforce 7100 nForce 630i"); 1305 sprintf(si->adi.chipset, "NV44"); 1306 status = nvxx_general_powerup(); 1307 break; 1308 /* Vendor Elsa GmbH */ 1309 case 0x0c601048: /* Elsa Gladiac Geforce2 MX */ 1310 si->ps.card_type = NV11; 1311 si->ps.card_arch = NV10A; 1312 sprintf(si->adi.name, "Elsa Gladiac Geforce2 MX"); 1313 sprintf(si->adi.chipset, "NV11"); 1314 status = nvxx_general_powerup(); 1315 break; 1316 /* Vendor Nvidia STB/SGS-Thompson */ 1317 case 0x002012d2: /* Nvidia STB/SGS-Thompson TNT1 */ 1318 si->ps.card_type = NV04; 1319 si->ps.card_arch = NV04A; 1320 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT1"); 1321 sprintf(si->adi.chipset, "NV04"); 1322 status = nvxx_general_powerup(); 1323 break; 1324 case 0x002812d2: /* Nvidia STB/SGS-Thompson TNT2 (pro) */ 1325 case 0x002912d2: /* Nvidia STB/SGS-Thompson TNT2 Ultra */ 1326 case 0x002a12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1327 case 0x002b12d2: /* Nvidia STB/SGS-Thompson TNT2 */ 1328 si->ps.card_type = NV05; 1329 si->ps.card_arch = NV04A; 1330 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1331 sprintf(si->adi.chipset, "NV05"); 1332 status = nvxx_general_powerup(); 1333 break; 1334 case 0x002c12d2: /* Nvidia STB/SGS-Thompson Vanta (Lt) */ 1335 si->ps.card_type = NV05; 1336 si->ps.card_arch = NV04A; 1337 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1338 sprintf(si->adi.chipset, "NV05"); 1339 status = nvxx_general_powerup(); 1340 break; 1341 case 0x002d12d2: /* Nvidia STB/SGS-Thompson TNT2-M64 (Pro) */ 1342 si->ps.card_type = NV05M64; 1343 si->ps.card_arch = NV04A; 1344 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2M64"); 1345 sprintf(si->adi.chipset, "NV05 model 64"); 1346 status = nvxx_general_powerup(); 1347 break; 1348 case 0x002e12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1349 case 0x002f12d2: /* Nvidia STB/SGS-Thompson NV06 Vanta */ 1350 si->ps.card_type = NV06; 1351 si->ps.card_arch = NV04A; 1352 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson Vanta"); 1353 sprintf(si->adi.chipset, "NV06"); 1354 status = nvxx_general_powerup(); 1355 break; 1356 case 0x00a012d2: /* Nvidia STB/SGS-Thompson Aladdin TNT2 */ 1357 si->ps.card_type = NV05; 1358 si->ps.card_arch = NV04A; 1359 sprintf(si->adi.name, "Nvidia STB/SGS-Thompson TNT2"); 1360 sprintf(si->adi.chipset, "NV05"); 1361 status = nvxx_general_powerup(); 1362 break; 1363 /* Vendor Varisys Limited */ 1364 case 0x35031888: /* Varisys Geforce4 MX440 */ 1365 si->ps.card_type = NV17; 1366 si->ps.card_arch = NV10A; 1367 sprintf(si->adi.name, "Varisys Geforce4 MX440"); 1368 sprintf(si->adi.chipset, "NV17"); 1369 status = nvxx_general_powerup(); 1370 break; 1371 case 0x35051888: /* Varisys Geforce4 Ti 4200 */ 1372 si->ps.card_type = NV25; 1373 si->ps.card_arch = NV20A; 1374 sprintf(si->adi.name, "Varisys Geforce4 Ti 4200"); 1375 sprintf(si->adi.chipset, "NV25"); 1376 status = nvxx_general_powerup(); 1377 break; 1378 default: 1379 LOG(8,("POWERUP: Failed to detect valid card 0x%08x\n",CFGR(DEVID))); 1380 return B_ERROR; 1381 } 1382 1383 return status; 1384} 1385 1386static status_t test_ram() 1387{ 1388 uint32 value, offset; 1389 status_t result = B_OK; 1390 1391 /* make sure we don't corrupt the hardware cursor by using fbc.frame_buffer. */ 1392 if (si->fbc.frame_buffer == NULL) 1393 { 1394 LOG(8,("INIT: test_ram detected NULL pointer.\n")); 1395 return B_ERROR; 1396 } 1397 1398 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1399 { 1400 /* write testpattern to cardRAM */ 1401 ((uint32 *)si->fbc.frame_buffer)[offset] = value; 1402 /* toggle testpattern */ 1403 value = 0xffffffff - value; 1404 } 1405 1406 for (offset = 0, value = 0x55aa55aa; offset < 256; offset++) 1407 { 1408 /* readback and verify testpattern from cardRAM */ 1409 if (((uint32 *)si->fbc.frame_buffer)[offset] != value) result = B_ERROR; 1410 /* toggle testpattern */ 1411 value = 0xffffffff - value; 1412 } 1413 return result; 1414} 1415 1416/* NOTE: 1417 * This routine *has* to be done *after* SetDispplayMode has been executed, 1418 * or test results will not be representative! 1419 * (CAS latency is dependant on NV setup on some (DRAM) boards) */ 1420status_t nv_set_cas_latency() 1421{ 1422 status_t result = B_ERROR; 1423 uint8 latency = 0; 1424 1425 /* check current RAM access to see if we need to change anything */ 1426 if (test_ram() == B_OK) 1427 { 1428 LOG(4,("INIT: RAM access OK.\n")); 1429 return B_OK; 1430 } 1431 1432 /* check if we read PINS at starttime so we have valid registersettings at our disposal */ 1433 if (si->ps.pins_status != B_OK) 1434 { 1435 LOG(4,("INIT: RAM access errors; not fixable: PINS was not read from cardBIOS.\n")); 1436 return B_ERROR; 1437 } 1438 1439 /* OK. We might have a problem, try to fix it now.. */ 1440 LOG(4,("INIT: RAM access errors; tuning CAS latency if prudent...\n")); 1441 1442 switch(si->ps.card_type) 1443 { 1444 default: 1445 LOG(4,("INIT: RAM CAS tuning not implemented for this card, aborting.\n")); 1446 return B_OK; 1447 break; 1448 } 1449 if (result == B_OK) 1450 LOG(4,("INIT: RAM access OK. CAS latency set to %d cycles.\n", latency)); 1451 else 1452 LOG(4,("INIT: RAM access not fixable. CAS latency set to %d cycles.\n", latency)); 1453 1454 return result; 1455} 1456 1457void setup_virtualized_heads(bool cross) 1458{ 1459 if (cross) 1460 { 1461 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1462 head1_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1463 head1_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1464 head1_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1465 head1_depth = (crtc_depth) nv_crtc2_depth; 1466 head1_dpms = (crtc_dpms) nv_crtc2_dpms; 1467 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1468 head1_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1469 head1_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1470 head1_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1471 head1_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1472 head1_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1473 head1_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1474 head1_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1475 head1_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1476 1477 head1_mode = (dac_mode) nv_dac2_mode; 1478 head1_palette = (dac_palette) nv_dac2_palette; 1479 head1_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1480 head1_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1481 1482 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1483 head2_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1484 head2_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1485 head2_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1486 head2_depth = (crtc_depth) nv_crtc_depth; 1487 head2_dpms = (crtc_dpms) nv_crtc_dpms; 1488 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1489 head2_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1490 head2_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1491 head2_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1492 head2_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1493 head2_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1494 head2_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1495 head2_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1496 head2_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1497 1498 head2_mode = (dac_mode) nv_dac_mode; 1499 head2_palette = (dac_palette) nv_dac_palette; 1500 head2_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1501 head2_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1502 } 1503 else 1504 { 1505 head1_interrupt_enable = (crtc_interrupt_enable) nv_crtc_interrupt_enable; 1506 head1_update_fifo = (crtc_update_fifo) nv_crtc_update_fifo; 1507 head1_validate_timing = (crtc_validate_timing) nv_crtc_validate_timing; 1508 head1_set_timing = (crtc_set_timing) nv_crtc_set_timing; 1509 head1_depth = (crtc_depth) nv_crtc_depth; 1510 head1_dpms = (crtc_dpms) nv_crtc_dpms; 1511 head1_set_display_pitch = (crtc_set_display_pitch) nv_crtc_set_display_pitch; 1512 head1_set_display_start = (crtc_set_display_start) nv_crtc_set_display_start; 1513 head1_cursor_init = (crtc_cursor_init) nv_crtc_cursor_init; 1514 head1_cursor_show = (crtc_cursor_show) nv_crtc_cursor_show; 1515 head1_cursor_hide = (crtc_cursor_hide) nv_crtc_cursor_hide; 1516 head1_cursor_define = (crtc_cursor_define) nv_crtc_cursor_define; 1517 head1_cursor_position = (crtc_cursor_position) nv_crtc_cursor_position; 1518 head1_stop_tvout = (crtc_stop_tvout) nv_crtc_stop_tvout; 1519 head1_start_tvout = (crtc_start_tvout) nv_crtc_start_tvout; 1520 1521 head1_mode = (dac_mode) nv_dac_mode; 1522 head1_palette = (dac_palette) nv_dac_palette; 1523 head1_set_pix_pll = (dac_set_pix_pll) nv_dac_set_pix_pll; 1524 head1_pix_pll_find = (dac_pix_pll_find) nv_dac_pix_pll_find; 1525 1526 head2_interrupt_enable = (crtc_interrupt_enable) nv_crtc2_interrupt_enable; 1527 head2_update_fifo = (crtc_update_fifo) nv_crtc2_update_fifo; 1528 head2_validate_timing = (crtc_validate_timing) nv_crtc2_validate_timing; 1529 head2_set_timing = (crtc_set_timing) nv_crtc2_set_timing; 1530 head2_depth = (crtc_depth) nv_crtc2_depth; 1531 head2_dpms = (crtc_dpms) nv_crtc2_dpms; 1532 head2_set_display_pitch = (crtc_set_display_pitch) nv_crtc2_set_display_pitch; 1533 head2_set_display_start = (crtc_set_display_start) nv_crtc2_set_display_start; 1534 head2_cursor_init = (crtc_cursor_init) nv_crtc2_cursor_init; 1535 head2_cursor_show = (crtc_cursor_show) nv_crtc2_cursor_show; 1536 head2_cursor_hide = (crtc_cursor_hide) nv_crtc2_cursor_hide; 1537 head2_cursor_define = (crtc_cursor_define) nv_crtc2_cursor_define; 1538 head2_cursor_position = (crtc_cursor_position) nv_crtc2_cursor_position; 1539 head2_stop_tvout = (crtc_stop_tvout) nv_crtc2_stop_tvout; 1540 head2_start_tvout = (crtc_start_tvout) nv_crtc2_start_tvout; 1541 1542 head2_mode = (dac_mode) nv_dac2_mode; 1543 head2_palette = (dac_palette) nv_dac2_palette; 1544 head2_set_pix_pll = (dac_set_pix_pll) nv_dac2_set_pix_pll; 1545 head2_pix_pll_find = (dac_pix_pll_find) nv_dac2_pix_pll_find; 1546 } 1547} 1548 1549void set_crtc_owner(bool head) 1550{ 1551 if (si->ps.secondary_head) 1552 { 1553 if (!head) 1554 { 1555 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1556 * while non-NV11 cards behave normally. 1557 * 1558 * Double-write action needed on those strange NV11 cards: */ 1559 /* RESET: needed on NV11 */ 1560 CRTCW(OWNER, 0xff); 1561 /* enable access to CRTC1, SEQ1, GRPH1, ATB1, ??? */ 1562 CRTCW(OWNER, 0x00); 1563 } 1564 else 1565 { 1566 /* note: 'OWNER' is a non-standard register in behaviour(!) on NV11's, 1567 * while non-NV11 cards behave normally. 1568 * 1569 * Double-write action needed on those strange NV11 cards: */ 1570 /* RESET: needed on NV11 */ 1571 CRTC2W(OWNER, 0xff); 1572 /* enable access to CRTC2, SEQ2, GRPH2, ATB2, ??? */ 1573 CRTC2W(OWNER, 0x03); 1574 } 1575 } 1576} 1577 1578static status_t nvxx_general_powerup() 1579{ 1580 LOG(4, ("INIT: NV powerup\n")); 1581 LOG(4,("POWERUP: Detected %s (%s)\n", si->adi.name, si->adi.chipset)); 1582 1583 /* setup cardspecs */ 1584 /* note: 1585 * this MUST be done before the driver attempts a card coldstart */ 1586 set_specs(); 1587 1588 /* only process BIOS for finetuning specs and coldstarting card if requested 1589 * by the user; 1590 * note: 1591 * this in fact frees the driver from relying on the BIOS to be executed 1592 * at system power-up POST time. */ 1593 if (!si->settings.usebios) 1594 { 1595 /* Make sure we are running in PCI (not AGP) mode: 1596 * This is a requirement for safely coldstarting cards! 1597 * (some cards reset their AGP PLL during startup which makes acceleration 1598 * engine DMA fail later on. A reboot is needed to overcome that.) 1599 * Note: 1600 * This may only be done when no transfers are in progress on the bus, so now 1601 * is probably a good time.. */ 1602 nv_agp_setup(false); 1603 1604 LOG(2, ("INIT: Attempting card coldstart!\n")); 1605 /* update the cardspecs in the shared_info PINS struct according to reported 1606 * specs as much as is possible; 1607 * this also coldstarts the card if possible (executes BIOS CMD script(s)) */ 1608 parse_pins(); 1609 } 1610 else 1611 { 1612 LOG(2, ("INIT: Skipping card coldstart!\n")); 1613 } 1614 1615 unlock_card(); 1616 1617 /* get RAM size, detect TV encoder and do fake panel startup (panel init code 1618 * is still missing). */ 1619 fake_panel_start(); 1620 1621 /* log the final card specifications */ 1622 dump_pins(); 1623 1624 /* dump config space as it is after a possible coldstart attempt */ 1625 if (si->settings.logmask & 0x80000000) nv_dump_configuration_space(); 1626 1627 /* setup CRTC and DAC functions access: determined in fake_panel_start */ 1628 setup_virtualized_heads(si->ps.crtc2_prim); 1629 1630 /* do powerup needed from pre-inited card state as done by system POST cardBIOS 1631 * execution or driver coldstart above */ 1632 return nv_general_bios_to_powergraphics(); 1633} 1634 1635/* this routine switches the CRTC/DAC sets to 'connectors', but only for analog 1636 * outputs. We need this to make sure the analog 'switch' is set in the same way the 1637 * digital 'switch' is set by the BIOS or we might not be able to use dualhead. */ 1638status_t nv_general_output_select(bool cross) 1639{ 1640 /* make sure this call is warranted */ 1641 if (si->ps.secondary_head) 1642 { 1643 /* NV11 cards can't switch heads (confirmed) */ 1644 if (si->ps.card_type != NV11) 1645 { 1646 if (cross) 1647 { 1648 LOG(4,("INIT: switching analog outputs to be cross-connected\n")); 1649 1650 /* enable head 2 on connector 1 */ 1651 /* (b8 = select CRTC (head) for output, 1652 * b4 = ??? (confirmed not to be a FP switch), 1653 * b0 = enable CRT) */ 1654 DACW(OUTPUT, 0x00000101); 1655 /* enable head 1 on connector 2 */ 1656 DAC2W(OUTPUT, 0x00000001); 1657 } 1658 else 1659 { 1660 LOG(4,("INIT: switching analog outputs to be straight-through\n")); 1661 1662 /* enable head 1 on connector 1 */ 1663 DACW(OUTPUT, 0x00000001); 1664 /* enable head 2 on connector 2 */ 1665 DAC2W(OUTPUT, 0x00000101); 1666 } 1667 } 1668 else 1669 { 1670 LOG(4,("INIT: NV11 analog outputs are hardwired to be straight-through\n")); 1671 } 1672 return B_OK; 1673 } 1674 else 1675 { 1676 return B_ERROR; 1677 } 1678} 1679 1680/* this routine switches CRTC/DAC set use. We need this because it's unknown howto 1681 * switch digital panels to/from a specific CRTC/DAC set. */ 1682status_t nv_general_head_select(bool cross) 1683{ 1684 /* make sure this call is warranted */ 1685 if (si->ps.secondary_head) 1686 { 1687 /* invert CRTC/DAC use to do switching */ 1688 if (cross) 1689 { 1690 LOG(4,("INIT: switching CRTC/DAC use to be cross-connected\n")); 1691 si->crtc_switch_mode = !si->ps.crtc2_prim; 1692 } 1693 else 1694 { 1695 LOG(4,("INIT: switching CRTC/DAC use to be straight-through\n")); 1696 si->crtc_switch_mode = si->ps.crtc2_prim; 1697 } 1698 /* update CRTC and DAC functions access */ 1699 setup_virtualized_heads(si->crtc_switch_mode); 1700 1701 return B_OK; 1702 } 1703 else 1704 { 1705 return B_ERROR; 1706 } 1707} 1708 1709static void unlock_card(void) 1710{ 1711 /* make sure to power-up all nvidia hardware function blocks */ 1712 /* bit 28: OVERLAY ENGINE (BES), 1713 * bit 25: CRTC2, (> NV04A) 1714 * bit 24: CRTC1, 1715 * bit 20: framebuffer, 1716 * bit 16: PPMI, 1717 * bit 13: some part of at least the G72 acceleration engine, 1718 * bit 12: PGRAPH, 1719 * bit 8: PFIFO, 1720 * bit 4: PMEDIA, 1721 * bit 0: TVOUT. (> NV04A) */ 1722 NV_REG32(NV32_PWRUPCTRL) = 0xffffffff; 1723 1724 /* select colormode CRTC registers base adresses */ 1725 NV_REG8(NV8_MISCW) = 0xcb; 1726 1727 /* enable access to primary head */ 1728 set_crtc_owner(0); 1729 /* unlock head's registers for R/W access */ 1730 CRTCW(LOCK, 0x57); 1731 CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1732 if (si->ps.secondary_head) 1733 { 1734 /* enable access to secondary head */ 1735 set_crtc_owner(1); 1736 /* unlock head's registers for R/W access */ 1737 CRTC2W(LOCK, 0x57); 1738 CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f)); 1739 } 1740} 1741 1742/* basic change of card state from VGA to enhanced mode: 1743 * Should work from VGA BIOS POST init state. */ 1744static status_t nv_general_bios_to_powergraphics() 1745{ 1746 /* let acc engine make power off/power on cycle to start 'fresh' */ 1747 NV_REG32(NV32_PWRUPCTRL) = 0xffff00ff; 1748 snooze(1000); 1749 NV_REG32(NV32_PWRUPCTRL) = 0xffffffff; 1750 1751 unlock_card(); 1752 1753 /* turn off both displays and the hardcursors (also disables transfers) */ 1754 head1_dpms(false, false, false, true); 1755 head1_cursor_hide(); 1756 if (si->ps.secondary_head) 1757 { 1758 head2_dpms(false, false, false, true); 1759 head2_cursor_hide(); 1760 } 1761 1762 if (si->ps.secondary_head) 1763 { 1764 /* switch overlay engine and TV encoder to CRTC1 */ 1765 /* bit 17: GPU FP port #1 (confirmed NV25, NV28, confirmed not on NV34), 1766 * bit 16: GPU FP port #2 (confirmed NV25, NV28, NV34), 1767 * bit 12: overlay engine (all cards), 1768 * bit 9: TVout chip #2 (confirmed on NV18, NV25, NV28), 1769 * bit 8: TVout chip #1 (all cards), 1770 * bit 4: both I2C busses (all cards) */ 1771 NV_REG32(NV32_2FUNCSEL) &= ~0x00001100; 1772 NV_REG32(NV32_FUNCSEL) |= 0x00001100; 1773 } 1774 si->overlay.crtc = false; 1775 1776 /* enable 'enhanced' mode on primary head: */ 1777 /* enable access to primary head */ 1778 set_crtc_owner(0); 1779 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1780 * NV11's like the Geforce2 MX200, while the MX400 and non-NV11 cards 1781 * behave normally. 1782 * Also readback is not nessesarily what was written before! 1783 * 1784 * Double-write action needed on those strange NV11 cards: */ 1785 /* RESET: don't doublebuffer CRTC access: set programmed values immediately... */ 1786 CRTCW(BUFFER, 0xff); 1787 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1788 /* note: this has no effect on possible bandwidth issues. */ 1789 CRTCW(BUFFER, 0xfb); 1790 /* select VGA mode (old VGA register) */ 1791 CRTCW(MODECTL, 0xc3); 1792 /* select graphics mode (old VGA register) */ 1793 SEQW(MEMMODE, 0x0e); 1794 /* select 8 dots character clocks (old VGA register) */ 1795 SEQW(CLKMODE, 0x21); 1796 /* select VGA mode (old VGA register) */ 1797 GRPHW(MODE, 0x00); 1798 /* select graphics mode (old VGA register) */ 1799 GRPHW(MISC, 0x01); 1800 /* select graphics mode (old VGA register) */ 1801 ATBW(MODECTL, 0x01); 1802 /* enable 'enhanced mode', enable Vsync & Hsync, 1803 * set DAC palette to 8-bit width, disable large screen */ 1804 CRTCW(REPAINT1, 0x04); 1805 1806 /* enable 'enhanced' mode on secondary head: */ 1807 if (si->ps.secondary_head) 1808 { 1809 /* enable access to secondary head */ 1810 set_crtc_owner(1); 1811 /* select colormode CRTC2 registers base adresses */ 1812 NV_REG8(NV8_MISCW) = 0xcb; 1813 /* note: 'BUFFER' is a non-standard register in behaviour(!) on most 1814 * NV11's like the Geforce2 MX200, while the MX400 and non-NV11 cards 1815 * behave normally. 1816 * Also readback is not nessesarily what was written before! 1817 * 1818 * Double-write action needed on those strange NV11 cards: */ 1819 /* RESET: don't doublebuffer CRTC2 access: set programmed values immediately... */ 1820 CRTC2W(BUFFER, 0xff); 1821 /* ... and use fine pitched CRTC granularity on > NV4 cards (b2 = 0) */ 1822 /* note: this has no effect on possible bandwidth issues. */ 1823 CRTC2W(BUFFER, 0xfb); 1824 /* select VGA mode (old VGA register) */ 1825 CRTC2W(MODECTL, 0xc3); 1826 /* select graphics mode (old VGA register) */ 1827 SEQW(MEMMODE, 0x0e); 1828 /* select 8 dots character clocks (old VGA register) */ 1829 SEQW(CLKMODE, 0x21); 1830 /* select VGA mode (old VGA register) */ 1831 GRPHW(MODE, 0x00); 1832 /* select graphics mode (old VGA register) */ 1833 GRPHW(MISC, 0x01); 1834 /* select graphics mode (old VGA register) */ 1835 ATB2W(MODECTL, 0x01); 1836 /* enable 'enhanced mode', enable Vsync & Hsync, 1837 * set DAC palette to 8-bit width, disable large screen */ 1838 CRTC2W(REPAINT1, 0x04); 1839 } 1840 1841 /* enable palettes */ 1842 DACW(GENCTRL, 0x00100100); 1843 if (si->ps.secondary_head) DAC2W(GENCTRL, 0x00100100); 1844 1845 /* turn on DAC and make sure detection testsignal routing is disabled 1846 * (b16 = disable DAC, 1847 * b12 = enable testsignal output */ 1848 //fixme note: b20 ('DACTM_TEST') when set apparantly blocks a DAC's video output 1849 //(confirmed NV43), while it's timing remains operational (black screen). 1850 //It feels like in some screen configurations it can move the output to the other 1851 //output connector as well... 1852 DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeefff)); 1853 /* b20 enables DAC video output on some newer cards 1854 * (confirmed video to be almost black if zero on Geforce 7300, id 0x01d1 (G72)) */ 1855 if ((si->ps.card_type == NV44) || (si->ps.card_type >= G70)) 1856 DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00100000)); 1857 1858 /* turn on DAC2 if it exists 1859 * (NOTE: testsignal function block resides in DAC1 only (!)) */ 1860 if (si->ps.secondary_head) { 1861 DAC2W(TSTCTRL, (DAC2R(TSTCTRL) & 0xfffeefff)); 1862 /* b20 might enable DAC video output on some newer cards 1863 * (not confirmed yet) */ 1864 if ((si->ps.card_type == NV44) || (si->ps.card_type >= G70)) 1865 DAC2W(TSTCTRL, (DAC2R(TSTCTRL) | 0x00100000)); 1866 } 1867 1868 /* NV40 and NV45 need a 'tweak' to make sure the CRTC FIFO's/shiftregisters get 1869 * their data in time (otherwise momentarily ghost images of windows or such 1870 * may appear on heavy acceleration engine use for instance, especially in 32-bit 1871 * colordepth) */ 1872 if ((si->ps.card_type == NV40) || (si->ps.card_type == NV45)) 1873 { 1874 /* clear b15: some framebuffer config item (unknown) */ 1875 NV_REG32(NV32_PFB_CLS_PAGE2) &= 0xffff7fff; 1876 } 1877 1878 /* enable dithering for internal laptop panels only (those have only 18bit colordepth sometimes) 1879 * note: 1880 * dithering is only supported on digitally connected flatpanels. */ 1881 //fixme: how about DAC2?? (still implement and test..) 1882 if (si->ps.laptop && (si->ps.monitors & CRTC1_TMDS)) nv_dac_dither(true); 1883 1884 /* tweak card GPU-core and RAM speeds if requested (hoping we'll survive)... */ 1885 if (si->settings.gpu_clk) 1886 { 1887 LOG(2,("INIT: tweaking GPU clock!\n")); 1888 1889 set_pll(NV32_COREPLL, si->settings.gpu_clk); 1890 snooze(1000); 1891 } 1892 if (si->settings.ram_clk) 1893 { 1894 LOG(2,("INIT: tweaking cardRAM clock!\n")); 1895 1896 set_pll(NV32_MEMPLL, si->settings.ram_clk); 1897 snooze(1000); 1898 } 1899 1900 /* setup AGP: 1901 * Note: 1902 * This may only be done when no transfers are in progress on the bus, so now 1903 * is probably a good time.. */ 1904 nv_agp_setup(true); 1905 1906 return B_OK; 1907} 1908 1909/* Check if mode virtual_size adheres to the cards _maximum_ contraints, and modify 1910 * virtual_size to the nearest valid maximum for the mode on the card if not so. 1911 * Also: check if virtual_width adheres to the cards granularity constraints, and 1912 * create mode slopspace if not so. 1913 * We use acc or crtc granularity constraints based on the 'worst case' scenario. 1914 * 1915 * Mode slopspace is reflected in fbc->bytes_per_row BTW. */ 1916status_t nv_general_validate_pic_size (display_mode *target, uint32 *bytes_per_row, bool *acc_mode) 1917{ 1918 uint32 video_pitch; 1919 uint32 acc_mask, crtc_mask; 1920 uint32 max_crtc_width, max_acc_width; 1921 uint8 depth = 8; 1922 1923 /* determine pixel multiple based on acceleration engine constraints */ 1924 /* note: 1925 * because of the seemingly 'random' variations in these constraints we take 1926 * a reasonable 'lowest common denominator' instead of always true constraints. */ 1927 switch (si->ps.card_arch) 1928 { 1929 case NV04A: 1930 /* confirmed for: 1931 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), Geforce2 MX400 (NV11), 1932 * Geforce4 MX440 (NV18), GeforceFX 5200 (NV34) in PIO acc mode; 1933 * confirmed for: 1934 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64), Geforce4 Ti4200 (NV28), 1935 * GeforceFX 5200 (NV34) in DMA acc mode. */ 1936 switch (target->space) 1937 { 1938 case B_CMAP8: acc_mask = 0x0f; depth = 8; break; 1939 case B_RGB15: acc_mask = 0x07; depth = 16; break; 1940 case B_RGB16: acc_mask = 0x07; depth = 16; break; 1941 case B_RGB24: acc_mask = 0x0f; depth = 24; break; 1942 case B_RGB32: acc_mask = 0x03; depth = 32; break; 1943 default: 1944 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1945 return B_ERROR; 1946 } 1947 break; 1948 default: 1949 /* confirmed for: 1950 * Geforce4 Ti4200 (NV28), GeforceFX 5600 (NV31) in PIO acc mode; 1951 * confirmed for: 1952 * Geforce2 MX400 (NV11), Geforce4 MX440 (NV18), GeforcePCX 5750 (NV36), 1953 * GeforcePCX 6600 GT (NV43) in DMA acc mode. */ 1954 switch (target->space) 1955 { 1956 case B_CMAP8: acc_mask = 0x3f; depth = 8; break; 1957 case B_RGB15: acc_mask = 0x1f; depth = 16; break; 1958 case B_RGB16: acc_mask = 0x1f; depth = 16; break; 1959 case B_RGB24: acc_mask = 0x3f; depth = 24; break; 1960 case B_RGB32: acc_mask = 0x0f; depth = 32; break; 1961 default: 1962 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1963 return B_ERROR; 1964 } 1965 break; 1966 } 1967 1968 /* determine pixel multiple based on CRTC memory pitch constraints: 1969 * -> all NV cards have same granularity constraints on CRTC1 and CRTC2, 1970 * provided that the CRTC1 and CRTC2 BUFFER register b2 = 0; 1971 * 1972 * (Note: Don't mix this up with CRTC timing contraints! Those are 1973 * multiples of 8 for horizontal, 1 for vertical timing.) */ 1974 switch (si->ps.card_type) 1975 { 1976 default: 1977// case NV04: 1978 /* confirmed for: 1979 * TNT1 always; 1980 * TNT2, TNT2-M64, Geforce2 MX400, Geforce4 MX440, Geforce4 Ti4200, 1981 * GeforceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 1982 /* NOTE: 1983 * Unfortunately older cards have a hardware fault that prevents use. 1984 * We need doubled granularity on those to prevent the single top line 1985 * from shifting to the left! 1986 * This is confirmed for TNT2, Geforce2 MX200, Geforce2 MX400. 1987 * Confirmed OK are: 1988 * Geforce4 MX440, Geforce4 Ti4200, GeforceFX 5200. */ 1989 switch (target->space) 1990 { 1991 case B_CMAP8: crtc_mask = 0x0f; break; /* 0x07 */ 1992 case B_RGB15: crtc_mask = 0x07; break; /* 0x03 */ 1993 case B_RGB16: crtc_mask = 0x07; break; /* 0x03 */ 1994 case B_RGB24: crtc_mask = 0x0f; break; /* 0x07 */ 1995 case B_RGB32: crtc_mask = 0x03; break; /* 0x01 */ 1996 default: 1997 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 1998 return B_ERROR; 1999 } 2000 break; 2001// default: 2002 /* confirmed for: 2003 * TNT2, TNT2-M64, Geforce2 MX400, Geforce4 MX440, Geforce4 Ti4200, 2004 * GeforceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 2005/* switch (target->space) 2006 { 2007 case B_CMAP8: crtc_mask = 0x1f; break; 2008 case B_RGB15: crtc_mask = 0x0f; break; 2009 case B_RGB16: crtc_mask = 0x0f; break; 2010 case B_RGB24: crtc_mask = 0x1f; break; 2011 case B_RGB32: crtc_mask = 0x07; break; 2012 default: 2013 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2014 return B_ERROR; 2015 } 2016 break; 2017*/ } 2018 2019 /* set virtual_width limit for accelerated modes */ 2020 /* note: 2021 * because of the seemingly 'random' variations in these constraints we take 2022 * a reasonable 'lowest common denominator' instead of always true constraints. */ 2023 switch (si->ps.card_arch) 2024 { 2025 case NV04A: 2026 /* confirmed for: 2027 * TNT1 (NV04), TNT2 (NV05), TNT2-M64 (NV05M64) in both PIO and DMA acc mode. */ 2028 switch(target->space) 2029 { 2030 case B_CMAP8: max_acc_width = 8176; break; 2031 case B_RGB15: max_acc_width = 4088; break; 2032 case B_RGB16: max_acc_width = 4088; break; 2033 case B_RGB24: max_acc_width = 2720; break; 2034 case B_RGB32: max_acc_width = 2044; break; 2035 default: 2036 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2037 return B_ERROR; 2038 } 2039 break; 2040 default: 2041 /* confirmed for: 2042 * Geforce4 Ti4200 (NV28), GeforceFX 5600 (NV31) in PIO acc mode; 2043 * Geforce2 MX400 (NV11), Geforce4 MX440 (NV18), GeforceFX 5200 (NV34) can do 2044 * 16368/8184/8184/5456/4092, so a bit better in PIO acc mode; 2045 * confirmed for: 2046 * Geforce2 MX400 (NV11), Geforce4 MX440 (NV18), GeforcePCX 5750 (NV36), 2047 * GeforcePCX 6600 GT (NV43) in DMA acc mode; 2048 * Geforce4 Ti4200 (NV28), GeforceFX 5200 (NV34) can do 2049 * 16368/8184/8184/5456/4092, so a bit better in DMA acc mode. */ 2050 switch(target->space) 2051 { 2052 case B_CMAP8: max_acc_width = 16320; break; 2053 case B_RGB15: max_acc_width = 8160; break; 2054 case B_RGB16: max_acc_width = 8160; break; 2055 case B_RGB24: max_acc_width = 5440; break; 2056 case B_RGB32: max_acc_width = 4080; break; 2057 default: 2058 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2059 return B_ERROR; 2060 } 2061 break; 2062 } 2063 2064 /* set virtual_width limit for unaccelerated modes */ 2065 switch (si->ps.card_type) 2066 { 2067 default: 2068// case NV04: 2069 /* confirmed for: 2070 * TNT1 always; 2071 * TNT2, TNT2-M64, Geforce2 MX400, Geforce4 MX440, Geforce4 Ti4200, 2072 * GeforceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 0 */ 2073 /* NOTE: 2074 * Unfortunately older cards have a hardware fault that prevents use. 2075 * We need doubled granularity on those to prevent the single top line 2076 * from shifting to the left! 2077 * This is confirmed for TNT2, Geforce2 MX200, Geforce2 MX400. 2078 * Confirmed OK are: 2079 * Geforce4 MX440, Geforce4 Ti4200, GeforceFX 5200. */ 2080 switch(target->space) 2081 { 2082 case B_CMAP8: max_crtc_width = 16368; break; /* 16376 */ 2083 case B_RGB15: max_crtc_width = 8184; break; /* 8188 */ 2084 case B_RGB16: max_crtc_width = 8184; break; /* 8188 */ 2085 case B_RGB24: max_crtc_width = 5456; break; /* 5456 */ 2086 case B_RGB32: max_crtc_width = 4092; break; /* 4094 */ 2087 default: 2088 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2089 return B_ERROR; 2090 } 2091 break; 2092// default: 2093 /* confirmed for: 2094 * TNT2, TNT2-M64, Geforce2 MX400, Geforce4 MX440, Geforce4 Ti4200, 2095 * GeforceFX 5200: if the CRTC1 (and CRTC2) BUFFER register b2 = 1 */ 2096/* switch(target->space) 2097 { 2098 case B_CMAP8: max_crtc_width = 16352; break; 2099 case B_RGB15: max_crtc_width = 8176; break; 2100 case B_RGB16: max_crtc_width = 8176; break; 2101 case B_RGB24: max_crtc_width = 5440; break; 2102 case B_RGB32: max_crtc_width = 4088; break; 2103 default: 2104 LOG(8,("INIT: unknown color space: 0x%08x\n", target->space)); 2105 return B_ERROR; 2106 } 2107 break; 2108*/ } 2109 2110 /* check for acc capability, and adjust mode to adhere to hardware constraints */ 2111 if (max_acc_width <= max_crtc_width) 2112 { 2113 /* check if we can setup this mode with acceleration */ 2114 *acc_mode = true; 2115 /* virtual_width */ 2116 if (target->virtual_width > max_acc_width) *acc_mode = false; 2117 /* virtual_height */ 2118 /* (NV cards can even do more than this(?)... 2119 * but 4096 is confirmed on all cards at max. accelerated width.) */ 2120 if (target->virtual_height > 4096) *acc_mode = false; 2121 2122 /* now check virtual_size based on CRTC constraints */ 2123 if (target->virtual_width > max_crtc_width) target->virtual_width = max_crtc_width; 2124 /* virtual_height: The only constraint here is the cards memory size which is 2125 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 2126 * 'Limiting here' to the variable size that's at least available (uint16). */ 2127 if (target->virtual_height > 65535) target->virtual_height = 65535; 2128 2129 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 2130 * it was confined above, so we can finally calculate safely if we need slopspace 2131 * for this mode... */ 2132 if (*acc_mode) 2133 { 2134 /* the mode needs to adhere to the largest granularity imposed... */ 2135 if (acc_mask < crtc_mask) 2136 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2137 else 2138 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 2139 } 2140 else /* unaccelerated mode */ 2141 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2142 } 2143 else /* max_acc_width > max_crtc_width */ 2144 { 2145 /* check if we can setup this mode with acceleration */ 2146 *acc_mode = true; 2147 /* (we already know virtual_width will be no problem) */ 2148 /* virtual_height */ 2149 /* (NV cards can even do more than this(?)... 2150 * but 4096 is confirmed on all cards at max. accelerated width.) */ 2151 if (target->virtual_height > 4096) *acc_mode = false; 2152 2153 /* now check virtual_size based on CRTC constraints */ 2154 if (*acc_mode) 2155 { 2156 /* note that max_crtc_width already adheres to crtc_mask */ 2157 if (target->virtual_width > (max_crtc_width & ~acc_mask)) 2158 target->virtual_width = (max_crtc_width & ~acc_mask); 2159 } 2160 else /* unaccelerated mode */ 2161 { 2162 if (target->virtual_width > max_crtc_width) 2163 target->virtual_width = max_crtc_width; 2164 } 2165 /* virtual_height: The only constraint here is the cards memory size which is 2166 * checked later on in ProposeMode: virtual_height is adjusted then if needed. 2167 * 'Limiting here' to the variable size that's at least available (uint16). */ 2168 if (target->virtual_height > 65535) target->virtual_height = 65535; 2169 2170 /* OK, now we know that virtual_width is valid, and it's needing no slopspace if 2171 * it was confined above, so we can finally calculate safely if we need slopspace 2172 * for this mode... */ 2173 if (*acc_mode) 2174 { 2175 /* the mode needs to adhere to the largest granularity imposed... */ 2176 if (acc_mask < crtc_mask) 2177 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2178 else 2179 video_pitch = ((target->virtual_width + acc_mask) & ~acc_mask); 2180 } 2181 else /* unaccelerated mode */ 2182 video_pitch = ((target->virtual_width + crtc_mask) & ~crtc_mask); 2183 } 2184 2185 LOG(2,("INIT: memory pitch will be set to %d pixels for colorspace 0x%08x\n", 2186 video_pitch, target->space)); 2187 if (target->virtual_width != video_pitch) 2188 LOG(2,("INIT: effective mode slopspace is %d pixels\n", 2189 (video_pitch - target->virtual_width))); 2190 2191 /* now calculate bytes_per_row for this mode */ 2192 *bytes_per_row = video_pitch * (depth >> 3); 2193 2194 return B_OK; 2195} 2196