Lines Matching refs:si
31 si->ps.pins_status = B_ERROR;
35 rom = (uint8 *) si->rom_mirror;
54 si->ps.pins_status = B_OK;
81 switch (si->ps.card_arch)
91 switch (si->ps.card_arch)
112 if (si->settings.memory != 0)
115 si->ps.memory_size = si->settings.memory * 1024 * 1024;
119 si->ps.tvout = false;
120 si->ps.tvout_chip_type = NONE;
124 si->ps.tvout = true;
125 si->ps.tvout_chip_bus = ???;
126 si->ps.tvout_chip_type = ???;
139 if (si->ps.secondary_head && si->settings.switchhead)
142 si->ps.crtc2_prim = !si->ps.crtc2_prim;
192 if (si->ps.secondary_head)
218 si->ps.p1_timing.h_display = 0;
219 si->ps.p1_timing.v_display = 0;
220 si->ps.panel1_aspect = 0;
221 si->ps.p2_timing.h_display = 0;
222 si->ps.p2_timing.v_display = 0;
223 si->ps.panel2_aspect = 0;
224 si->ps.slaved_tmds1 = false;
225 si->ps.slaved_tmds2 = false;
226 si->ps.master_tmds1 = false;
227 si->ps.master_tmds2 = false;
228 si->ps.tmds1_active = false;
229 si->ps.tmds2_active = false;
261 si->ps.slaved_tmds1 = true;
262 si->ps.tmds1_active = true;
263 si->ps.p1_timing.h_display = width;
264 si->ps.p1_timing.v_display = height;
268 if (si->ps.secondary_head && slaved_for_dev2 && !tvout2)
274 si->ps.slaved_tmds2 = true;
275 si->ps.tmds2_active = true;
276 si->ps.p2_timing.h_display = width;
277 si->ps.p2_timing.v_display = height;
281 if ((si->ps.card_type == NV11) &&
282 !si->ps.slaved_tmds1 && !tvout1)
288 si->ps.master_tmds1 = true;
289 si->ps.tmds1_active = true;
290 si->ps.p1_timing.h_display = width;
291 si->ps.p1_timing.v_display = height;
295 if ((si->ps.card_type == NV11) &&
296 si->ps.secondary_head && !si->ps.slaved_tmds2 && !tvout2)
302 si->ps.master_tmds2 = true;
303 si->ps.tmds2_active = true;
304 si->ps.p2_timing.h_display = width;
305 si->ps.p2_timing.v_display = height;
312 if (si->ps.laptop && si->ps.tmds1_active && si->ps.tmds2_active &&
314 (si->ps.p1_timing.h_display == si->ps.p2_timing.h_display) &&
315 (si->ps.p1_timing.v_display == si->ps.p2_timing.v_display))
319 if (si->ps.card_type == NV11)
322 si->ps.slaved_tmds1 = false;
323 si->ps.master_tmds1 = false;
324 si->ps.tmds1_active = false;
325 si->ps.p1_timing.h_display = 0;
326 si->ps.p1_timing.v_display = 0;
333 si->ps.slaved_tmds1 = false;
334 si->ps.master_tmds1 = false;
335 si->ps.tmds1_active = false;
336 si->ps.p1_timing.h_display = 0;
337 si->ps.p1_timing.v_display = 0;
342 si->ps.slaved_tmds2 = false;
343 si->ps.master_tmds2 = false;
344 si->ps.tmds2_active = false;
345 si->ps.p2_timing.h_display = 0;
346 si->ps.p2_timing.v_display = 0;
352 if (si->ps.tmds1_active)
355 si->ps.panel1_aspect =
356 (si->ps.p1_timing.h_display / ((float)si->ps.p1_timing.v_display));
358 si->ps.p1_timing.h_sync_start = (DACR(FP_HSYNC_S) & 0x0000ffff) + 1;
359 si->ps.p1_timing.h_sync_end = (DACR(FP_HSYNC_E) & 0x0000ffff) + 1;
360 si->ps.p1_timing.h_total = (DACR(FP_HTOTAL) & 0x0000ffff) + 1;
362 si->ps.p1_timing.v_sync_start = (DACR(FP_VSYNC_S) & 0x0000ffff) + 1;
363 si->ps.p1_timing.v_sync_end = (DACR(FP_VSYNC_E) & 0x0000ffff) + 1;
364 si->ps.p1_timing.v_total = (DACR(FP_VTOTAL) & 0x0000ffff) + 1;
366 si->ps.p1_timing.flags = 0;
367 if (DACR(FP_TG_CTRL) & 0x00000001) si->ps.p1_timing.flags |= B_POSITIVE_VSYNC;
368 if (DACR(FP_TG_CTRL) & 0x00000010) si->ps.p1_timing.flags |= B_POSITIVE_HSYNC;
371 si->ps.p1_timing.pixel_clock =
372 (si->ps.p1_timing.h_total * si->ps.p1_timing.v_total * 60) / 1000;
374 if (si->ps.tmds2_active)
377 si->ps.panel2_aspect =
378 (si->ps.p2_timing.h_display / ((float)si->ps.p2_timing.v_display));
380 si->ps.p2_timing.h_sync_start = (DAC2R(FP_HSYNC_S) & 0x0000ffff) + 1;
381 si->ps.p2_timing.h_sync_end = (DAC2R(FP_HSYNC_E) & 0x0000ffff) + 1;
382 si->ps.p2_timing.h_total = (DAC2R(FP_HTOTAL) & 0x0000ffff) + 1;
384 si->ps.p2_timing.v_sync_start = (DAC2R(FP_VSYNC_S) & 0x0000ffff) + 1;
385 si->ps.p2_timing.v_sync_end = (DAC2R(FP_VSYNC_E) & 0x0000ffff) + 1;
386 si->ps.p2_timing.v_total = (DAC2R(FP_VTOTAL) & 0x0000ffff) + 1;
388 si->ps.p2_timing.flags = 0;
389 if (DAC2R(FP_TG_CTRL) & 0x00000001) si->ps.p2_timing.flags |= B_POSITIVE_VSYNC;
390 if (DAC2R(FP_TG_CTRL) & 0x00000010) si->ps.p2_timing.flags |= B_POSITIVE_HSYNC;
393 si->ps.p2_timing.pixel_clock =
394 (si->ps.p2_timing.h_total * si->ps.p2_timing.v_total * 60) / 1000;
427 if(si->ps.secondary_head)
463 si->ps.monitors = 0x00;
465 si->ps.crtc2_prim = false;
468 if (0)//si->ps.secondary_head)
470 if (si->ps.card_type != NV11)
477 if (si->ps.tmds1_active) si->ps.monitors |= 0x01;
478 if (si->ps.tmds2_active) si->ps.monitors |= 0x10;
481 if (eng_dac_crt_connected()) si->ps.monitors |= 0x02;
483 if (eng_dac2_crt_connected()) si->ps.monitors |= 0x20;
487 switch (si->ps.monitors)
518 si->ps.crtc2_prim = true;
524 si->ps.crtc2_prim = true;
535 si->ps.crtc2_prim = true;
546 si->ps.crtc2_prim = true;
559 LOG(2,("INFO: illegal monitor setup ($%02x):\n", si->ps.monitors));
570 if (si->ps.tmds1_active) si->ps.monitors |= 0x01;
571 if (si->ps.tmds2_active) si->ps.monitors |= 0x10;
574 if (eng_dac_crt_connected()) si->ps.monitors |= 0x02;
579 switch (si->ps.monitors)
606 si->ps.crtc2_prim = true;
617 si->ps.crtc2_prim = true;
620 LOG(2,("INFO: illegal monitor setup ($%02x):\n", si->ps.monitors));
629 si->ps.tmds1_active = false;
630 si->ps.tmds2_active = false;
634 if (si->ps.tmds1_active) si->ps.monitors |= 0x01;
638 if (1/*eng_dac_crt_connected()*/) si->ps.monitors |= 0x02;
646 if (si->ps.tmds1_active)
649 p1->timing = si->ps.p1_timing;
662 if (si->ps.tmds2_active)
665 p2->timing = si->ps.p2_timing;
681 si->ps.f_ref = 14.31818;
683 si->ps.ext_pll = false;
685 si->ps.max_system_vco = 230;
686 si->ps.min_system_vco = 20;
687 si->ps.max_pixel_vco = 400; /* VESA BIOS uses upto 433Mhz */
688 si->ps.min_pixel_vco = 50; /* VESA BIOS uses downto 53.2Mhz */
689 si->ps.max_video_vco = 0;
690 si->ps.min_video_vco = 0;
691 si->ps.max_dac1_clock = 230;
692 si->ps.max_dac1_clock_8 = 230;
693 si->ps.max_dac1_clock_16 = 230;
695 si->ps.max_dac1_clock_24 = 200;
696 si->ps.max_dac1_clock_32 = 180;
697 si->ps.max_dac1_clock_32dh = 180;
699 si->ps.max_dac2_clock = 0;
700 si->ps.max_dac2_clock_8 = 0;
701 si->ps.max_dac2_clock_16 = 0;
702 si->ps.max_dac2_clock_24 = 0;
703 si->ps.max_dac2_clock_32 = 0;
705 si->ps.max_dac2_clock_32dh = 0;
707 si->ps.primary_dvi = false;
708 si->ps.secondary_dvi = false;
710 si->ps.std_engine_clock = 90;
711 si->ps.std_memory_clock = 110;
717 si->ps.ext_pll = false;
719 si->ps.max_system_vco = 300;
720 si->ps.min_system_vco = 128;
721 si->ps.max_pixel_vco = 300;
722 si->ps.min_pixel_vco = 128;
723 si->ps.max_video_vco = 0;
724 si->ps.min_video_vco = 0;
725 si->ps.max_dac1_clock = 300;
726 si->ps.max_dac1_clock_8 = 300;
727 si->ps.max_dac1_clock_16 = 300;
729 si->ps.max_dac1_clock_24 = 270;
730 si->ps.max_dac1_clock_32 = 230;
731 si->ps.max_dac1_clock_32dh = 230;
733 si->ps.max_dac2_clock = 0;
734 si->ps.max_dac2_clock_8 = 0;
735 si->ps.max_dac2_clock_16 = 0;
736 si->ps.max_dac2_clock_24 = 0;
737 si->ps.max_dac2_clock_32 = 0;
739 si->ps.max_dac2_clock_32dh = 0;
741 si->ps.primary_dvi = false;
742 si->ps.secondary_dvi = false;
744 si->ps.std_engine_clock = 125;
745 si->ps.std_memory_clock = 150;
751 si->ps.ext_pll = false;
753 si->ps.max_system_vco = 300;
754 si->ps.min_system_vco = 128;
755 si->ps.max_pixel_vco = 300;
756 si->ps.min_pixel_vco = 128;
757 si->ps.max_video_vco = 0;
758 si->ps.min_video_vco = 0;
759 si->ps.max_dac1_clock = 300;
760 si->ps.max_dac1_clock_8 = 300;
761 si->ps.max_dac1_clock_16 = 300;
763 si->ps.max_dac1_clock_24 = 270;
764 si->ps.max_dac1_clock_32 = 230;
765 si->ps.max_dac1_clock_32dh = 230;
767 si->ps.max_dac2_clock = 0;
768 si->ps.max_dac2_clock_8 = 0;
769 si->ps.max_dac2_clock_16 = 0;
770 si->ps.max_dac2_clock_24 = 0;
771 si->ps.max_dac2_clock_32 = 0;
773 si->ps.max_dac2_clock_32dh = 0;
775 si->ps.primary_dvi = false;
776 si->ps.secondary_dvi = false;
778 si->ps.std_engine_clock = 100;
779 si->ps.std_memory_clock = 125;
785 si->ps.ext_pll = false;
787 si->ps.max_system_vco = 350;
788 si->ps.min_system_vco = 128;
789 si->ps.max_pixel_vco = 350;
790 si->ps.min_pixel_vco = 128;
791 si->ps.max_video_vco = 350;
792 si->ps.min_video_vco = 128;
793 si->ps.max_dac1_clock = 350;
794 si->ps.max_dac1_clock_8 = 350;
795 si->ps.max_dac1_clock_16 = 350;
797 si->ps.max_dac1_clock_24 = 320;
798 si->ps.max_dac1_clock_32 = 280;
799 si->ps.max_dac1_clock_32dh = 250;
801 if (si->ps.card_type < NV17)
806 si->ps.max_dac2_clock = 200;
807 si->ps.max_dac2_clock_8 = 200;
808 si->ps.max_dac2_clock_16 = 200;
809 si->ps.max_dac2_clock_24 = 200;
810 si->ps.max_dac2_clock_32 = 200;
812 si->ps.max_dac2_clock_32dh = 180;
818 si->ps.max_dac2_clock = 350;
819 si->ps.max_dac2_clock_8 = 350;
820 si->ps.max_dac2_clock_16 = 350;
822 si->ps.max_dac2_clock_24 = 320;
823 si->ps.max_dac2_clock_32 = 280;
824 si->ps.max_dac2_clock_32dh = 250;
827 si->ps.primary_dvi = false;
828 si->ps.secondary_dvi = false;
830 si->ps.std_engine_clock = 120;
831 si->ps.std_memory_clock = 150;
837 si->ps.ext_pll = false;
839 si->ps.max_system_vco = 350;
840 si->ps.min_system_vco = 128;
841 si->ps.max_pixel_vco = 350;
842 si->ps.min_pixel_vco = 128;
843 si->ps.max_video_vco = 350;
844 si->ps.min_video_vco = 128;
845 si->ps.max_dac1_clock = 350;
846 si->ps.max_dac1_clock_8 = 350;
847 si->ps.max_dac1_clock_16 = 350;
849 si->ps.max_dac1_clock_24 = 320;
850 si->ps.max_dac1_clock_32 = 280;
851 si->ps.max_dac1_clock_32dh = 250;
855 si->ps.max_dac2_clock = 350;
856 si->ps.max_dac2_clock_8 = 350;
857 si->ps.max_dac2_clock_16 = 350;
859 si->ps.max_dac2_clock_24 = 320;
860 si->ps.max_dac2_clock_32 = 280;
861 si->ps.max_dac2_clock_32dh = 250;
863 si->ps.primary_dvi = false;
864 si->ps.secondary_dvi = false;
866 si->ps.std_engine_clock = 175;
867 si->ps.std_memory_clock = 200;
875 switch (si->ps.card_type)
881 si->ps.ext_pll = true;
885 si->ps.ext_pll = false;
889 si->ps.max_system_vco = 350;
890 si->ps.min_system_vco = 128;
891 si->ps.max_pixel_vco = 350;
892 si->ps.min_pixel_vco = 128;
893 si->ps.max_video_vco = 350;
894 si->ps.min_video_vco = 128;
895 si->ps.max_dac1_clock = 350;
896 si->ps.max_dac1_clock_8 = 350;
897 si->ps.max_dac1_clock_16 = 350;
899 si->ps.max_dac1_clock_24 = 320;
900 si->ps.max_dac1_clock_32 = 280;
901 si->ps.max_dac1_clock_32dh = 250;
905 si->ps.max_dac2_clock = 350;
906 si->ps.max_dac2_clock_8 = 350;
907 si->ps.max_dac2_clock_16 = 350;
909 si->ps.max_dac2_clock_24 = 320;
910 si->ps.max_dac2_clock_32 = 280;
911 si->ps.max_dac2_clock_32dh = 250;
913 si->ps.primary_dvi = false;
914 si->ps.secondary_dvi = false;
916 si->ps.std_engine_clock = 190;
917 si->ps.std_memory_clock = 190;
924 if (si->ps.card_arch == CLE266)
936 si->ps.memory_size = (ram_size + 1) * 512 * 1024;
943 si->ps.memory_size = ram_size * 4 * 1024 * 1024;
948 si->ps.memory_size = 16 * 1024 * 1024;
959 si->ps.f_ref = 14.31818;
961 si->ps.f_ref = 13.50000;
964 si->ps.secondary_head = false;
974 si->ps.f_ref = 14.31818;
976 si->ps.f_ref = 13.50000;
997 if (strapinfo & 0x00400000) si->ps.f_ref = 27.00000;
1024 si->ps.secondary_head = true;
1027 si->ps.secondary_head = false;
1038 if (si->ps.ext_pll) LOG(2,("extended\n")); else LOG(2,("standard\n"));
1039 LOG(2,("f_ref: %fMhz\n", si->ps.f_ref));
1040 LOG(2,("max_system_vco: %dMhz\n", si->ps.max_system_vco));
1041 LOG(2,("min_system_vco: %dMhz\n", si->ps.min_system_vco));
1042 LOG(2,("max_pixel_vco: %dMhz\n", si->ps.max_pixel_vco));
1043 LOG(2,("min_pixel_vco: %dMhz\n", si->ps.min_pixel_vco));
1044 LOG(2,("max_video_vco: %dMhz\n", si->ps.max_video_vco));
1045 LOG(2,("min_video_vco: %dMhz\n", si->ps.min_video_vco));
1046 LOG(2,("std_engine_clock: %dMhz\n", si->ps.std_engine_clock));
1047 LOG(2,("std_memory_clock: %dMhz\n", si->ps.std_memory_clock));
1048 LOG(2,("max_dac1_clock: %dMhz\n", si->ps.max_dac1_clock));
1049 LOG(2,("max_dac1_clock_8: %dMhz\n", si->ps.max_dac1_clock_8));
1050 LOG(2,("max_dac1_clock_16: %dMhz\n", si->ps.max_dac1_clock_16));
1051 LOG(2,("max_dac1_clock_24: %dMhz\n", si->ps.max_dac1_clock_24));
1052 LOG(2,("max_dac1_clock_32: %dMhz\n", si->ps.max_dac1_clock_32));
1053 LOG(2,("max_dac1_clock_32dh: %dMhz\n", si->ps.max_dac1_clock_32dh));
1054 LOG(2,("max_dac2_clock: %dMhz\n", si->ps.max_dac2_clock));
1055 LOG(2,("max_dac2_clock_8: %dMhz\n", si->ps.max_dac2_clock_8));
1056 LOG(2,("max_dac2_clock_16: %dMhz\n", si->ps.max_dac2_clock_16));
1057 LOG(2,("max_dac2_clock_24: %dMhz\n", si->ps.max_dac2_clock_24));
1058 LOG(2,("max_dac2_clock_32: %dMhz\n", si->ps.max_dac2_clock_32));
1059 LOG(2,("max_dac2_clock_32dh: %dMhz\n", si->ps.max_dac2_clock_32dh));
1061 if (si->ps.secondary_head) LOG(2,("present\n")); else LOG(2,("absent\n"));
1063 if (si->ps.tvout) LOG(2,("present\n")); else LOG(2,("absent\n"));
1065 switch (si->ps.tvout_chip_type)
1121 // if (si->ps.primary_dvi) LOG(2,("present\n")); else LOG(2,("absent\n"));
1123 // if (si->ps.secondary_dvi) LOG(2,("present\n")); else LOG(2,("absent\n"));
1124 LOG(2,("card memory_size: %3.3fMb\n", (si->ps.memory_size / (1024.0 * 1024.0))));
1126 if (si->ps.laptop) LOG(2,("yes\n")); else LOG(2,("no\n"));
1127 if (si->ps.tmds1_active)
1130 if (si->ps.slaved_tmds1) LOG(2,("slaved\n")); else LOG(2,("master\n"));
1132 si->ps.p1_timing.h_display, si->ps.p1_timing.v_display, si->ps.panel1_aspect));
1134 if (si->ps.tmds2_active)
1137 if (si->ps.slaved_tmds2) LOG(2,("slaved\n")); else LOG(2,("master\n"));
1139 si->ps.p2_timing.h_display, si->ps.p2_timing.v_display, si->ps.panel2_aspect));
1141 LOG(2,("monitor (output devices) setup matrix: $%02x\n", si->ps.monitors));