/linux-master/arch/arm/include/asm/ |
H A D | smp_scu.h | 32 int scu_get_cpu_power_mode(void __iomem *scu_base, unsigned int logical_cpu); 34 static inline unsigned int scu_get_core_count(void __iomem *scu_base) argument 38 static inline int scu_power_mode(void __iomem *scu_base, unsigned int mode) argument 42 static inline int scu_cpu_power_enable(void __iomem *scu_base, argument 47 static inline int scu_get_cpu_power_mode(void __iomem *scu_base, argument 55 void scu_enable(void __iomem *scu_base); 57 static inline void scu_enable(void __iomem *scu_base) {} argument
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/linux-master/arch/arm/kernel/ |
H A D | smp_scu.c | 29 unsigned int __init scu_get_core_count(void __iomem *scu_base) argument 31 unsigned int ncores = readl_relaxed(scu_base + SCU_CONFIG); 38 void scu_enable(void __iomem *scu_base) argument 45 scu_ctrl = readl_relaxed(scu_base + 0x30); 47 writel_relaxed(scu_ctrl | 0x1, scu_base + 0x30); 51 scu_ctrl = readl_relaxed(scu_base + SCU_CTRL); 63 writel_relaxed(scu_ctrl, scu_base + SCU_CTRL); 73 static int scu_set_power_mode_internal(void __iomem *scu_base, argument 83 val = readb_relaxed(scu_base + SCU_CPU_STATUS + cpu); 86 writeb_relaxed(val, scu_base 99 scu_power_mode(void __iomem *scu_base, unsigned int mode) argument 107 scu_cpu_power_enable(void __iomem *scu_base, unsigned int cpu) argument 112 scu_get_cpu_power_mode(void __iomem *scu_base, unsigned int logical_cpu) argument [all...] |
/linux-master/arch/arm/mach-ux500/ |
H A D | platsmp.c | 32 static void __iomem *scu_base; local 53 scu_base = of_iomap(np, 0); 55 if (!scu_base) { 60 scu_enable(scu_base); 61 ncores = scu_get_core_count(scu_base); 64 iounmap(scu_base);
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/linux-master/arch/arm/mach-versatile/ |
H A D | platsmp-realview.c | 42 void __iomem *scu_base; local 52 scu_base = of_iomap(np, 0); 54 if (!scu_base) { 59 scu_enable(scu_base); 60 ncores = scu_get_core_count(scu_base); 64 iounmap(scu_base);
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/linux-master/arch/arm/mach-bcm/ |
H A D | bcm63xx_smp.c | 38 void __iomem *scu_base; local 53 scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE); 54 if (!scu_base) { 60 scu_enable(scu_base); 62 ncores = scu_base ? scu_get_core_count(scu_base) : 1; 94 iounmap(scu_base); /* That's the last we'll need of this */
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H A D | platsmp.c | 50 void __iomem *scu_base; local 64 scu_base = ioremap((phys_addr_t)config_base, CORTEX_A9_SCU_SIZE); 65 if (!scu_base) { 71 scu_enable(scu_base); 73 iounmap(scu_base); /* That's the last we'll need of this */
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/linux-master/arch/arm/mach-npcm/ |
H A D | platsmp.c | 55 void __iomem *scu_base; local 62 scu_base = of_iomap(scu_np, 0); 63 if (!scu_base) { 68 scu_enable(scu_base); 70 iounmap(scu_base);
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/linux-master/arch/arm/mach-berlin/ |
H A D | platsmp.c | 61 void __iomem *scu_base; local 65 scu_base = of_iomap(np, 0); 67 if (!scu_base) 80 scu_enable(scu_base); 96 iounmap(scu_base);
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/linux-master/arch/arm/mach-sti/ |
H A D | platsmp.c | 52 void __iomem *scu_base; local 59 scu_base = of_iomap(np, 0); 60 scu_enable(scu_base);
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/linux-master/arch/arm/mach-spear/ |
H A D | platsmp.c | 39 static void __iomem *scu_base = IOMEM(VA_SCU_BASE); variable 100 unsigned int i, ncores = scu_get_core_count(scu_base); 115 scu_enable(scu_base);
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/linux-master/arch/arm/mach-imx/ |
H A D | platsmp.c | 21 static void __iomem *scu_base; variable 40 scu_base = IMX_IO_ADDRESS(base); 58 ncores = scu_get_core_count(scu_base); 66 scu_enable(scu_base);
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/linux-master/arch/arm/mach-meson/ |
H A D | platsmp.c | 35 static void __iomem *scu_base; variable 94 scu_base = of_iomap(node, 0); 96 if (!scu_base) { 101 scu_enable(scu_base); 131 scu_cpu_power_enable(scu_base, cpu); 301 scu_power_mode(scu_base, SCU_PM_POWEROFF); 317 power_mode = scu_get_cpu_power_mode(scu_base, cpu); 359 power_mode = scu_get_cpu_power_mode(scu_base, cpu);
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/linux-master/arch/arm/mach-omap2/ |
H A D | pm33xx-core.c | 37 static void __iomem *scu_base; variable 49 scu_base = ioremap(scu_a9_get_base(), SZ_256); 51 if (!scu_base) 194 scu_power_mode(scu_base, SCU_PM_POWEROFF); 196 scu_power_mode(scu_base, SCU_PM_NORMAL); 233 if (!scu_base) 236 scu_power_mode(scu_base, SCU_PM_DORMANT); 238 scu_power_mode(scu_base, SCU_PM_NORMAL);
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H A D | omap-smp.c | 47 void __iomem *scu_base; member in struct:omap_smp_config 71 return cfg.scu_base; 270 cfg.scu_base = OMAP2_L4_IO_ADDRESS(scu_a9_get_base()); 271 BUG_ON(!cfg.scu_base); 272 ncores = scu_get_core_count(cfg.scu_base); 371 /* Must preserve cfg.scu_base set earlier */ 390 if (cfg.scu_base) 391 scu_enable(cfg.scu_base);
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/linux-master/arch/arm/mach-hisi/ |
H A D | platsmp.c | 42 void __iomem *scu_base = NULL; local 46 scu_base = ioremap(base, SZ_4K); 47 if (!scu_base) { 48 pr_err("ioremap(scu_base) failed\n"); 51 scu_enable(scu_base); 52 iounmap(scu_base);
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/linux-master/arch/arm/mach-mvebu/ |
H A D | board-v7.c | 33 static void __iomem *scu_base; variable 44 scu_base = of_iomap(np, 0); 45 scu_enable(scu_base); 52 return scu_base;
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/linux-master/drivers/clk/ |
H A D | clk-aspeed.c | 44 static void __iomem *scu_base; variable 445 scu_base + ASPEED_CLK_SELECTION, 15, 0, 450 0, scu_base + ASPEED_CLK_SELECTION, 12, 3, 0, 459 scu_base + ASPEED_CLK_SELECTION, 16, 3, 0, 475 scu_base + ASPEED_MAC_CLK_DLY, 29, 0, 483 scu_base + ASPEED_MAC_CLK_DLY, 30, 0, 492 scu_base + ASPEED_CLK_SELECTION, 20, 3, 0, 501 scu_base + ASPEED_CLK_SELECTION_2, 0, 2, 0, 517 scu_base + ASPEED_CLK_SELECTION, 2, 0x3, 0, 524 scu_base [all...] |
/linux-master/arch/arm/mach-exynos/ |
H A D | platsmp.c | 171 static void __iomem *scu_base; local 173 if (!scu_base) { 176 scu_base = of_iomap(np, 0); 179 scu_base = ioremap(scu_a9_get_base(), SZ_4K); 182 scu_enable(scu_base);
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/linux-master/drivers/gpu/drm/gma500/ |
H A D | oaktrail_hdmi.c | 212 static void scu_busy_loop(void __iomem *scu_base) argument 217 status = readl(scu_base + 0x04); 220 status = readl(scu_base + 0x04);
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/linux-master/drivers/scsi/isci/ |
H A D | host.c | 1292 static void __iomem *scu_base(struct isci_host *isci_host) function 1621 void __iomem *scu_base, 1628 ihost->scu_registers = scu_base; 2345 status = sci_controller_construct(ihost, scu_base(ihost), smu_base(ihost)); 1620 sci_controller_construct(struct isci_host *ihost, void __iomem *scu_base, void __iomem *smu_base) argument
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