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4bdc0d67 |
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06-Jan-2020 |
Christoph Hellwig <hch@lst.de> |
remove ioremap_nocache and devm_ioremap_nocache ioremap has provided non-cached semantics by default since the Linux 2.6 days, so remove the additional ioremap_nocache interface. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
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d67fa6ca |
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08-Oct-2019 |
Ben Dooks <ben.dooks@codethink.co.uk> |
ARM: bcm: include local platsmp.h for bcm2836_smp_ops Include platsmp.h for the definition of bcm2836_smp_ops to fix the following warning: arch/arm/mach-bcm/platsmp.c:334:29: warning: symbol 'bcm2836_smp_ops' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Acked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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7b369a42 |
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22-Oct-2018 |
Stefan Wahren <stefan.wahren@i2se.com> |
ARM: mach-bcm: Switch bcm2835 and platsmp to SPDX identifier Adopt the SPDX license identifier headers to ease license compliance management. Cc: Simon Arlott <simon@arlott.org> Cc: Kapil Hali <kapilh@broadcom.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Eric Anholt <eric@anholt.net> Acked-by: Florian Fainelli <f.fainelli@gmail.com>
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968f7641 |
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07-Aug-2017 |
Phil Elwell <phil@raspberrypi.org> |
ARM: bcm2836: Send event when onlining other cores Secondary cores should enter a low-power idle state when waiting to be started. The "wfe" instruction causes a core to wait until an event or interrupt arrives before continuing to the next instruction, and the "sev" instruction sends a wakeup event to the other cores. Add an "sev" (and a memory barrier) to bcm2836_boot_secondary, the function that wakes the waiting cores during booting. This is required if the secondary cores are sitting in "wfe", and harmless if not. Signed-off-by: Phil Elwell <phil@raspberrypi.org> Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eric Anholt <eric@anholt.net>
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88bbe85d |
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06-Aug-2017 |
Stefan Wahren <stefan.wahren@i2se.com> |
irqchip: bcm2836: Move SMP startup code to arch/arm (v2) In order to easily provide SMP for BCM2837 on 32-bit and 64-bit the SMP startup code was placed in irq-bcm2836. That's not the right approach. So move this code where it belongs. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Fixes: 41f4988cc287 ("irqchip/bcm2836: Add SMP support for the 2836") Tested-by: Eric Anholt <eric@anholt.net> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
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e6017571 |
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01-Feb-2017 |
Ingo Molnar <mingo@kernel.org> |
sched/headers: Prepare for new header dependencies before moving code to <linux/sched/clock.h> We are going to split <linux/sched/clock.h> out of <linux/sched.h>, which will have to be picked up from other headers and .c files. Create a trivial placeholder <linux/sched/clock.h> file that just maps to <linux/sched.h> to make this patch obviously correct and bisectable. Include the new header in the files that are going to need it. Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mike Galbraith <efault@gmx.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-kernel@vger.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
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64fc2a94 |
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14-Jan-2017 |
Florian Fainelli <f.fainelli@gmail.com> |
ARM: 8641/1: treewide: Replace uses of virt_to_phys with __pa_symbol All low-level PM/SMP code using virt_to_phys() should actually use __pa_symbol() against kernel symbols. Update code where relevant to move away from virt_to_phys(). Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Laura Abbott <labbott@redhat.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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5fcf999a |
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11-May-2016 |
Chris Brand <chris.brand@broadcom.com> |
ARM: BCM23550 SMP support BCM23550 has a Cluster Dormant Control IP block that holds cores in an idle state. Support a new CPU enable method in which the CDC is accessed to bring the core online. Signed-off-by: Raymond Ngun <raymond.ngun@broadcom.com> Signed-off-by: Chris Brand <chris.brand@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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6585cb5a |
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28-Apr-2016 |
Chris Brand <chris.brand@broadcom.com> |
ARM: BCM: modify Broadcom CPU enable method Commit 84320e1a635fcf90cff4185f029ce9e31bf1d4a7 ("ARM: BCM: Clean up SMP support for Broadcom Kona") moved the "secondary-boot-reg" property from the "cpus" node to the individual "cpu" nodes but negelected to actually support multiple "secondary-boot-reg" properties. This patchset rectifies that omission. Note that the behaviour is changed slightly in that the "secondary-boot-reg" property is now read in smp_boot_secondary() rather than smp_prepare_cpus(). This means that any omissions will now only be reported when and if the cpu in question is being brought up. It also means that an omission for one cpu will not force uniprocessor mode. Signed-off-by: Chris Brand <chris.brand@broadcom.com> Reviewed-and-Tested-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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9480e085 |
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25-Jan-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: bcm: use const and __initconst for smp_operations This newly added code missed the global fixup by commit 75305275a721 ("ARM: use const and __initconst for smp_operations"). So fix it now. Also, add missing "static" qualifier. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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97890821 |
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01-Dec-2015 |
Kapil Hali <kapilh@broadcom.com> |
ARM: BCM: Add SMP support for Broadcom NSP Add SMP support for Broadcom's Northstar Plus SoC cpu enable method. This changes also consolidates iProc family's - BCM NSP and BCM Kona, platform SMP handling in a common file. Northstar Plus SoC is based on ARM Cortex-A9 revision r3p0 which requires configuration for ARM Errata 764369 for SMP. This change adds the needed configuration option. Signed-off-by: Kapil Hali <kapilh@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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