Searched refs:regval (Results 1 - 25 of 362) sorted by relevance

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/linux-master/drivers/bus/mhi/ep/
H A Dmmio.c25 u32 regval; local
27 regval = mhi_ep_mmio_read(mhi_cntrl, offset);
28 regval &= ~mask;
29 regval |= (val << __ffs(mask)) & mask;
30 mhi_ep_mmio_write(mhi_cntrl, offset, regval);
35 u32 regval; local
37 regval = mhi_ep_mmio_read(dev, offset);
38 regval &= mask;
39 regval >>= __ffs(mask);
41 return regval;
47 u32 regval; local
185 u32 regval; local
197 u32 regval; local
209 u32 regval; local
223 u32 regval; local
254 u32 regval; local
268 u32 regval; local
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/linux-master/drivers/net/ethernet/synopsys/
H A Ddwc-xlgmac-hw.c38 u32 regval; local
40 regval = readl(pdata->mac_regs + MAC_RCR);
41 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_IPC_POS,
43 writel(regval, pdata->mac_regs + MAC_RCR);
50 u32 regval; local
52 regval = readl(pdata->mac_regs + MAC_RCR);
53 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_IPC_POS,
55 writel(regval, pdat
112 u32 regval; local
137 u32 regval; local
149 u32 regval; local
182 u32 regval; local
221 u32 regval; local
247 u32 regval; local
277 u32 regval; local
375 u32 regval; local
395 u32 regval; local
415 u32 regval; local
501 u32 regval; local
535 u32 regval; local
605 unsigned int regval, i; local
642 u32 regval; local
1191 unsigned int reg, regval; local
1223 unsigned int reg, regval; local
1258 u32 regval; local
1270 u32 regval; local
1304 u32 regval; local
1330 u32 regval; local
1343 u32 regval; local
1362 u32 regval; local
1381 u32 regval; local
1401 u32 regval; local
1461 u32 regval; local
1476 u32 regval; local
1508 unsigned int reg, regval; local
1634 u32 regval; local
1656 u32 regval; local
1677 u32 regval; local
1695 u32 regval; local
1711 u32 regval; local
1727 u32 regval; local
1743 u32 regval; local
1764 u32 regval; local
1780 u32 regval; local
1792 u32 regval; local
1811 u32 regval; local
1823 u32 regval; local
2127 u32 regval; local
2267 u32 regval; local
2284 u32 regval; local
2386 u32 regval; local
2416 u32 regval; local
2530 u32 regval; local
2551 u32 regval; local
2568 u32 regval; local
2585 u32 regval; local
2602 u32 regval; local
2946 u32 regval; local
2973 u32 regval; local
3044 u32 regval; local
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/linux-master/drivers/power/supply/
H A Dmm8013.c95 u32 regval; local
99 ret = regmap_read(chip->regmap, REG_STATE_OF_CHARGE, &regval);
103 val->intval = regval;
106 ret = regmap_read(chip->regmap, REG_FULL_CHARGE_CAPACITY, &regval);
110 val->intval = 1000 * regval;
113 ret = regmap_read(chip->regmap, REG_DESIGN_CAPACITY, &regval);
117 val->intval = 1000 * regval;
120 ret = regmap_read(chip->regmap, REG_NOMINAL_CHARGE_CAPACITY, &regval);
124 val->intval = 1000 * regval;
127 ret = regmap_read(chip->regmap, REG_MAX_LOAD_CURRENT, &regval);
[all...]
H A Dltc4162-l-charger.c131 unsigned int regval; local
134 ret = regmap_read(info->regmap, LTC4162L_CHARGER_STATE, &regval);
140 val->intval = ltc4162l_state_decode(regval);
161 unsigned int regval; local
164 ret = regmap_read(info->regmap, LTC4162L_CHARGE_STATUS, &regval);
168 val->intval = ltc4162l_charge_status_decode(regval);
194 unsigned int regval; local
197 ret = regmap_read(info->regmap, LTC4162L_CHARGER_STATE, &regval);
201 val->intval = ltc4162l_state_to_health(regval);
209 unsigned int regval; local
226 unsigned int regval; local
245 unsigned int regval; local
263 unsigned int regval; local
279 unsigned int regval; local
301 unsigned int regval; local
339 unsigned int regval; local
387 unsigned int regval; local
408 unsigned int regval; local
423 unsigned int regval; local
443 unsigned int regval; local
472 unsigned int regval; local
511 unsigned int regval; local
585 unsigned int regval; local
624 unsigned int regval; local
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/linux-master/arch/mips/loongson2ef/lemote-2f/
H A Dclock.c37 int regval; local
45 regval = readl(LOONGSON_CHIPCFG);
46 regval = (regval & ~0x7) | (pos->driver_data - 1);
47 writel(regval, LOONGSON_CHIPCFG);
/linux-master/drivers/dma/ptdma/
H A Dptdma-debugfs.c26 unsigned int regval; local
32 regval = ioread32(pt->io_regs + CMD_PT_VERSION);
34 seq_printf(s, " Version: %d\n", regval & RI_VERSION_NUM);
37 seq_printf(s, " Queues: %d\n", (regval & RI_NUM_VQM) >> RI_NVQM_SHIFT);
58 unsigned int regval; local
65 regval = ioread32(cmd_q->reg_control + 0x000C);
68 if (regval & INT_EMPTY_QUEUE)
70 if (regval & INT_QUEUE_STOPPED)
72 if (regval & INT_ERROR)
74 if (regval
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/linux-master/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_opp_csc_v.c132 tbl_entry->regval[0],
138 tbl_entry->regval[1],
150 tbl_entry->regval[2],
156 tbl_entry->regval[3],
168 tbl_entry->regval[4],
174 tbl_entry->regval[5],
186 tbl_entry->regval[6],
192 tbl_entry->regval[7],
204 tbl_entry->regval[8],
210 tbl_entry->regval[
508 uint32_t regval[12]; member in struct:input_csc_matrix
536 const uint32_t *regval = NULL; local
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/linux-master/drivers/hwmon/
H A Dina238.c134 int regval; local
188 err = regmap_read(data->regmap, reg, &regval);
197 regval = (s16)regval;
200 *val = (regval * INA238_SHUNT_VOLTAGE_LSB) /
203 *val = (regval * INA238_BUS_VOLTAGE_LSB) / 1000;
207 *val = !!(regval & mask);
218 int regval; local
227 regval = clamp_val(val, -163, 163);
228 regval
266 int regval; local
290 int regval; local
336 long regval; local
357 int regval; local
394 int regval; local
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H A Dmax31730.c84 u8 regval = *confdata; local
88 regval |= BIT(channel);
90 regval &= ~BIT(channel);
92 if (regval != *confdata) {
93 err = i2c_smbus_write_byte_data(client, reg, regval);
96 *confdata = regval;
119 int regval, reg, offset; local
153 regval = i2c_smbus_read_byte_data(data->client,
155 if (regval < 0)
156 return regval;
364 int regval; local
375 int regval; local
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H A Dadt7410.c30 int regval; local
37 regval = i2c_smbus_read_word_swapped(client, reg);
40 regval = i2c_smbus_read_byte_data(client, reg);
43 if (regval < 0)
44 return regval;
45 *val = regval;
H A Dmax6621.c167 static int max6621_verify_reg_data(struct device *dev, int regval) argument
169 if (regval >= MAX6621_PECI_ERR_MIN &&
170 regval <= MAX6621_PECI_ERR_MAX) {
172 regval);
177 switch (regval) {
180 regval);
183 dev_dbg(dev, "Polling disabled - err 0x%04x.\n", regval);
187 regval);
190 dev_dbg(dev, "Resource is disabled - err 0x%04x.\n", regval);
193 dev_dbg(dev, "No alert active - err 0x%04x.\n", regval);
205 u32 regval; local
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H A Dmax31760.c81 unsigned int regval; local
91 ret = regmap_read(state->regmap, REG_STATUS, &regval);
95 *val = FIELD_GET(STATUS_RDFA, regval);
99 ret = regmap_read(state->regmap, REG_STATUS, &regval);
104 *val = FIELD_GET(STATUS_ALARM_MAX(1), regval);
106 *val = FIELD_GET(STATUS_ALARM_MAX(0), regval);
110 ret = regmap_read(state->regmap, REG_STATUS, &regval);
115 *val = FIELD_GET(STATUS_ALARM_CRIT(1), regval);
117 *val = FIELD_GET(STATUS_ALARM_CRIT(0), regval);
153 ret = regmap_read(state->regmap, REG_STATUS, &regval);
417 unsigned int regval; local
451 unsigned int regval; local
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H A Dtmp401.c147 int regval; local
166 regval = i2c_smbus_read_word_swapped(client, reg);
167 if (regval < 0)
168 return regval;
169 *val = regval;
174 regval = i2c_smbus_read_byte_data(client, reg);
175 if (regval < 0)
176 return regval;
177 *val = regval << 8;
182 regval
311 unsigned int regval; local
364 unsigned int regval; local
403 u32 regval; local
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/linux-master/drivers/media/pci/cx23885/
H A Dcx23885-417.c275 u32 regval; local
280 regval = MC417_SPD_CTL(MC417_SPD_CTL_FAST) |
283 cx_write(MC417_CTL, regval);
286 regval = MC417_MIRDY;
287 cx_write(MC417_OEN, regval);
290 regval = MC417_MIWR | MC417_MIRD | MC417_MICS;
291 cx_write(MC417_RWD, regval);
311 u32 regval; local
319 regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_DATA_BYTE0 |
321 cx_write(MC417_RWD, regval);
376 u32 regval; local
469 u32 regval; local
534 u32 regval; local
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/linux-master/drivers/i2c/busses/
H A Di2c-mchp-pci1xxxx.c373 u8 regval; local
375 regval = readb(p);
378 regval |= SMBALERT_MST_PU;
380 regval &= ~SMBALERT_MST_PU;
382 writeb(regval, p);
388 u8 regval; local
390 regval = readb(p);
393 regval |= SMB_CORE_CMD_START;
395 regval |= SMB_CORE_CMD_STOP;
397 writeb(regval,
407 u8 regval; local
442 u8 regval; local
452 u8 regval; local
481 u8 regval; local
491 u8 regval; local
508 u8 regval; local
562 u8 regval; local
582 u8 regval; local
597 u8 regval; local
619 u8 regval; local
634 u16 regval; local
710 u8 regval; local
765 u8 regval; local
789 u32 regval; local
909 u32 regval; local
1071 u32 regval; local
1105 u32 regval; local
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/linux-master/drivers/spi/
H A Dspi-pci1xxxx.c202 u32 regval; local
204 return readx_poll_timeout(pci1xxxx_set_sys_lock, par, regval,
205 (regval & SPI_SYSLOCK), 100,
218 u32 regval; local
231 regval = readl(spi_bus->reg_base + DEV_REV_REG);
232 spi_bus->dev_rev = regval & DEV_REV_MASK;
234 regval = readl(spi_bus->reg_base +
236 pf_num = regval & SPI_PERI_ENBLE_PF_MASK;
306 u32 regval; local
309 regval
386 u32 regval; local
402 u32 regval; local
420 u32 regval; local
479 u32 regval; local
580 u32 regval; local
631 u32 regval; local
704 u32 regval; local
845 u32 regval; local
871 u32 regval = SPI_RESUME_CONFIG; local
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/linux-master/arch/sparc/include/asm/
H A Dturbosparc.h106 static inline void turbosparc_set_ccreg(unsigned long regval) argument
110 : "r" (regval), "r" (0x600), "i" (ASI_M_MMUREGS)
116 unsigned long regval; local
119 : "=r" (regval)
121 return regval;
/linux-master/drivers/phy/marvell/
H A Dphy-berlin-sata.c69 u32 regval; local
75 regval = readl(ctrl_reg + PORT_VSR_DATA);
76 regval &= ~mask;
77 regval |= val;
78 writel(regval, ctrl_reg + PORT_VSR_DATA);
86 u32 regval; local
94 regval = readl(priv->base + HOST_VSA_DATA);
95 regval &= ~desc->power_bit;
96 writel(regval, priv->base + HOST_VSA_DATA);
100 regval
138 u32 regval; local
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/linux-master/drivers/clk/hisilicon/
H A Dclk-hisi-phase.c31 u32 regval)
36 if (phase->phase_regvals[i] == regval)
45 u32 regval; local
47 regval = readl(phase->reg);
48 regval = (regval & phase->mask) >> phase->shift;
50 return hisi_phase_regval_to_degrees(phase, regval);
69 int regval; local
72 regval = hisi_phase_degrees_to_regval(phase, degrees);
73 if (regval <
30 hisi_phase_regval_to_degrees(struct clk_hisi_phase *phase, u32 regval) argument
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/linux-master/drivers/edac/
H A Dversal_edac.c252 u32 regval; local
259 regval = readl(ddrmc_base + ECCR0_CE_ADDR_LO_OFFSET);
260 reghi = regval & ECCR_UE_CE_ADDR_HI_ROW_MASK;
261 p->ceinfo[0].i = regval | reghi << 32;
262 regval = readl(ddrmc_base + ECCR0_CE_ADDR_HI_OFFSET);
269 regval = readl(ddrmc_base + ECCR1_CE_ADDR_LO_OFFSET);
271 p->ceinfo[1].i = regval | reghi << 32;
272 regval = readl(ddrmc_base + ECCR1_CE_ADDR_HI_OFFSET);
284 u32 regval; local
291 regval
460 int regval; local
501 u32 regval; local
555 u32 regval; local
685 u32 index, regval; local
934 process_bit(struct edac_priv *priv, unsigned int start, u32 regval) argument
948 u32 regval; local
970 u32 regval; local
994 u32 regval; local
1008 u32 regval; local
1080 u32 edac_mc_id, regval; local
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/linux-master/drivers/rapidio/switches/
H A Didt_gen2.c199 u32 regval; local
205 IDT_RIO_DOMAIN, &regval);
207 *sw_domain = (u8)(regval & 0xff);
215 u32 regval; local
240 rio_read_config_32(rdev, IDT_DEV_CTRL_1, &regval);
242 regval | IDT_DEV_CTRL_1_GENPW | IDT_DEV_CTRL_1_PRSTBEH);
258 rio_read_config_32(rdev, IDT_PORT_OPS(i), &regval);
260 IDT_PORT_OPS(i), regval | IDT_PORT_OPS_GENPW |
280 rio_read_config_32(rdev, IDT_LANE_CTRL(i), &regval);
282 regval | IDT_LANE_CTRL_GENP
324 u32 regval, em_perrdet, em_ltlerrdet; local
373 u32 regval; local
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/linux-master/drivers/clk/qcom/
H A Dclk-krait.c26 u32 regval; local
30 regval = krait_get_l2_indirect_reg(mux->offset);
34 regval |= SECCLKAGD;
35 krait_set_l2_indirect_reg(mux->offset, regval);
38 regval &= ~(mux->mask << mux->shift);
39 regval |= (sel & mux->mask) << mux->shift;
41 regval &= ~(mux->mask << (mux->shift + LPL_SHIFT));
42 regval |= (sel & mux->mask) << (mux->shift + LPL_SHIFT);
44 krait_set_l2_indirect_reg(mux->offset, regval);
48 regval
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/linux-master/drivers/soc/qcom/
H A Dice.c53 u32 regval = qcom_ice_readl(ice, QCOM_ICE_REG_VERSION); local
55 int major = FIELD_GET(GENMASK(31, 24), regval);
56 int minor = FIELD_GET(GENMASK(23, 16), regval);
57 int step = FIELD_GET(GENMASK(15, 0), regval);
70 regval = qcom_ice_readl(ice, QCOM_ICE_REG_FUSE_SETTING);
71 if (regval & (QCOM_ICE_FUSE_SETTING_MASK |
83 u32 regval; local
85 regval = qcom_ice_readl(ice, QCOM_ICE_REG_ADVANCED_CONTROL);
88 regval |= 0x7000;
89 qcom_ice_writel(ice, regval, QCOM_ICE_REG_ADVANCED_CONTRO
94 u32 regval; local
119 u32 regval; local
[all...]
/linux-master/drivers/platform/mellanox/
H A Dmlxreg-io.c49 bool rw_flag, int regsize, u32 *regval)
53 ret = regmap_read(regmap, data->reg, regval);
73 *regval = !!(*regval & ~data->mask);
76 *regval &= data->mask;
78 *regval |= ~data->mask;
84 *regval = ror32(*regval & data->mask, (data->bit - 1));
89 *regval = (*regval
48 mlxreg_io_get_reg(void *regmap, struct mlxreg_core_data *data, u32 in_val, bool rw_flag, int regsize, u32 *regval) argument
117 u32 regval = 0; local
143 u32 input_val, regval; local
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/linux-master/drivers/leds/
H A Dleds-mlxreg.c64 u32 regval; local
80 ret = regmap_read(led_pdata->regmap, data->reg, &regval);
86 regval = (regval & data->mask) | nib;
88 ret = regmap_write(led_pdata->regmap, data->reg, regval);
102 u32 regval; local
115 err = regmap_read(led_pdata->regmap, data->reg, &regval);
123 regval = regval & ~data->mask;
124 regval
190 u32 regval; local
[all...]

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