/linux-master/arch/mips/ath79/ |
H A D | clock.c | 95 unsigned long ref_rate; local 103 ref_rate = ath79_setup_ref_clk(AR71XX_BASE_FREQ); 108 freq = div * ref_rate; 146 unsigned long ref_rate; local 159 ref_rate = (40 * 1000 * 1000); 161 ref_rate = (25 * 1000 * 1000); 163 ath79_setup_ref_clk(ref_rate); 234 unsigned long ref_rate; local 247 ref_rate = 40 * 1000 * 1000; 249 ref_rate 352 unsigned long ref_rate; local 435 unsigned long ref_rate; local 518 unsigned long ref_rate; local [all...] |
/linux-master/drivers/phy/samsung/ |
H A D | phy-samsung-usb2.h | 39 unsigned long ref_rate; member in struct:samsung_usb2_phy_driver
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H A D | phy-samsung-usb2.c | 205 drv->ref_rate = clk_get_rate(drv->ref_clk); 207 ret = drv->cfg->rate_to_clk(drv->ref_rate, &drv->ref_reg_val);
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H A D | phy-exynos5-usbdrd.c | 872 unsigned long ref_rate; local 886 ref_rate = clk_get_rate(phy_drd->ref_clk); 888 ret = exynos5_rate_to_clk(ref_rate, &phy_drd->extrefclk); 891 ref_rate);
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/linux-master/drivers/clk/ti/ |
H A D | clkt_dpll.c | 292 unsigned long ref_rate; local 305 ref_rate = clk_hw_get_rate(dd->clk_ref); 310 scaled_rt_rp = target_rate / (ref_rate / DPLL_SCALE_FACTOR); 336 ref_rate);
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H A D | dpll3xxx.c | 304 unsigned long ref_rate; local 318 ref_rate = clk_hw_get_rate(dd->clk_ref); 320 (ref_rate / dd->last_rounded_n) / (4 * dd->ssc_modfreq); 321 if (dd->ssc_modfreq > (ref_rate / 70)) 323 __clk_get_name(clk->hw.clk), ref_rate / 70);
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/linux-master/arch/arm64/kernel/ |
H A D | topology.c | 122 u64 ratio, ref_rate = arch_timer_get_rate(); local 124 if (unlikely(!max_rate || !ref_rate)) { 134 * ref_rate 143 ratio = ref_rate << (2 * SCHED_CAPACITY_SHIFT);
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/linux-master/arch/arm/mach-omap1/ |
H A D | clock.c | 234 unsigned long ref_rate; local 236 ref_rate = ck_ref_p->rate; 242 if (ptr->xtal != ref_rate) 329 unsigned long ref_rate; local 331 ref_rate = ck_ref_p->rate; 339 if (ptr->xtal != ref_rate)
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/linux-master/drivers/clk/tegra/ |
H A D | clk-dfll.c | 202 #define DVCO_RATE_TO_MULT(rate, ref_rate) ((rate) / ((ref_rate) / 2)) 203 #define MULT_TO_DVCO_RATE(mult, ref_rate) ((mult) * ((ref_rate) / 2)) 276 unsigned long ref_rate; member in struct:tegra_dfll 584 div = DIV_ROUND_UP(td->ref_rate, td->pwm_rate); 855 val = DVCO_RATE_TO_MULT(rate, td->ref_rate); 862 req->dvco_target_rate = MULT_TO_DVCO_RATE(req->mult_bits, td->ref_rate); 1231 * @ref_rate: DFLL reference clock rate 1237 unsigned long ref_rate) 1236 dfll_calc_monitored_rate(u32 monitor_data, unsigned long ref_rate) argument [all...] |
/linux-master/sound/soc/meson/ |
H A D | axg-spdifin.c | 49 unsigned int ref_rate; member in struct:axg_spdifin_cfg 165 ret = clk_set_rate(priv->refclk, priv->conf->ref_rate); 396 .ref_rate = 333333333,
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/linux-master/drivers/clk/nxp/ |
H A D | clk-lpc32xx.c | 477 unsigned long rate, cco_rate, ref_rate; local 503 ref_rate = parent_rate / clk->n_div; 504 rate = cco_rate = ref_rate * clk->m_div; 524 && pll_is_valid(ref_rate, 1, 1000000, 27000000))) 527 parent_rate, cco_rate, ref_rate);
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/linux-master/drivers/clk/ralink/ |
H A D | clk-mtmips.c | 528 static u32 mt7620_calc_rate(u32 ref_rate, u32 mul, u32 div) argument 532 t = ref_rate;
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/linux-master/drivers/net/wireless/realtek/rtw89/ |
H A D | mac_be.c | 1059 rtw89_write32_mask(rtwdev, reg, rrsr->ref_rate.mask, rrsr->ref_rate.data);
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H A D | mac.c | 2605 reg = rtw89_mac_reg_by_idx(rtwdev, rrsr->ref_rate.addr, mac_idx); 2606 rtw89_write32_mask(rtwdev, reg, rrsr->ref_rate.mask, rrsr->ref_rate.data);
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H A D | rtw8852a.c | 473 .ref_rate = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_REF_RATE_SEL, 0},
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H A D | rtw8851b.c | 180 .ref_rate = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_REF_RATE_SEL, 0},
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H A D | rtw8852c.c | 142 .ref_rate = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_REF_RATE_SEL, 0},
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H A D | rtw8852b.c | 305 .ref_rate = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_REF_RATE_SEL, 0},
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H A D | rtw8922a.c | 160 .ref_rate = {R_BE_TRXPTCL_RESP_1, B_BE_WMAC_RESP_REF_RATE_SEL, 0},
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H A D | core.h | 3775 struct rtw89_reg3_def ref_rate; member in struct:rtw89_rrsr_cfgs
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/linux-master/block/ |
H A D | bfq-iosched.c | 274 * duration = (ref_rate / r) * ref_wr_duration, 275 * where r is the peak rate of the device, and ref_rate and 277 * ref_rate is the peak rate of the reference storage device (see 287 * BFQ uses two different reference pairs (ref_rate, ref_wr_duration), 290 * In the following definitions, ref_rate[0] and ref_wr_duration[0] 292 * ref_rate[1] and ref_wr_duration[1] are the reference values for a 304 static int ref_rate[2] = {14000, 33000}; variable 7325 bfqd->rate_dur_prod = ref_rate[blk_queue_nonrot(bfqd->queue)] * 7327 bfqd->peak_rate = ref_rate[blk_queue_nonrot(bfqd->queue)] * 2 / 3;
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