Searched refs:pstate (Results 1 - 25 of 174) sorted by relevance

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/linux-master/tools/testing/selftests/amd-pstate/
H A Dbasic.sh4 # amd-pstate-ut is a test module for testing the amd-pstate driver.
6 # must be amd-pstate.
27 if ! /sbin/modprobe -q -n amd-pstate-ut; then
28 echo "amd-pstate-ut: module amd-pstate-ut is not found [SKIP]"
31 if /sbin/modprobe -q amd-pstate-ut; then
32 /sbin/modprobe -q -r amd-pstate-ut
33 echo "amd-pstate-basic: ok"
35 echo "amd-pstate
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/linux-master/arch/sparc/include/asm/
H A Dhibernate.h17 unsigned long pstate; member in struct:saved_context
/linux-master/tools/testing/selftests/arm64/signal/testcases/
H A Dmangle_pstate_invalid_mode_template.h15 uc->uc_mcontext.pstate &= ~PSR_MODE_MASK; \
16 uc->uc_mcontext.pstate |= PSR_MODE_EL ## _mode; \
H A Dmangle_pstate_invalid_compat_toggle.c19 uc->uc_mcontext.pstate ^= PSR_MODE32_BIT;
H A Dmangle_pstate_invalid_daif_bits.c23 uc->uc_mcontext.pstate |= PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT;
/linux-master/tools/power/cpupower/utils/helpers/
H A Damd.c33 } pstate; member in union:core_pstate
47 static int get_did(union core_pstate pstate) argument
52 t = pstate.pstatedef.did;
54 t = pstate.val & 0xf;
56 t = pstate.pstate.did;
61 static int get_cof(union core_pstate pstate) argument
66 did = get_did(pstate);
68 fid = pstate.pstatedef.fid;
72 fid = pstate
96 union core_pstate pstate; local
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dbase.c42 u8 pstate, u8 domain, u32 input)
49 data = nvbios_boostEm(bios, pstate, &ver, &hdr, &cnt, &len, &boostE);
112 nvkm_cstate_find_best(struct nvkm_clk *clk, struct nvkm_pstate *pstate, argument
119 if (!pstate || !cstate)
136 list_for_each_entry_from_reverse(cstate, &pstate->list, head) {
145 nvkm_cstate_get(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei) argument
149 return list_last_entry(&pstate->list, typeof(*cstate), head);
151 list_for_each_entry(cstate, &pstate->list, head) {
160 nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei) argument
169 if (!list_empty(&pstate
41 nvkm_clk_adjust(struct nvkm_clk *clk, bool adjust, u8 pstate, u8 domain, u32 input) argument
225 nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate) argument
272 struct nvkm_pstate *pstate; local
304 int pstate; local
346 nvkm_pstate_info(struct nvkm_clk *clk, struct nvkm_pstate *pstate) argument
389 nvkm_pstate_del(struct nvkm_pstate *pstate) argument
406 struct nvkm_pstate *pstate; local
475 struct nvkm_pstate *pstate; local
627 struct nvkm_pstate *pstate, *temp; local
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/linux-master/arch/arm64/kvm/hyp/include/hyp/
H A Dadjust_pc.h36 vcpu_gp_regs(vcpu)->pstate = read_sysreg_el2(SYS_SPSR);
40 write_sysreg_el2(vcpu_gp_regs(vcpu)->pstate, SYS_SPSR);
/linux-master/arch/arm64/include/asm/
H A Dsdei.h27 unsigned long pc, unsigned long pstate);
33 unsigned long pstate);
H A Dptrace.h151 unsigned long pstate; local
153 pstate = psr & ~COMPAT_PSR_DIT_BIT;
156 pstate |= PSR_AA32_DIT_BIT;
158 return pstate;
161 static inline unsigned long pstate_to_compat_psr(const unsigned long pstate) argument
165 psr = pstate & ~PSR_AA32_DIT_BIT;
167 if (pstate & PSR_AA32_DIT_BIT)
185 u64 pstate; member in struct:pt_regs::__anon16::__anon17
216 #define MAX_REG_OFFSET offsetof(struct pt_regs, pstate)
222 (((regs)->pstate
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H A Dperf_event.h24 (regs)->pstate = PSR_MODE_EL1h; \
/linux-master/arch/arm64/kernel/
H A Dprocess.c160 u64 pstate = regs->pstate; local
163 printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c %cDIT %cSSBS)\n",
164 pstate,
165 pstate & PSR_AA32_N_BIT ? 'N' : 'n',
166 pstate & PSR_AA32_Z_BIT ? 'Z' : 'z',
167 pstate & PSR_AA32_C_BIT ? 'C' : 'c',
168 pstate & PSR_AA32_V_BIT ? 'V' : 'v',
169 pstate & PSR_AA32_Q_BIT ? 'Q' : 'q',
170 pstate
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H A Dtraps.c52 static bool __kprobes __check_eq(unsigned long pstate) argument
54 return (pstate & PSR_Z_BIT) != 0;
57 static bool __kprobes __check_ne(unsigned long pstate) argument
59 return (pstate & PSR_Z_BIT) == 0;
62 static bool __kprobes __check_cs(unsigned long pstate) argument
64 return (pstate & PSR_C_BIT) != 0;
67 static bool __kprobes __check_cc(unsigned long pstate) argument
69 return (pstate & PSR_C_BIT) == 0;
72 static bool __kprobes __check_mi(unsigned long pstate) argument
74 return (pstate
77 __check_pl(unsigned long pstate) argument
82 __check_vs(unsigned long pstate) argument
87 __check_vc(unsigned long pstate) argument
92 __check_hi(unsigned long pstate) argument
98 __check_ls(unsigned long pstate) argument
104 __check_ge(unsigned long pstate) argument
110 __check_lt(unsigned long pstate) argument
116 __check_gt(unsigned long pstate) argument
125 __check_le(unsigned long pstate) argument
134 __check_al(unsigned long pstate) argument
313 u32 it, pstate = regs->pstate; local
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/linux-master/samples/bpf/
H A Dcpustat_kern.c9 * The CPU number, cstate number and pstate number are based
28 * my_map structure is used to record cstate and pstate index and
36 * timestamp, and record for cstate and pstate saperately:
43 * | pstate timestamp |
45 * | pstate index |
90 /* calculate pstate index, returns MAX_PSTATE_ENTRIES for failure */
106 u64 *cts, *pts, *cstate, *pstate, prev_state, cur_ts, delta; local
131 pstate = bpf_map_lookup_elem(&my_map, &key);
132 if (!pstate)
150 * for the pstate
214 u64 *pts, *cstate, *pstate, prev_state, cur_ts, delta; local
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/linux-master/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_plane.c576 static void _dpu_plane_color_fill_pipe(struct dpu_plane_state *pstate, argument
606 _dpu_plane_setup_scaler(pipe, fmt, true, &pipe_cfg, pstate->rotation);
620 struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state); local
635 _dpu_plane_color_fill_pipe(pstate, &pstate->pipe, &pstate->pipe_cfg.dst_rect,
638 if (pstate->r_pipe.sspp)
639 _dpu_plane_color_fill_pipe(pstate, &pstate->r_pipe, &pstate
648 struct dpu_plane_state *pstate = to_dpu_plane_state(new_state); local
797 struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state); local
971 struct dpu_plane_state *pstate; local
1027 struct dpu_plane_state *pstate = to_dpu_plane_state(state); local
1092 struct dpu_plane_state *pstate = to_dpu_plane_state(state); local
1153 struct dpu_plane_state *pstate = to_dpu_plane_state(state); local
1199 struct dpu_plane_state *pstate; local
1258 const struct dpu_plane_state *pstate = to_dpu_plane_state(state); local
1287 struct dpu_plane_state *pstate; local
1327 struct dpu_plane_state *pstate = to_dpu_plane_state(plane->state); local
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/linux-master/drivers/regulator/
H A Dpwm-regulator.c86 struct pwm_state pstate; local
89 pwm_init_state(drvdata->pwm, &pstate);
90 pwm_set_relative_duty_cycle(&pstate,
93 ret = pwm_apply_might_sleep(drvdata->pwm, &pstate);
154 struct pwm_state pstate; local
158 pwm_get_state(drvdata->pwm, &pstate);
160 if (!pstate.enabled) {
161 if (pstate.polarity == PWM_POLARITY_INVERSED)
162 pstate.duty_cycle = pstate
201 struct pwm_state pstate; local
328 struct pwm_state pstate; local
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/linux-master/drivers/cpufreq/
H A Dintel_pstate.c198 * @pstate: Stores P state limits for this CPU
234 struct pstate_data pstate; member in struct:cpudata
289 u64 (*get_val)(struct cpudata*, int pstate);
533 if (freq == cpu->pstate.turbo_freq)
534 return cpu->pstate.turbo_pstate;
536 if (freq == cpu->pstate.max_freq)
537 return cpu->pstate.max_pstate;
541 return freq / cpu->pstate.scaling;
543 return DIV_ROUND_CLOSEST(freq, cpu->pstate.scaling);
546 return DIV_ROUND_UP(freq, cpu->pstate
1787 atom_get_val(struct cpudata *cpudata, int pstate) argument
1954 core_get_val(struct cpudata *cpudata, int pstate) argument
2014 intel_pstate_set_pstate(struct cpudata *cpu, int pstate) argument
2034 int pstate = max(cpu->pstate.min_pstate, cpu->max_perf_ratio); local
2286 intel_pstate_prepare_request(struct cpudata *cpu, int pstate) argument
2294 intel_pstate_update_pstate(struct cpudata *cpu, int pstate) argument
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/linux-master/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Dcstep.h8 u8 pstate; member in struct:nvbios_cstepE
15 u32 nvbios_cstepEm(struct nvkm_bios *, u8 pstate, u8 *ver, u8 *hdr,
H A Dvpstate.h19 u8 pstate; member in struct:nvbios_vpstate_entry
/linux-master/drivers/gpu/drm/arm/
H A Dmalidp_crtc.c259 const struct drm_plane_state *pstate; local
274 drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) {
285 h_upscale_factor = div_u64((u64)pstate->crtc_w << 32,
286 pstate->src_w);
287 v_upscale_factor = div_u64((u64)pstate->crtc_h << 32,
288 pstate->src_h);
293 if (pstate->rotation & MALIDP_ROTATED_MASK) {
294 s->input_w = pstate->src_h >> 16;
295 s->input_h = pstate->src_w >> 16;
297 s->input_w = pstate
348 const struct drm_plane_state *pstate; local
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/linux-master/arch/sparc/kernel/
H A Dhelpers.S29 rdpr %pstate, %o0
30 wrpr %o0, PSTATE_IE, %pstate
45 wrpr %o0, %pstate
H A Ddtlb_prot.S21 rdpr %pstate, %g5 ! Move into alt-globals
22 wrpr %g5, PSTATE_AG|PSTATE_MG, %pstate
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/device/
H A Dctrl.c43 nvif_ioctl(&ctrl->object, "control pstate info size %d\n", size);
45 nvif_ioctl(&ctrl->object, "control pstate info vers %d\n",
55 args->v0.pstate = clk->pstate;
61 args->v0.pstate = NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_UNKNOWN;
75 struct nvkm_pstate *pstate; local
81 nvif_ioctl(&ctrl->object, "control pstate attr size %d\n", size);
84 "control pstate attr vers %d state %d index %d\n",
106 list_for_each_entry(pstate, &clk->states, head) {
111 lo = pstate
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/linux-master/drivers/gpu/drm/nouveau/include/nvif/
H A Dif0001.h14 __s8 ustate_ac; /* out: target pstate index */
15 __s8 ustate_dc; /* out: target pstate index */
19 __s8 pstate; /* out: current pstate index */ member in struct:nvif_control_pstate_info_v0
26 __s8 state; /* in: index of pstate to query
27 * out: pstate identifier
43 __s8 ustate; /* in: pstate identifier */
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_xgmi.h43 } pstate; member in struct:amdgpu_hive_info
61 int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate);

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