Searched refs:post_soft_reset (Results 1 - 25 of 27) sorted by relevance

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/linux-master/drivers/gpu/drm/amd/include/
H A Damd_shared.h289 * @post_soft_reset: post soft reset the IP block
318 int (*post_soft_reset)(void *handle); member in struct:amd_ip_funcs
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Djpeg_v2_5.c632 .post_soft_reset = NULL,
652 .post_soft_reset = NULL,
H A Dtonga_ih.c486 .post_soft_reset = tonga_ih_post_soft_reset,
H A Djpeg_v3_0.c557 .post_soft_reset = NULL,
H A Djpeg_v5_0_0.c513 .post_soft_reset = NULL,
H A Djpeg_v2_0.c759 .post_soft_reset = NULL,
H A Djpeg_v4_0.c719 .post_soft_reset = NULL,
H A Djpeg_v4_0_5.c762 .post_soft_reset = NULL,
H A Dvce_v4_0.c1091 .post_soft_reset = NULL /* vce_v4_0_post_soft_reset */,
H A Dvce_v3_0.c912 .post_soft_reset = vce_v3_0_post_soft_reset,
H A Dvcn_v2_5.c1901 .post_soft_reset = NULL,
1921 .post_soft_reset = NULL,
H A Dsdma_v3_0.c1551 .post_soft_reset = sdma_v3_0_post_soft_reset,
H A Duvd_v6_0.c1544 .post_soft_reset = uvd_v6_0_post_soft_reset,
H A Djpeg_v4_0_3.c1053 .post_soft_reset = NULL,
H A Dvcn_v5_0_0.c1328 .post_soft_reset = NULL,
H A Duvd_v7_0.c1801 .post_soft_reset = NULL /* uvd_v7_0_post_soft_reset */,
H A Dgmc_v8_0.c1716 .post_soft_reset = gmc_v8_0_post_soft_reset,
H A Dvcn_v1_0.c1902 .post_soft_reset = NULL /* vcn_v1_0_post_soft_reset */,
H A Dvcn_v2_0.c2008 .post_soft_reset = NULL,
H A Dvcn_v4_0_3.c1660 .post_soft_reset = NULL,
H A Dvcn_v4_0_5.c1752 .post_soft_reset = NULL,
H A Dvcn_v3_0.c2230 .post_soft_reset = NULL,
H A Dvcn_v4_0.c2130 .post_soft_reset = NULL,
H A Damdgpu_device.c4863 * post_soft_reset callbacks are run if the asic was hung. post_soft_reset
4876 adev->ip_blocks[i].version->funcs->post_soft_reset)
4877 r = adev->ip_blocks[i].version->funcs->post_soft_reset(adev);
/linux-master/sound/soc/codecs/
H A Dcs35l56.c1487 goto post_soft_reset;
1520 post_soft_reset:

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