#
0a119d53 |
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11-Dec-2023 |
Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> |
drm/amdgpu/jpeg: add support for jpeg DPG mode Jpeg DPG support for GC IP v11_5_0 Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
85155f5b |
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23-Jan-2024 |
Roman Li <Roman.Li@amd.com> |
drm/amd: Add a DC debug mask for IPS For debugging IPS-related issues, expose a new debug mask that allows to disable IPS. Usage: amdgpu.dcdebugmask=0x800 Signed-off-by: Roman Li <Roman.Li@amd.com> Tested-by: Mark Broadworth <mark.broadworth@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5950efe2 |
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06-Dec-2023 |
Tom Chung <chiahsuan.chung@amd.com> |
drm/amd/display: Enable Panel Replay for static screen use case [Why] Enable the Panel Replay if eDP panel and ASIC support. (prioritize Panel Replay over PSR) [How] - Setup the Panel Replay config during the device init (prioritize Panel Replay over PSR). - Separate the Replay init function into two functions amdgpu_dm_link_setup_replay() and amdgpu_dm_set_replay_caps() to fix the issue in the earlier commit that cause PSR and Replay enabled at the same time. Reviewed-by: Sun peng Li <sunpeng.li@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d45669eb |
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23-Jan-2024 |
Roman Li <Roman.Li@amd.com> |
drm/amd: Add a DC debug mask for IPS For debugging IPS-related issues, expose a new debug mask that allows to disable IPS. Usage: amdgpu.dcdebugmask=0x800 Signed-off-by: Roman Li <Roman.Li@amd.com> Tested-by: Mark Broadworth <mark.broadworth@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e379787c |
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30-Nov-2023 |
Tom Chung <chiahsuan.chung@amd.com> |
drm/amd/display: Add some functions for Panel Replay [WHY] Prepare for enabling the Panel Replay feature [HOW] - Add some Panel Replay setting functions in DC - Add the Panel Replay resource in dcn35_resource.c - Add debug masks for Panel Replay Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d6398866 |
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02-Oct-2023 |
Ivan Lipski <ivlipski@amd.com> |
Re-revert "drm/amd/display: Enable Replay for static screen use cases" This reverts commit 44e60b14d5a72f91fd0bdeae8da59ae37a3ca8e5. Since, it causes a regression in which eDP displays with PSR support, but no Replay support (Sink support <= 0x03), fail to enable PSR and consequently all IGT amd_psr tests fail. So, revert this until a more suitable fix can be found. This got brought back accidently with the backmerge. Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Ivan Lipski <ivlipski@amd.com> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4e08378b |
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14-Dec-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd/display: Add a new DC debug mask for PSR-SU Some issues have been raised that appear to be tied to PSR-SU. To allow users to confirm they're tied to PSR-SU without turning off PSR entirely introduce a new debug mask: amdgpu.dcdebugmask=0x200 Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3b35dd87 |
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30-Nov-2023 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd: Add a DC debug mask for DML2 [Why&How] To enable testing/development of DML2, expose a new debug mask for future use. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2ceec37b |
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17-Oct-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Add missing kernel doc for prepare_suspend() prepare_suspend() is intended to be used for any IP blocks that must allocate memory during the suspend sequence. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Closes: https://lore.kernel.org/all/20231017143555.6a6450fc@canb.auug.org.au/ Fixes: cb11ca3233aa ("drm/amd: Add concept of running prepare_suspend() sequence for IP blocks") Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
cb11ca32 |
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06-Oct-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Add concept of running prepare_suspend() sequence for IP blocks If any IP blocks allocate memory during their hw_fini() sequence this can cause the suspend to fail under memory pressure. Introduce a new phase that IP blocks can use to allocate memory before suspend starts so that it can potentially be evicted into swap instead. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
62e6a286 |
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02-Oct-2023 |
Ivan Lipski <ivlipski@amd.com> |
Revert "drm/amd/display: Enable Replay for static screen use cases" This reverts commit 44e60b14d5a72f91fd0bdeae8da59ae37a3ca8e5. Since, it causes a regression in which eDP displays with PSR support, but no Replay support (Sink support <= 0x03), fail to enable PSR and consequently all IGT amd_psr tests fail. So, revert this until a more suitable fix can be found. Cc: stable@vger.kernel.org Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Ivan Lipski <ivlipski@amd.com> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e1133ac8 |
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24-Sep-2023 |
Juntong Deng <juntong.deng@outlook.com> |
drm/amdgpu: Add description for AMD_IP_BLOCK_TYPE_VPE AMD_IP_BLOCK_TYPE_VPE is a new IP BLOCK type for Video Processing Engine, but currently lacks description. Fix the documentation warning: warning: Enum value 'AMD_IP_BLOCK_TYPE_VPE' not described in enum 'amd_ip_block_type' Signed-off-by: Juntong Deng <juntong.deng@outlook.com> Reviewed-by: Lang Yu <lang.yu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2cd1f65d |
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10-May-2023 |
Lang Yu <Lang.Yu@amd.com> |
drm/amdgpu: add UMSCH IP BLOCK TYPE definition Add IP BLOCK TYPE definition for Multimedia User Mode Scheduler which is a hardware scheduler for VCN and VPE workload. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e784199c |
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23-Apr-2022 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add VPE IP BLOCK definition Add IP BLOCK for Video Processing Engine. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3cce0bfc |
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15-May-2023 |
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> |
drm/amd/display: Enable Replay for static screen use cases - Setup replay config on device init. - Enable replay if feature is enabled (prioritize replay over PSR, since it can be enabled in more usecases) - Add debug masks to enable replay on supported ASICs Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
44e60b14 |
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15-May-2023 |
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> |
drm/amd/display: Enable Replay for static screen use cases - Setup replay config on device init. - Enable replay if feature is enabled (prioritize replay over PSR, since it can be enabled in more usecases) - Add debug masks to enable replay on supported ASICs Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b2225568 |
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30-Jun-2023 |
Stylon Wang <stylon.wang@amd.com> |
drm/amdgpu: Add dcdebugmask option to enable DPIA trace [Why & How] It's useful to be able to enable DPIA trace with dcdebugmask option, especially to debug DPIA issues involved in transition of system power states. This patch adds an option to amdgpu.dcdebugmask to be picked up by amdgpu DM to enable DPIA trace. Signed-off-by: Stylon Wang <stylon.wang@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9d65b1b4 |
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22-May-2023 |
Shiwu Zhang <shiwu.zhang@amd.com> |
drm/amdgpu: add the accelerator PCIe class Add the accelerator PCIe class and match the class in amdgpu for 0x1002 devices of that class. From PCI spec: "PCI Code and ID Assignment, r1.9, sec 1, 1.19" Signed-off-by: Shiwu Zhang <shiwu.zhang@amd.com> Acked-by: Lijo Lazar <lijo.lazar@amd.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> # pci_ids.h Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5d6cd200 |
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22-May-2023 |
Shiwu Zhang <shiwu.zhang@amd.com> |
drm/amdgpu: add the accelerator pcie class v2: add the base class id for accelerator (lijo) v3: add the new pci class in amdgpu tree (hawking) Signed-off-by: Shiwu Zhang <shiwu.zhang@amd.com> Acked-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f38129bb |
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21-Mar-2023 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
Revert "drm/amd/display: disable SubVP + DRR to prevent underflow" This reverts commit 80c6d6804f31451848a3956a70c2bcb1f07cfcb0. The orignal commit was intended as a workaround to prevent underflow and flickering when using one normal monitor and the other high refresh rate monitor (> 120Hz). This patch is being reverted in favour of a software solution to enable SubVP+DRR Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
80c6d680 |
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14-Feb-2023 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: disable SubVP + DRR to prevent underflow [Why&How] Temporarily disable SubVP+DRR since Xorg has an architectural limitation where freesync will not work in a multi monitor configuration. SubVP+DRR requires that freesync be working. Whether OS has variable refresh setting enabled or not, the state on the crtc remains same unless an application requests VRR. Due to this, there is no way to know whether freesync will actually work or not while we are on the desktop from the kernel's perspective. If userspace does not have a limitation with multi-display freesync (for example wayland), then this feature can be enabled by adding a dcfeaturemask option to amdgpu on the kernel cmdline like: amdgpu.dcfeaturemask=0x200 Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8813381a |
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06-Jul-2022 |
Leo Li <sunpeng.li@amd.com> |
drm/amd/display: Add dcdebugmask option for disabling MPO [Why & How] It's useful to disable MPO when debugging or testing. Therefore, add a dcdebugmask option to disable MPO. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
cfb979f7 |
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28-Jun-2022 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd: Add debug mask for subviewport mclk switch [Why&How] Expose a new dc debug mask enum to force a subviewport memory clock switch to facilitate easy testing. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
46d44516 |
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28-Jun-2022 |
Mauro Carvalho Chehab <mchehab@kernel.org> |
drm/amd/amd_shared.h: Add missing doc for PP_GFX_DCS_MASK This symbol is missing documentation: drivers/gpu/drm/amd/include/amd_shared.h:224: warning: Enum value 'PP_GFX_DCS_MASK' not described in enum 'PP_FEATURE_MASK' Document it. Fixes: 680602d6c2d6 ("drm/amd/pm: enable DCS") Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
915b5ce7 |
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11-Apr-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: enable more GFX clockgating features for GC 11.0.0 Support more GFX clockgating features(3D_CGCG, 3D_CGLS, MGCG, FGCG and PERF_CLK). Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d6b9a91f |
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07-Apr-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: add FGCG support Add the CG flag for Fine Grained Clock Gating. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6e02c0ed |
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21-Feb-2022 |
Stanley.Yang <Stanley.Yang@amd.com> |
drm/amdgpu: add ih v6_0 ip block v2 This adds ih v6_0 ip block support. IH is the interrupt handler. Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
5533347d |
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25-Apr-2022 |
David Zhang <dingchen.zhang@amd.com> |
drm/amd: add dc feature mask flags for PSR allow smu and multi-display optimizations [Why] Allow for PSR SMU optimization and PSR multiple display optimization. [How] Add feature flags of PSR smu optimization and PSR multiple display optimiztaion, and set them during init sequence. By default, flags are disabled. Signed-off-by: David Zhang <dingchen.zhang@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
25faeddc |
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25-Mar-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: expand cg_flags from u32 to u64 With this, we can support more CG flags. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
239d6de3 |
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20-Jan-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amdgpu: suppress the warning about enum value 'AMD_IP_BLOCK_TYPE_NUM' Suppress the warning below on building htmldocs: drivers/gpu/drm/amd/include/amd_shared.h:103: warning: Enum value 'AMD_IP_BLOCK_TYPE_NUM' not described in enum 'amd_ip_block_type' Fixes: 6ee27ee27ba8 ("drm/amd/pm: avoid duplicate powergate/ungate setting") Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
61d7d0d5 |
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24-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: revise the performance level setting APIs Avoid cross callings which make lock protection enforcement on amdgpu_dpm_force_performance_level() impossible. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
12320274 |
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06-Dec-2021 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Add feature flags to disable LTTPR [Why] Allow for disabling non transparent mode of LTTPR for running tests. [How] Add a feature flag and set them during init sequence. The flags are already being used in DC. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6c08e0ef |
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05-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: avoid duplicate powergate/ungate setting Just bail out if the target IP block is already in the desired powergate/ungate state. This can avoid some duplicate settings which sometimes may cause unexpected issues. Link: https://lore.kernel.org/all/YV81vidWQLWvATMM@zn.tnic/ Bug: https://bugzilla.kernel.org/show_bug.cgi?id=214921 Bug: https://bugzilla.kernel.org/show_bug.cgi?id=215025 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1789 Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Borislav Petkov <bp@suse.de> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6ee27ee2 |
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05-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: avoid duplicate powergate/ungate setting Just bail out if the target IP block is already in the desired powergate/ungate state. This can avoid some duplicate settings which sometimes may cause unexpected issues. Link: https://lore.kernel.org/all/YV81vidWQLWvATMM@zn.tnic/ Bug: https://bugzilla.kernel.org/show_bug.cgi?id=214921 Bug: https://bugzilla.kernel.org/show_bug.cgi?id=215025 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1789 Fixes: bf756fb833cb ("drm/amdgpu: add missing cleanups for Polaris12 UVD/VCE on suspend") Signed-off-by: Evan Quan <evan.quan@amd.com> Tested-by: Borislav Petkov <bp@suse.de> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
9470620e |
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05-Oct-2021 |
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> |
drm/amd/display: Enable PSR by default on newer DCN [Why] For optimal power savings on panels that can support it. This was previously left disabled by default because of issues with compositors that do not pageflip and scan out directly to the frontbuffer. For these compositors we now have detection methods that wait for x number of pageflips after a full update - triggered by a buffer or format change typically. This may introduce bugs or new cases not tested by users so this is only currently targeting newer DCN. [How] Add code in DM to set PSR state by default for newer DCN while falling back to the feature mask for older. Add a global debug flag that can be set to disable it for either. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d0f56dc2 |
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13-Jul-2021 |
Tao Zhou <tao.zhou1@amd.com> |
drm/amdgpu: add cyan_skillfish asic type Add cyan_skillfish asic family. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a5148245 |
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14-Jun-2021 |
Zhan Liu <zhan.liu@amd.com> |
drm/amd/display: Enabling eDP no power sequencing with DAL feature mask [Why] Sometimes, DP receiver chip power-controlled externally by an Embedded Controller could be treated and used as eDP, if it drives mobile display. In this case, we shouldn't be doing power-sequencing, hence we can skip waiting for T7-ready and T9-ready." [How] Added a feature mask to enable eDP no power sequencing feature. To enable this, set 0x10 flag in amdgpu.dcfeaturemask on Linux command line. Signed-off-by: Zhan Liu <zhan.liu@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e9669fb7 |
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19-May-2021 |
Andrey Grodzovsky <andrey.grodzovsky@amd.com> |
drm/amdgpu: Add early fini callback Use it to call disply code dependent on device->drv_data before it's set to NULL on device unplug v5: Move HW finilization into this callback to prevent MMIO accesses post cpi remove. v7: Split kfd suspend from device exit to expdite HW related stuff to amdgpu_pci_remove v8: Squash previous KFD commit into this commit to avoid compile break. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210520032057.497334-1-andrey.grodzovsky@amd.com
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#
7bd939d0 |
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29-Apr-2021 |
Likun GAO <Likun.Gao@amd.com> |
drm/amdgpu: add judgement when add ip blocks (v2) Judgement whether to add an sw ip according to the harvest info. v2: fix indentation (Alex) Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
83a0b863 |
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29-Apr-2021 |
Likun GAO <Likun.Gao@amd.com> |
drm/amdgpu: add judgement when add ip blocks (v2) Judgement whether to add an sw ip according to the harvest info. v2: fix indentation (Alex) Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
680602d6 |
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03-Feb-2021 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: enable DCS Enable DCS V1: Enable Async DCS. V2: Add the ppfeaturemask bit to enable from the modprobe parameter. V3: 1. add the flag to skip APU support. 2. remove the hunk for workload selection since it doesn't impact the function. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
adf16996 |
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02-Nov-2020 |
Jinzhou.Su <Jinzhou.Su@amd.com> |
drm/amdgpu: Add GFX Fine Grain Clock Gating flag Add AMD_CG_SUPPORT_GFX_FGCG for FGCG Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7be89985 |
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15-May-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add Green_Sardine APU flag Will be used for Green_Sardine which is a new APU. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c345c89b |
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26-Oct-2020 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add vangogh apu flag This patch is to add vangogh apu flag to support more kickers that belongs vangogh series. Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d205c3cc |
|
15-May-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add Green_Sardine APU flag Will be used for Green_Sardine which is a new APU. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
549750a3 |
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17-Sep-2020 |
Ryan Taylor <ryan.taylor@amd.com> |
drm/include: add PP_FEATURE_MASK comments (v3) Documents PP_FEATURE_MASK enum. Provides instructions on how to use ppfeaturemasks. v2: improve enum definitions and add kernel command line parameters to ppfeaturemask instructions v3: fix alignment issues Signed-off-by: Ryan Taylor <ryan.taylor@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
52ef3a1a |
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15-Sep-2020 |
Ryan Taylor <Ryan.Taylor@amd.com> |
drm/amdgpu: Add initial kernel documentation for the amd_ip_block_type structure. v3 Added IP block section to amdgpu.rst. Added more documentation to amd_ip_funcs. Created documentation for amd_ip_block_type. v2: Provides a more detailed DOC section on IP blocks v3: Clarifies the IP block list. Adds info on IP block enumeration. Signed-off-by: Ryan Taylor <ryan.taylor@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
54f78a76 |
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15-May-2020 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add apu flags (v2) Add some APU flags to simplify handling of different APU variants. It's easier to understand the special cases if we use names flags rather than checking device ids and silicon revisions. v2: rebase on latest code Acked-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8a791dab |
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01-May-2020 |
Harry Wentland <harry.wentland@amd.com> |
drm/amd/display: Add DC Debug mask to disable features for bringup [Why] At bringup we want to be able to disable various power features. [How] These features are already exposed as dc_debug_options and exercised on other OSes. Create a new dc_debug_mask module parameter and expose relevant bits, in particular * DC_DISABLE_PIPE_SPLIT * DC_DISABLE_STUTTER * DC_DISABLE_DSC * DC_DISABLE_CLOCK_GATING Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
18e6d414 |
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08-Nov-2019 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add JPEG PG and CG interface From JPEG2.0, it will use its own PG/CG Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8d1b04a6 |
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07-Nov-2019 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add JPEG IP block type From VCN2.0, JPEG2.0 is a separated IP block. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
eaf56410 |
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21-Oct-2019 |
Leo Li <sunpeng.li@amd.com> |
drm/amdgpu: Add DC feature mask to disable fractional pwm [Why] Some LED panel drivers might not like fractional PWM. In such cases, backlight flickering may be observed. [How] Add a DC feature mask to disable fractional PWM, and associate it with the preexisting dc_config flag. The flag is only plumbed through the dmcu firmware, so plumb it through the driver path as well. To disable, add the following to the linux cmdline: amdgpu.dcfeaturemask=0x4 Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204957 Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Anthony Koo <anthony.koo@amd.com> Tested-by: Lukáš Krejčí <lskrejci@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
397a9bc5 |
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01-Oct-2019 |
Roman Li <Roman.Li@amd.com> |
drm/amdgpu/display: add dc feature mask for psr enablement [Why] Adding psr mask to dc features allows selectively disable/enable psr. Current psr implementation may not work with non-pageflipping application. Until resolved it should be disabled by default. [How] Add dcfeaturemask for psr enablement. Disable by default. To enable set amdgpu.dcfeaturemask=0x8 in grub kernel command line. Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d99f38ae |
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22-Aug-2019 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu/display: add flag for multi-display mclk switching Add a dcfeaturemask flag for mclk switching. Disable by default; enable once the feature has seen more testing. Set amdgpu.dcfeaturemask=2 on the kernel command line in grub to enable this. Acked-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
617a64dc |
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02-Jul-2019 |
Evan Quan <evan.quan@amd.com> |
drm/amd/powerplay: increase the SMU msg response waiting time This is expected to fix some mode1 reset failures. And this affects SMU part only as the timeout setting for other parts is controlled by a different macro. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a201b6ac |
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14-Jun-2019 |
Huang Rui <ray.huang@amd.com> |
drm/amd/powerplay: make athub pg bit configured by pg_flags The athub pg features enabling should be indicated by pg_flags. Reported-by: Lijo Lazar <Lijo.Lazar@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
886f82aa |
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25-Jan-2019 |
Jack Xiao <Jack.Xiao@amd.com> |
drm/amdgpu/mes10.1: add ip block mes10.1 (v2) MES takes over the scheduling capability of GFX and SDMA, add MES as a standalone ip. v2: squash in updates (Alex) Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
367adb2a |
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13-Feb-2019 |
Jack Xiao <Jack.Xiao@amd.com> |
drm/amdgpu/athub2: enable athub2 clock gating Enable athub2 clock gating and light sleep Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
9faa494e |
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02-Feb-2019 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: add flag to support IH clock gating Add new flag for IH (interrupt handler) clockgating. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
714ff852 |
|
29-Aug-2018 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: add new HDP CG flags HDP 5.0 supports SRAM power gating. all the LS (Light Sleep)/ DS (Deep Sleep)/SD (Shut Down) modes are supported. However, only one of these modes can be enabled at one time. There is no dynamic power mode switch support. clock/power gating has to be disabled before making any power mode change. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
49d27e91 |
|
17-Jan-2019 |
Chengming Gui <Jack.Gui@amd.com> |
drm/amd/powerplay: add enable_umd_pstate functions for SMU11 add enable_umd_pstate to support sys interface for SMU11. Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
79d197f3 |
|
06-Nov-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add DC feature mask module parameter Similar to ppfeaturemask. Allows you to selectively enable/disable DC features. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
7875a226 |
|
06-Nov-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add DC feature mask module parameter Similar to ppfeaturemask. Allows you to selectively enable/disable DC features. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f28ff062 |
|
10-Sep-2018 |
James Zhu <James.Zhu@amd.com> |
drm/amdgpu:Add DPG support flag Add DPG support flag for VCN DPG mode. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a4ead3e5 |
|
10-Aug-2018 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add AVFS control to PP_FEATURE_MASK Add a ppfeaturemask flag to disable AVFS control. Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
43911fb6 |
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27-Jun-2018 |
Darren Powell <darren.powell@amd.com> |
drm/amd: Add sphinx documentation for amd_ip_funcs Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
22994e16 |
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27-Jun-2018 |
rex zhu <rex.zhu@amd.com> |
drm/amdgpu: Add stutter mode ctrl in module parameter Enable stutter mode can save power in low DRAM use cases including but not limited to productivity application use, web browsing, and video playback. Currently this feature is disabled by default. Make bit 17 in module parameter amdgpu_pp_feature_mask as stutter mode mask, so user can enable/disable this feature easily. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
8dbb8cdf |
|
16-May-2018 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: Add CG/PG flags for VCN Define new clock and powergating flags for VCN block. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6f92ad2a |
|
01-Mar-2018 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add gfxoff feature mask Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
fa7bd27d |
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13-Mar-2018 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: move PP_FEATURE_MASK to amd_shared header It will be used not only for powerplay but also on amdgpu part in future patches. So move it into amd_shared header file. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c79563a3 |
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29-Sep-2017 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: add header kgd_pp_interface.h move powerplay and amdgpu shared structures and definitions to kgd_pp_interface.h. This is the interface between the base driver and powerplay. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f674bd28 |
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28-Jun-2017 |
Akshu Agrawal <akshu.agrawal@amd.com> |
drm/amdgpu Moving amdgpu asic types to a separate file Amdgpu asic types will be required for other drivers too. Hence, its better to keep it in a separate include file. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c6c5b324 |
|
22-Sep-2017 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amd/powerplay: export new interfaces in amd_pm_funcs Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c4f1b9fc |
|
22-Sep-2017 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: add comments in struct amd_pm_funcs define Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f93f0c3a |
|
06-Sep-2017 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amd/powerplay: use struct amd_pm_funcs in powerplay Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
cfa289fd |
|
06-Sep-2017 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: rename amdgpu_dpm_funcs to amd_pm_funcs renamed amdgpu_dpm_funcs and moved to amd_shared.h so can shared with powerplay. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
f8386b35 |
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19-Jun-2017 |
Hawking Zhang <Hawking.Zhang@amd.com> |
drm/amdgpu: add new flag AMD_PG_SUPPORT_MMHUB Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
1191d110 |
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31-May-2017 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: remove mmhub ip Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
373f5923 |
|
31-May-2017 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: remove gfxhub ip Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3ea975e4 |
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28-Dec-2016 |
Leo Liu <leo.liu@amd.com> |
drm/amdgpu: add vcn ip block and type Signed-off-by: Leo Liu <leo.liu@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2ca8a5d2 |
|
07-Dec-2016 |
Chunming Zhou <David1.Zhou@amd.com> |
drm/amdgpu: add RAVEN family id definition RAVEN is a new APU. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4f93f09e |
|
05-May-2017 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: add amd fan ctrl mode enums. Add common fan enums that can be used for both powerplay and dpm. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0e5ca0d1 |
|
03-Mar-2017 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add PSP driver for vega10 (v2) PSP is responsible for firmware loading on SOC-15 asics. v2: fix memory leak (Ken) Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e60f8db5 |
|
09-Mar-2017 |
Alex Xie <AlexBin.Xie@amd.com> |
drm/amdgpu: Add GMC 9.0 support (v2) On SOC-15 parts, the GMC (Graphics Memory Controller) consists of two hubs: GFX (graphics and compute) and MM (sdma, uvd, vce). v2: drop sdma from Makefile, fix duplicate return statement. Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d4196f01 |
|
08-Mar-2016 |
Ken Wang <Qingqing.Wang@amd.com> |
drm/amdgpu: add vega10 chip name Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
c773a632 |
|
16-Jan-2017 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add DF MGCG flag Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e929c98d |
|
18-Jan-2017 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: add DRM MGCG header Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
34bb2734 |
|
12-Sep-2016 |
Eric Huang <JinHuiEric.Huang@amd.com> |
drm/amd/amdgpu: add power profile sysfs entry Add the sysfs entries pp_gfx_power_profile and pp_compute_power_profile which give user a way to set power profile through parameters minimum sclk, minimum mclk, activity threshold, up hysteresis and down hysteresis only when the entry power_dpm_force_performance_level is in default value "auto". It is read and write. Example: echo 500 800 20 0 5 > /sys/class/drm/card0/device/pp_*_power_profile cat /sys/class/drm/card0/device/pp_*_power_profile 500 800 20 0 5 Note: first parameter is sclk in MHz, second is mclk in MHz, third is activity threshold in percentage, fourth is up hysteresis in ms and fifth is down hysteresis in ms. echo set > /sys/class/drm/card0/device/pp_*_power_profile To set power profile state if it exists. echo reset > /sys/class/drm/card0/device/pp_*_power_profile To restore default state and clear previous setting. Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Acked-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
570272d2 |
|
05-Jan-2017 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: extend profiling mode. in profiling mode, powerplay will fix power state as stable as possible.and disable gfx cg and LBPW feature. profile_standard: as a prerequisite, ensure power and thermal sustainable, set clocks ratio as close to the highest clock ratio as possible. profile_min_sclk: fix mclk as profile_normal, set lowest sclk profile_min_mclk: fix sclk as profile_normal, set lowest mclk profile_peak: set highest sclk and mclk, power and thermal not sustainable profile_exit: exit profile mode. enable gfx cg/lbpw feature. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
6cb2d4e4 |
|
05-Jan-2017 |
Huang Rui <ray.huang@amd.com> |
drm/amdgpu: introduce an interface to get clock gating status dynamically Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
3bd58979 |
|
23-Dec-2016 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amd/powerplay: add profiling mode in dpm level In some case, App need to run under max stable clock. so export profiling mode: GFX CG was disabled. and user can select the max stable clock of the device. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
e5d03ac2 |
|
22-Dec-2016 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amd/powerplay: Unify dpm level defines Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
|
#
70fd80d6 |
|
21-Dec-2016 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amd/powerplay: extend smu's response timeout time. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c4642a47 |
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14-Dec-2016 |
Junwei Zhang <Jerry.Zhang@amd.com> |
drm/amd/amdgpu: add Polaris12 support (v3) v2: agd: squash in various fixes v3: agd: squash in: drm/amdgpu: remove unnecessary smc sk firmware for polaris12 Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
398d82cc |
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08-Dec-2016 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: add new gfx cg flags. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0d8de7ca |
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12-Oct-2016 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: use same vce state definition in dpm and powerplay Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
da146d3b |
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13-Oct-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: fix amdgpu_need_full_reset (v2) IP types are not an index. Each asic may have number and type of IPs. Properly check the the type rather than using the type id as an index. v2: fix all the IPs to not use IP type as an idx as well. Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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#
26d721c5 |
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21-Jan-2016 |
Ken Wang <Qingqing.Wang@amd.com> |
drm/amdgpu: add SI asics types v2 Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
35d782fe |
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15-Jul-2016 |
Chunming Zhou <David1.Zhou@amd.com> |
drm/amdgpu: add amdgpu soft reset Check gpu status first, if MC/VMC/DISPLAY hang, directly triger full reset. If engine hangs, then triger engine soft reset, if soft reset fails, will fallback to full reset. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d31a501e |
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17-Jul-2016 |
Chunming Zhou <David1.Zhou@amd.com> |
drm/amdgpu: add pre_soft_reset ip func It will be used before soft_reset to do some preparing work for reset. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
63fbf42f |
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14-Jul-2016 |
Chunming Zhou <David1.Zhou@amd.com> |
drm/amdgpu: add check_soft_reset ip func It is used to identify if the ip block is hang. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bb06d7ef |
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06-Jul-2016 |
Tom St Denis <tom.stdenis@amd.com> |
drm/amd/powerplay: Unify family defines s/AMD_FAMILY_/AMDGPU_FAMILY_/ Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6b0432b7 |
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04-May-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add new GFX powergating types Add some new GFX powergating flags. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
212cb3b6 |
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19-May-2016 |
Monk Liu <Monk.Liu@amd.com> |
drm/amdgpu: add late_fini for ip_funcs This give IP modules an optional late cleanup function. This is needed to handle tricky inter-module dependencies during tear down. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
88a907d6 |
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04-May-2016 |
Tom St Denis <tom.stdenis@amd.com> |
drm/amd/amdgpu: Add name field to amd_ip_funcs (v2) Add name that we can print out in kernel messages to aid in debugging. v2: drop DAL changes for upstream Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
16a7989a |
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28-Mar-2016 |
Tom St Denis <tom.stdenis@amd.com> |
drm/amd/amdgpu: Drop print_status callbacks. First patch in series to move to user mode debug tools we're removing the print_status callbacks. These functions were unused at the moment anyway. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
2cc0c0b5 |
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14-Mar-2016 |
Flora Cui <Flora.Cui@amd.com> |
drm/amdgpu: change ELM/BAF to Polaris10/Polaris11 Adjust to preferred code names. Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
b8122300 |
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14-Oct-2015 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add ELM/BAF asic types New asic types for ellesmere and baffin. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
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#
4fae91c5 |
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07-Apr-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drm/amdgpu: add new CG flag for ROM clockgating Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
a8fe58ce |
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22-Sep-2015 |
Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com> |
drm/amd: add ACP driver support This adds the ACP (Audio CoProcessor) IP driver and wires it up to the amdgpu driver. The ACP block provides the DMA engine for i2s based ALSA driver. This is required for audio on APUs that utilize an i2s codec. Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Murali Krishna Vemuri <murali-krishna.vemuri@amd.com> Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com> Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
e3b04bc7 |
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05-Feb-2016 |
Alex Deucher <alexander.deucher@amd.com> |
drma/dmgpu: move cg and pg flags into shared headers So they can be used by powerplay. Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3a2c788d |
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25-Aug-2015 |
Rex Zhu <Rex.Zhu@amd.com> |
drm/amdgpu: share struct amdgpu_pm_state_type with powerplay module rename amdgpu_pm_state_type to amd_pm_state_type Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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#
139f4917 |
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08-Oct-2015 |
Samuel Li <samuel.li@amd.com> |
drm/amdgpu: add Stoney chip family Stoney is based on Carrizo with some IP upgrades. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
48299f95 |
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07-Jul-2015 |
David Zhang <david1.zhang@amd.com> |
drm/amdgpu: Add Fiji DID 0x7300 common support Signed-off-by: David Zhang <david1.zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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#
2f7d10b3 |
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21-Jul-2015 |
Jammy Zhou <Jammy.Zhou@amd.com> |
drm/amdgpu: merge amdgpu_family.h into amd_shared.h (v2) Make the definitions common for all driver components v2: fix kfd Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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#
0b2daf09 |
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21-Jul-2015 |
Jammy Zhou <Jammy.Zhou@amd.com> |
drm/amdgpu: add some common definitions to amd_shared.h Add GPU family definitions and timeout value for IP components. Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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#
5fc3aeeb |
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22-May-2015 |
yanyang1 <young.yang@amd.com> |
drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2) The structure is renamed and moved to amd_shared.h to make the component independent. This makes it easier to add new components in the future. v2: fix include path Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: yanyang1 <young.yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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