Searched refs:pmr (Results 1 - 18 of 18) sorted by relevance

/linux-master/arch/arm64/include/asm/
H A Dcpuidle.h11 unsigned long pmr; member in struct:arm_cpuidle_irq_context
22 c->pmr = gic_read_pmr(); \
31 gic_write_pmr(c->pmr); \
H A Dirqflags.h34 u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1); local
35 WARN_ON_ONCE(pmr != GIC_PRIO_IRQON && pmr != GIC_PRIO_IRQOFF);
63 u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1); local
64 WARN_ON_ONCE(pmr != GIC_PRIO_IRQON && pmr != GIC_PRIO_IRQOFF);
H A Ddaifflags.h82 u64 pmr; local
90 pmr = GIC_PRIO_IRQOFF;
92 pmr = GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET;
114 gic_write_pmr(pmr);
140 * use the pmr instead.
/linux-master/drivers/gpu/drm/etnaviv/
H A Detnaviv_perfmon.h36 const struct etnaviv_perfmon_request *pmr, u32 exec_state);
H A Detnaviv_perfmon.c570 const struct etnaviv_perfmon_request *pmr, u32 exec_state)
575 u32 *bo = pmr->bo_vma;
578 dom = meta->domains + pmr->domain;
579 sig = &dom->signal[pmr->signal];
582 *(bo + pmr->offset) = val;
569 etnaviv_perfmon_process(struct etnaviv_gpu *gpu, const struct etnaviv_perfmon_request *pmr, u32 exec_state) argument
H A Detnaviv_gpu.c1310 const struct etnaviv_perfmon_request *pmr = submit->pmrs + i; local
1312 if (pmr->flags == flags)
1313 etnaviv_perfmon_process(gpu, pmr, submit->exec_state);
1345 const struct etnaviv_perfmon_request *pmr = submit->pmrs + i; local
1347 *pmr->bo_vma = pmr->sequence;
/linux-master/drivers/mtd/maps/
H A Dscx200_docflash.c81 unsigned pmr; local
103 pmr = inl(scx200_cb_base + SCx200_PMR);
117 if (pmr & (1<<6))
157 pmr = inl(scx200_cb_base + SCx200_PMR);
160 pmr &= ~(1<<6);
162 pmr |= (1<<6);
164 outl(pmr, scx200_cb_base + SCx200_PMR);
/linux-master/drivers/ata/
H A Dsata_sis.c104 u8 pmr; local
110 pci_read_config_byte(pdev, SIS_PMR, &pmr);
111 if ((pmr & SIS_PMR_COMBINED) == 0)
187 u8 pmr; local
213 pci_read_config_byte(pdev, SIS_PMR, &pmr);
219 switch (pmr & 0x30) {
228 if ((pmr & SIS_PMR_COMBINED) == 0) {
/linux-master/tools/testing/selftests/kvm/lib/aarch64/
H A Dgic.c109 void gic_set_priority_mask(uint64_t pmr) argument
112 gic_common_ops->gic_set_priority_mask(pmr);
/linux-master/arch/arm64/kvm/
H A Dvgic-sys-reg-v3.c93 vmcr.pmr = FIELD_GET(ICC_PMR_EL1_MASK, val);
105 *val = FIELD_PREP(ICC_PMR_EL1_MASK, vmcr.pmr);
/linux-master/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v2.c301 val = (vmcr.pmr & GICV_PMR_PRIORITY_MASK) >>
348 vmcr.pmr = (val << GICV_PMR_PRIORITY_SHIFT) &
H A Dvgic-v2.c226 vmcr |= ((vmcrp->pmr >> GICV_PMR_PRIORITY_SHIFT) <<
256 vmcrp->pmr = ((vmcr & GICH_VMCR_PRIMASK_MASK) >>
H A Dvgic-v3.c217 vmcr |= (vmcrp->pmr << ICH_VMCR_PMR_SHIFT) & ICH_VMCR_PMR_MASK;
250 vmcrp->pmr = (vmcr & ICH_VMCR_PMR_MASK) >> ICH_VMCR_PMR_SHIFT;
H A Dvgic.h165 u32 pmr; /* Priority mask field in the GICC_PMR and member in struct:vgic_vmcr
H A Dvgic.c975 irq->priority < vmcr.pmr;
/linux-master/net/ipv6/
H A Dmcast.c1735 struct mld2_report *pmr; local
1768 skb_put(skb, sizeof(*pmr));
1769 pmr = (struct mld2_report *)skb_transport_header(skb);
1770 pmr->mld2r_type = ICMPV6_MLD2_REPORT;
1771 pmr->mld2r_resv1 = 0;
1772 pmr->mld2r_cksum = 0;
1773 pmr->mld2r_resv2 = 0;
1774 pmr->mld2r_ngrec = 0;
1781 struct mld2_report *pmr = local
1799 pmr
1845 struct mld2_report *pmr; local
1877 struct mld2_report *pmr; local
[all...]
/linux-master/arch/arm64/kvm/hyp/
H A Dvgic-v3-sr.c677 u8 lr_prio, pmr; local
689 pmr = (vmcr & ICH_VMCR_PMR_MASK) >> ICH_VMCR_PMR_SHIFT;
691 if (pmr <= lr_prio)
/linux-master/drivers/irqchip/
H A Dirq-gic-v3.c836 u64 pmr; local
852 pmr = gic_read_pmr();
856 gic_write_pmr(pmr);

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