Searched refs:pipe_dlg_param (Results 1 - 9 of 9) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_utils.c261 pipe_ctx->pipe_dlg_param.vstartup_start = dml_get_vstartup_calculated(mode_lib, pipe_idx);
262 pipe_ctx->pipe_dlg_param.vupdate_offset = dml_get_vupdate_offset(mode_lib, pipe_idx);
263 pipe_ctx->pipe_dlg_param.vupdate_width = dml_get_vupdate_width(mode_lib, pipe_idx);
264 pipe_ctx->pipe_dlg_param.vready_offset = dml_get_vready_offset(mode_lib, pipe_idx);
266 pipe_ctx->pipe_dlg_param.otg_inst = pipe_ctx->stream_res.tg->inst;
268 pipe_ctx->pipe_dlg_param.hactive = hactive;
269 pipe_ctx->pipe_dlg_param.vactive = vactive;
270 pipe_ctx->pipe_dlg_param.htotal = pipe_ctx->stream->timing.h_total;
271 pipe_ctx->pipe_dlg_param.vtotal = pipe_ctx->stream->timing.v_total;
272 pipe_ctx->pipe_dlg_param
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c445 input->dest.vstartup_start = pipe->pipe_dlg_param.vstartup_start;
446 input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset;
447 input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset;
448 input->dest.vupdate_width = pipe->pipe_dlg_param.vupdate_width;
1209 pipe->pipe_dlg_param.vupdate_width = v->v_update_width_pix[input_idx];
1210 pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx];
1211 pipe->pipe_dlg_param.vready_offset = v->v_ready_offset_pix[input_idx];
1212 pipe->pipe_dlg_param.vstartup_start = v->v_startup[input_idx];
1214 pipe->pipe_dlg_param.htotal = pipe->stream->timing.h_total;
1215 pipe->pipe_dlg_param
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/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c906 pipe_ctx->pipe_dlg_param.vready_offset,
907 pipe_ctx->pipe_dlg_param.vstartup_start,
908 pipe_ctx->pipe_dlg_param.vupdate_offset,
909 pipe_ctx->pipe_dlg_param.vupdate_width,
1547 if (old_pipe->pipe_dlg_param.vready_offset != new_pipe->pipe_dlg_param.vready_offset
1548 || old_pipe->pipe_dlg_param.vstartup_start != new_pipe->pipe_dlg_param.vstartup_start
1549 || old_pipe->pipe_dlg_param.vupdate_offset != new_pipe->pipe_dlg_param
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c932 int vready_offset = pipe->pipe_dlg_param.vready_offset;
936 if (other_pipe->pipe_dlg_param.vready_offset > vready_offset)
937 vready_offset = other_pipe->pipe_dlg_param.vready_offset;
940 if (other_pipe->pipe_dlg_param.vready_offset > vready_offset)
941 vready_offset = other_pipe->pipe_dlg_param.vready_offset;
944 if (other_pipe->pipe_dlg_param.vready_offset > vready_offset)
945 vready_offset = other_pipe->pipe_dlg_param.vready_offset;
948 if (other_pipe->pipe_dlg_param.vready_offset > vready_offset)
949 vready_offset = other_pipe->pipe_dlg_param.vready_offset;
999 pipe_ctx->pipe_dlg_param
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/linux-master/drivers/gpu/drm/amd/display/dc/inc/
H A Dcore_types.h436 struct _vcs_dpi_display_pipe_dest_params_st pipe_dlg_param;
431 struct _vcs_dpi_display_pipe_dest_params_st pipe_dlg_param; member in struct:pipe_ctx
/linux-master/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c4313 struct _vcs_dpi_display_pipe_dest_params_st *pipe_dlg_param)
4328 if (pipe_dlg_param->vstartup_start > asic_blank_end) {
4329 v_update = (tg->v_total - (pipe_dlg_param->vstartup_start - asic_blank_end));
4342 struct _vcs_dpi_display_pipe_dest_params_st *pipe_dlg_param)
4350 pipe_dlg_param);
4417 &pipe_ctx->pipe_dlg_param);
4210 adaptive_sync_override_dp_info_packets_sdp_line_num( const struct dc_crtc_timing *timing, struct enc_sdp_line_num *sdp_line_num, struct _vcs_dpi_display_pipe_dest_params_st *pipe_dlg_param) argument
4238 set_adaptive_sync_info_packet( struct dc_info_packet *info_packet, const struct dc_stream_state *stream, struct encoder_info_frame *info_frame, struct _vcs_dpi_display_pipe_dest_params_st *pipe_dlg_param) argument
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c357 pipe->pipe_dlg_param = pipes[pipe_idx].pipe.dest;
1722 context->res_ctx.pipe_ctx[i].pipe_dlg_param = pipes[pipe_idx].pipe.dest;
1754 &context->res_ctx.pipe_ctx[i].pipe_dlg_param.vstartup_start);
/linux-master/drivers/gpu/drm/amd/display/dc/
H A Ddc_dmub_srv.c658 pipe_data->pipe_config.vblank_data.vstartup_start = vblank_pipe->pipe_dlg_param.vstartup_start;
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1202 context->res_ctx.pipe_ctx[i].pipe_dlg_param = pipes[pipe_idx].pipe.dest;
1207 &context->res_ctx.pipe_ctx[i].pipe_dlg_param.vstartup_start);

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