| /u-boot/arch/arm/mach-bcm283x/ |
| H A D | phys2bus.c | 9 unsigned long phys_to_bus(unsigned long phys) argument
12 return 0xc0000000 | phys;
14 return 0x40000000 | phys;
|
| /u-boot/include/ |
| H A D | phys2bus.h | 10 unsigned long phys_to_bus(unsigned long phys);
13 static inline unsigned long phys_to_bus(unsigned long phys) argument
15 return phys;
27 static inline dma_addr_t dev_phys_to_bus(struct udevice *dev, phys_addr_t phys) argument
29 return phys - dev_get_dma_offset(dev);
|
| H A D | dwc3-uboot.h | 51 int dwc3_setup_phy(struct udevice *dev, struct phy_bulk *phys);
52 int dwc3_shutdown_phy(struct udevice *dev, struct phy_bulk *phys);
54 static inline int dwc3_setup_phy(struct udevice *dev, struct phy_bulk *phys) argument
59 static inline int dwc3_shutdown_phy(struct udevice *dev, struct phy_bulk *phys) argument
|
| /u-boot/arch/arm/mach-socfpga/ |
| H A D | mmu-arm64_s10.c | 17 .phys = 0x00000000UL,
24 .phys = 0x10808000UL,
32 .phys = 0x20000000UL,
40 .phys = 0x440000000UL,
48 .phys = 0x4400000000UL,
56 .phys = 0x80000000UL,
72 .phys = 0x0UL,
79 .phys = 0x80000000UL,
87 .phys = 0xF7000000UL,
95 .phys
[all...] |
| /u-boot/arch/arm/mach-mvebu/alleycat5/ |
| H A D | cpu.c | 27 .phys = CFG_SYS_SDRAM_BASE,
34 .phys = 0x00000000,
41 .phys = 0x100000,
47 .phys = 0x7F000000,
53 .phys = 0x7F800000,
59 .phys = 0x7FC00000,
65 .phys = 0x7FC80000,
71 .phys = 0x7FD00000,
78 .phys = 0x7FE80000,
84 .phys
[all...] |
| /u-boot/arch/arm/mach-exynos/ |
| H A D | mmu-arm64.c | 15 .phys = 0x10000000UL,
22 .phys = 0x40000000UL,
38 .phys = 0x10000000UL,
46 .phys = 0x40000000UL,
53 .phys = 0x80000000UL,
71 .phys = 0x10000000UL,
79 .phys = 0x40000000UL,
86 .phys = 0x80000000UL,
105 .phys = 0x10000000UL,
113 .phys
[all...] |
| /u-boot/board/mediatek/mt8365_evk/ |
| H A D | mt8365_evk.c | 18 .phys = 0x40000000UL,
23 .phys = 0x00000000UL,
|
| /u-boot/arch/arm/mach-owl/ |
| H A D | sysmap-owl.c | 14 .phys = 0x0UL, /* DDR */
20 .phys = 0xE0000000UL, /* Peripheral block */
|
| /u-boot/arch/arm/mach-histb/ |
| H A D | sysmap-histb.c | 13 .phys = 0x0UL,
19 .phys = 0x80000000UL,
|
| /u-boot/arch/arm/mach-stm32mp/stm32mp2/ |
| H A D | arm64-mmu.c | 21 .phys = 0x10000000UL,
29 .phys = 0x20000000UL,
37 .phys = 0x40000000UL,
45 .phys = 0x60000000UL,
58 .phys = CONFIG_TEXT_BASE,
|
| /u-boot/arch/arm/mach-k3/arm64/ |
| H A D | arm64-mmu.c | 18 .phys = 0x0UL,
25 .phys = 0x80000000UL,
31 .phys = 0xa0000000UL,
37 .phys = 0x880000000UL,
43 .phys = 0x500000000UL,
|
| /u-boot/arch/arm/mach-apple/ |
| H A D | board.c | 24 .phys = 0x200000000,
32 .phys = 0x380000000,
40 .phys = 0x500000000,
48 .phys = 0x680000000,
56 .phys = 0x6a0000000,
64 .phys = 0x6c0000000,
72 .phys = 0x800000000,
93 .phys = 0x280000000,
101 .phys = 0x380000000,
109 .phys
[all...] |
| /u-boot/arch/arm/mach-uniphier/arm64/ |
| H A D | mem_map.c | 14 .phys = 0x00000000,
22 .phys = 0x80000000,
36 uniphier_mem_map[1].phys = dram_base;
|
| /u-boot/drivers/net/ |
| H A D | mdio_mux_meson_g12a.c | 53 phys_addr_t phys; member in struct:mdio_mux_meson_g12a_priv
59 writel(0x29c0040a, priv->phys + ETH_PLL_CTL0);
60 writel(0x927e0000, priv->phys + ETH_PLL_CTL1);
61 writel(0xac5f49e5, priv->phys + ETH_PLL_CTL2);
62 writel(0x00000000, priv->phys + ETH_PLL_CTL3);
63 writel(0x00000000, priv->phys + ETH_PLL_CTL4);
64 writel(0x20200000, priv->phys + ETH_PLL_CTL5);
65 writel(0x0000c002, priv->phys + ETH_PLL_CTL6);
66 writel(0x00000023, priv->phys + ETH_PLL_CTL7);
67 writel(0x39c0040a, priv->phys
[all...] |
| /u-boot/arch/arm/mach-bcmbca/bcm4908/ |
| H A D | mmu_table.c | 11 .phys = 0x00000000UL,
19 .phys = 0xff800000UL,
|
| /u-boot/arch/arm/mach-bcmbca/bcm4912/ |
| H A D | mmu_table.c | 11 .phys = 0x00000000UL,
19 .phys = 0xff800000UL,
|
| /u-boot/arch/arm/mach-bcmbca/bcm6856/ |
| H A D | mmu_table.c | 11 .phys = 0x00000000UL,
19 .phys = 0xff800000UL,
|
| /u-boot/arch/arm/mach-bcmbca/bcm63158/ |
| H A D | mmu_table.c | 11 .phys = 0x00000000UL,
19 .phys = 0xff800000UL,
|
| /u-boot/arch/arm/mach-bcmbca/bcm6858/ |
| H A D | mmu_table.c | 11 .phys = 0x00000000UL,
19 .phys = 0xff800000UL,
|
| /u-boot/arch/arm/mach-bcmbca/bcm6813/ |
| H A D | mmu_table.c | 11 .phys = 0x00000000UL,
19 .phys = 0xff800000UL,
|
| /u-boot/arch/arm/mach-bcmbca/bcm63146/ |
| H A D | mmu_table.c | 11 .phys = 0x00000000UL,
19 .phys = 0xff800000UL,
|
| /u-boot/arch/arm/mach-tegra/ |
| H A D | arm64-mmu.c | 17 .phys = 0x0UL,
24 .phys = 0x80000000UL,
|
| /u-boot/arch/arm/mach-octeontx/ |
| H A D | cpu.c | 23 .phys = 0x800000000000UL,
29 .phys = 0x840000000000UL,
35 .phys = 0x880000000000UL,
52 otx_mem_map[banks].phys = 0x8c0000000000UL;
61 otx_mem_map[banks].phys = dram_start;
|
| /u-boot/arch/arm/mach-octeontx2/ |
| H A D | cpu.c | 23 .phys = 0x800000000000UL,
29 .phys = 0x840000000000UL,
35 .phys = 0x880000000000UL,
41 .phys = 0x8c0000000000UL,
57 otx2_mem_map[banks].phys = dram_start;
|
| /u-boot/drivers/pci/ |
| H A D | pcie_layerscape_ep.c | 73 u64 phys = 0; local
75 phys = CFG_SYS_PCI_EP_MEMORY_BASE + pf * SZ_64M;
77 phys = ALIGN(phys, PCIE_BAR0_SIZE);
80 0 + pf * BAR_NUM, 0, phys);
82 phys = ALIGN(phys + PCIE_BAR0_SIZE, PCIE_BAR1_SIZE);
84 1 + pf * BAR_NUM, 1, phys);
86 phys = ALIGN(phys
[all...] |