Searched refs:phy_inst (Results 1 - 8 of 8) sorted by relevance
| /linux-master/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | dccg.h | 140 int phy_inst,
146 int phy_inst,
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| /linux-master/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_amdkfd_gc_9_4_3.c | 228 unsigned int phy_inst = GET_INST(GC, xcc_inst); local
230 unsigned int aid = phy_inst / 2;
267 aid * 4 + (phy_inst % 2) + 1);
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| /linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_crc.c | 120 uint8_t phy_inst; local
137 phy_inst = stream->link->link_enc_hw_inst;
145 securedisplay_cmd->securedisplay_in_message.send_roi_crc.phy_id = phy_inst;
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn35/ |
| H A D | dcn35_dccg.c | 360 int phy_inst,
368 switch (phy_inst) {
397 int phy_inst,
404 switch (phy_inst) {
358 dccg35_set_physymclk_root_clock_gating( struct dccg *dccg, int phy_inst, bool enable) argument
395 dccg35_set_physymclk( struct dccg *dccg, int phy_inst, enum physymclk_clock_source clk_src, bool force_enable) argument
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_dccg.c | 444 int phy_inst,
451 switch (phy_inst) {
442 dccg31_set_physymclk( struct dccg *dccg, int phy_inst, enum physymclk_clock_source clk_src, bool force_enable) argument
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| H A D | dcn31_dccg.h | 189 int phy_inst,
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| /linux-master/drivers/gpu/drm/amd/display/dmub/inc/ |
| H A D | dmub_cmd.h | 4208 uint8_t phy_inst; /**< phy inst for cable id data */ member in struct:dmub_cmd_cable_id_input
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| /linux-master/drivers/gpu/drm/amd/display/dc/link/protocols/ |
| H A D | link_dp_capability.c | 1399 cmd.cable_id.data.input.phy_inst = resource_transmitter_to_phy_idx(
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