Searched refs:nvkm_clk (Results 1 - 24 of 24) sorted by relevance

/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dpriv.h4 #define nvkm_clk(p) container_of((p), struct nvkm_clk, subdev) macro
8 int (*init)(struct nvkm_clk *);
9 void (*fini)(struct nvkm_clk *);
10 int (*read)(struct nvkm_clk *, enum nv_clk_src);
11 int (*calc)(struct nvkm_clk *, struct nvkm_cstate *);
12 int (*prog)(struct nvkm_clk *);
13 void (*tidy)(struct nvkm_clk *);
20 bool allow_reclock, struct nvkm_clk *);
22 bool allow_reclock, struct nvkm_clk **);
[all...]
H A Dnv50.h19 struct nvkm_clk base;
24 bool, struct nvkm_clk **);
25 int nv50_clk_read(struct nvkm_clk *, enum nv_clk_src);
26 int nv50_clk_calc(struct nvkm_clk *, struct nvkm_cstate *);
27 int nv50_clk_prog(struct nvkm_clk *);
28 void nv50_clk_tidy(struct nvkm_clk *);
H A Dgt215.h16 int gt215_pll_info(struct nvkm_clk *, int, u32, u32, struct gt215_clk_info *);
17 int gt215_clk_pre(struct nvkm_clk *, unsigned long *flags);
18 void gt215_clk_post(struct nvkm_clk *, unsigned long *flags);
H A Dgk20a.h117 struct nvkm_clk base;
151 void gk20a_clk_fini(struct nvkm_clk *);
152 int gk20a_clk_read(struct nvkm_clk *, enum nv_clk_src);
153 int gk20a_clk_calc(struct nvkm_clk *, struct nvkm_cstate *);
154 int gk20a_clk_prog(struct nvkm_clk *);
155 void gk20a_clk_tidy(struct nvkm_clk *);
H A Dg84.c45 struct nvkm_clk **pclk)
H A Dnv04.c32 nv04_clk_pll_calc(struct nvkm_clk *clock, struct nvbios_pll *info,
49 nv04_clk_pll_prog(struct nvkm_clk *clk, u32 reg1, struct nvkm_pll_vals *pv)
76 struct nvkm_clk **pclk)
H A Dbase.c41 nvkm_clk_adjust(struct nvkm_clk *clk, bool adjust,
79 nvkm_cstate_valid(struct nvkm_clk *clk, struct nvkm_cstate *cstate,
112 nvkm_cstate_find_best(struct nvkm_clk *clk, struct nvkm_pstate *pstate,
145 nvkm_cstate_get(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
160 nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
225 nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate)
267 nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
302 struct nvkm_clk *clk = container_of(work, typeof(*clk), work);
336 nvkm_pstate_calc(struct nvkm_clk *clk, bool wait)
346 nvkm_pstate_info(struct nvkm_clk *cl
641 nvkm_clk = { variable in typeref:struct:nvkm_subdev_func
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H A Dnv40.c32 struct nvkm_clk base;
97 nv40_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
146 nv40_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
186 nv40_clk_prog(struct nvkm_clk *base)
200 nv40_clk_tidy(struct nvkm_clk *obj)
222 struct nvkm_clk **pclk)
H A Dgt215.c35 struct nvkm_clk base;
143 gt215_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
187 gt215_clk_info(struct nvkm_clk *base, int idx, u32 khz,
235 gt215_pll_info(struct nvkm_clk *base, int idx, u32 pll, u32 khz,
307 gt215_clk_pre(struct nvkm_clk *clk, unsigned long *flags)
342 gt215_clk_post(struct nvkm_clk *clk, unsigned long *flags)
459 gt215_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
486 gt215_clk_prog(struct nvkm_clk *base)
516 gt215_clk_tidy(struct nvkm_clk *base)
541 struct nvkm_clk **pcl
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H A Dmcp77.c33 struct nvkm_clk base;
81 mcp77_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
200 mcp77_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
296 mcp77_clk_prog(struct nvkm_clk *base)
391 mcp77_clk_tidy(struct nvkm_clk *base)
413 struct nvkm_clk **pclk)
H A Dgk20a.c460 gk20a_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
480 gk20a_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
489 gk20a_clk_prog(struct nvkm_clk *base)
502 gk20a_clk_tidy(struct nvkm_clk *base)
543 gk20a_clk_fini(struct nvkm_clk *base)
565 gk20a_clk_init(struct nvkm_clk *base)
642 struct nvkm_clk **pclk)
H A Dgk104.c42 struct nvkm_clk base;
189 gk104_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
339 gk104_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
448 gk104_clk_prog(struct nvkm_clk *base)
479 gk104_clk_tidy(struct nvkm_clk *base)
508 struct nvkm_clk **pclk)
H A Dgf100.c42 struct nvkm_clk base;
158 gf100_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
325 gf100_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
416 gf100_clk_prog(struct nvkm_clk *base)
442 gf100_clk_tidy(struct nvkm_clk *base)
472 struct nvkm_clk **pclk)
H A Dnv50.c192 nv50_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
369 nv50_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
496 nv50_clk_prog(struct nvkm_clk *base)
503 nv50_clk_tidy(struct nvkm_clk *base)
511 enum nvkm_subdev_type type, int inst, bool allow_reclock, struct nvkm_clk **pclk)
560 struct nvkm_clk **pclk)
H A Dgm20b.c464 gm20b_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
572 gm20b_clk_prog(struct nvkm_clk *base)
720 gm20b_clk_fini(struct nvkm_clk *base)
811 gm20b_clk_init(struct nvkm_clk *base)
912 struct nvkm_clk **pclk)
1015 struct nvkm_clk **pclk)
/linux-master/drivers/gpu/drm/nouveau/include/nvkm/subdev/
H A Dclk.h82 struct nvkm_clk { struct
115 int (*pll_calc)(struct nvkm_clk *, struct nvbios_pll *, int clk,
117 int (*pll_prog)(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *pv);
120 int nvkm_clk_read(struct nvkm_clk *, enum nv_clk_src);
121 int nvkm_clk_ustate(struct nvkm_clk *, int req, int pwr);
122 int nvkm_clk_astate(struct nvkm_clk *, int req, int rel, bool wait);
123 int nvkm_clk_dstate(struct nvkm_clk *, int req, int rel);
124 int nvkm_clk_tstate(struct nvkm_clk *, u8 temperature);
127 int nv04_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
128 int nv40_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
H A Dgk20a.c53 struct nvkm_clk *clk = pmu->base.subdev.device->clk;
61 struct nvkm_clk *clk = pmu->base.subdev.device->clk;
71 struct nvkm_clk *clk = pmu->base.subdev.device->clk;
122 struct nvkm_clk *clk = device->clk;
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/device/
H A Dctrl.c40 struct nvkm_clk *clk = ctrl->device->clk;
73 struct nvkm_clk *clk = ctrl->device->clk;
146 struct nvkm_clk *clk = ctrl->device->clk;
/linux-master/drivers/gpu/drm/nouveau/include/nvkm/core/
H A Dlayout.h27 NVKM_LAYOUT_ONCE(NVKM_SUBDEV_CLK , struct nvkm_clk , clk)
/linux-master/drivers/gpu/drm/nouveau/dispnv04/
H A Dhw.c262 struct nvkm_clk *clk = nvxx_clk(device);
473 struct nvkm_clk *clk = nvxx_clk(&drm->client.device);
H A Dcrtc.c122 struct nvkm_clk *clk = nvxx_clk(&drm->client.device);
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramgf100.c133 struct nvkm_clk *clk = device->clk;
H A Dramgt215.c161 struct nvkm_clk *clk = device->clk;
H A Dramgk104.c1115 struct nvkm_clk *clk = ram->base.fb->subdev.device->clk;

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