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98fd7f83 |
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03-Dec-2020 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/clk: switch to instanced constructor Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
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22b6c9e8 |
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01-Jun-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gm20b: add glitchless and DFS support This patch adds support for advanced features supported by the Noise-Aware PLL of Maxwell. Glitchless switch allows the PL field to be updated without disabling the PLL first if the SYNC_MODE bit of the CFG register is set. More significantly, DFS allows the PLL to monitor the actual input voltage and to dynamically lower the output frequency accordingly. This allows the clock to be more tolerant of lower voltages. These improvements are only supported for Tegra speedos >= 1. Also add the voltage table that is suitable for GM20B's NAPLL. This change needs to be done atomically for the right voltages to be used by the clock driver. v2. Fix build on non-Tegra platforms Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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#
3786c415 |
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01-Jun-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: rename constructor Strip the _ prefix off the gk20a clock constructor. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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#
6ed7e742 |
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01-Jun-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: improve MNP programming Split the MNP programming function into two functions for the cases where we allow sliding or not, instead of making it take a parameter for this. This results in less conditionals in the code and makes it easier to read. Also make the MNP programming functions take the PLL parameters as arguments, and move bits of code to more relevant places (previous programming tended to be just-in-time, which added more conditionnals in the code). Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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#
afea21c9 |
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01-Jun-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: factorize n_lo computation code Use a dedicated function instead of always calculating n_lo on the fly. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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#
89d3a912 |
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01-Jun-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: parameterize PLL settings Make functions manipulating PLL settings take them as an argument, instead of assuming we want to work on the copy in the gk20a_clk structure. This makes these functions more flexible, which we will need in GM20B. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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#
a9608c9b |
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01-Jun-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: add and use MNP programming functions Add relevant functions to work with the gk20a_pll structure and use them where they ought to be instead of directly manipulating registers. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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#
9102240c |
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01-Jun-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: use nvkm_ functions in slide() Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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#
d7ca1106 |
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01-Jun-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: reorganize MNP calculation a bit Move variables declarations to their actual scope of use, and simplify code a bit. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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f5f1b06e |
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01-Jun-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: setup slide once during init Slide setup needs to be performed only once, during init. Also use the proper parameters for different clock speeds. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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9772605c |
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01-Jun-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: properly protect macro argument Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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42d6e167 |
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11-Feb-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: share reusable structures/functions Make functions/structures that the GM20B driver will reuse public. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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6871b34a |
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12-Feb-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: set lowest frequency during init() Err on the safe side by setting the lowest frequency (and thus voltage) during device init. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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2efd3908 |
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11-Feb-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: split gk20a_clk_new() This allows to instanciate drivers that use the same logic as gk20a with different parameters. Add a constructor function to allow other chips that inherit from this clock to easily initialize its members Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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#
195c1137 |
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11-Feb-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: abstract pl_to_div pl_to_div may be done differently depending on the chip. Abstract this operation so the same logic can be reused for them as well. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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a04bc140 |
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28-Oct-2015 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: put mnp values into their own struct This allows us to read them using one single function and will be handy to the GM20B driver. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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f29cacf1 |
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12-Feb-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: emit parent rate as debug message Most users are probably not interested in this information. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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3c0d5d6e |
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11-Feb-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: only restore divider to 1:1 if needed Only restore the 1:1 divider if it is not set already. Also use the proper masks for this operation and add a second write as done in the Android code. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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a08c8bae |
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11-Feb-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: only compute n_lo if needed n_lo is used if we are going to slide. Compute it only if that condition succeeds to avoid confusion about future usage of this computation. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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3a91b9c5 |
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11-Feb-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: fix VCO bit mask Fix the mask specified to switch to VCO mode was given as an (incorrect) immediate value. Although the side-effect happens to be the same, this is clearly incorrect. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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#
e7952eb6 |
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11-Feb-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: rename enable/disable functions gk20a_pllg_disable() is only used in the context of gk20a_clk_fini(). Move its body there and rename _gk20a_pllg_enable() and _gk20a_pllg_disable() to non-underscored versions. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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d865f3c5 |
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11-Feb-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: reorganize variables in gk20a_pllg_calc_mnp() Move some variables declarations to the scope where they are actually used to make the code easier to follow. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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#
af6313d6 |
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28-Oct-2015 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/clk/gk20a: convert parameters to Khz Perform computations in Khz instead of Mhz for better precision. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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8cb87c04 |
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03-Nov-2015 |
Nicolas Pitre <nico@fluxnic.net> |
nouveau/nvkm/subdev/clk/gk20a.c: fix wrong do_div() usage do_div() must only be used with a u64 dividend. Signed-off-by: Nicolas Pitre <nico@linaro.org>
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#
43a70661 |
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19-Aug-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/tegra: merge platform setup from nouveau drm The copyright header in nvkm/engine/device/platform.c has been replaced with the NVIDIA one from drm/nouveau_platform.c, as most of the actual code is now theirs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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6625f55c |
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19-Aug-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/clk: convert to new-style nvkm_subdev Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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47b2505e |
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19-Aug-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/platform: remove subclassing of nvkm_device Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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#
b907649e |
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19-Aug-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/clk: switch to subdev printk macros Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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#
6979c630 |
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19-Aug-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/clk: switch to new-style timer macros Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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822ad79f |
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19-Aug-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/clk: switch to device pri macros Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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#
3eca809b |
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19-Aug-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/clk: cosmetic changes This is purely preparation for upcoming commits, there should be no code changes here. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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#
9ace404b |
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19-Aug-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/device: include core/device.h automatically for subdevs/engines Pretty much every subdev/engine is going to need access to nvkm_device shortly to touch registers and/or output messages. The odd placement of the includes is necessary to work around some inter-dependencies that currently exist. This will be fixed later. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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9e79a853 |
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13-Jan-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/timer: namespace + nvidia gpu names (no binary change) The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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7632b30e |
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13-Jan-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/clk: namespace + nvidia gpu names (no binary change) The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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f3867f43 |
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13-Jan-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/clk: rename from clock (no binary change) Rename to match the Linux subsystem responsible for the same kind of things. Will be investigating how feasible it will be to expose the GPU clock trees with it at some point. The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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