| /linux-master/tools/include/linux/ |
| H A D | math64.h | 22 static inline u64 mul_u64_u32_shr(u64 a, u32 b, unsigned int shift) function
46 static inline u64 mul_u64_u32_shr(u64 a, u32 b, unsigned int shift) function
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| /linux-master/include/linux/ |
| H A D | math64.h | 163 #ifndef mul_u64_u32_shr
164 static __always_inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) function
168 #endif /* mul_u64_u32_shr */
179 #ifndef mul_u64_u32_shr
180 static __always_inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) function
194 #endif /* mul_u64_u32_shr */
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| /linux-master/drivers/gpu/drm/xe/ |
| H A D | xe_hwmon.c | 167 *value = mul_u64_u32_shr(reg_val, SF_POWER, hwmon->scl_shift_power);
171 min = mul_u64_u32_shr(min, SF_POWER, hwmon->scl_shift_power);
173 max = mul_u64_u32_shr(max, SF_POWER, hwmon->scl_shift_power);
218 *value = mul_u64_u32_shr(reg_val, SF_POWER, hwmon->scl_shift_power);
236 * the hwmon API. Using x86_64 128 bit arithmetic (see mul_u64_u32_shr()),
257 *energy = mul_u64_u32_shr(ei->accum_energy, SF_ENERGY,
296 out = mul_u64_u32_shr(tau4, SF_TIME, hwmon->scl_shift_time + x_w);
334 max_win = mul_u64_u32_shr(tau4, SF_TIME, hwmon->scl_shift_time + x_w);
445 *value = mul_u64_u32_shr(REG_FIELD_GET(POWER_SETUP_I1_DATA_MASK, uval),
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| /linux-master/arch/x86/kernel/cpu/ |
| H A D | vmware.c | 150 ns = mul_u64_u32_shr(rdtsc(), vmware_cyc2ns.cyc2ns_mul,
163 d->cyc2ns_offset = mul_u64_u32_shr(tsc_now, d->cyc2ns_mul,
241 return mul_u64_u32_shr(clock, vmware_cyc2ns.cyc2ns_mul,
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| /linux-master/drivers/gpu/drm/i915/ |
| H A D | i915_hwmon.c | 102 return mul_u64_u32_shr(reg_value, scale_factor, nshift);
120 * the hwmon API. Using x86_64 128 bit arithmetic (see mul_u64_u32_shr()),
151 *energy = mul_u64_u32_shr(ei->accum_energy, SF_ENERGY,
182 out = mul_u64_u32_shr(tau4, SF_TIME, hwmon->scl_shift_time + x_w);
217 max_win = mul_u64_u32_shr(tau4, SF_TIME, hwmon->scl_shift_time + x_w);
388 min = mul_u64_u32_shr(min, SF_POWER, hwmon->scl_shift_power);
390 max = mul_u64_u32_shr(max, SF_POWER, hwmon->scl_shift_power);
477 *val = mul_u64_u32_shr(REG_FIELD_GET(POWER_SETUP_I1_DATA_MASK, uval),
594 *val = mul_u64_u32_shr(REG_FIELD_GET(POWER_SETUP_I1_DATA_MASK, uval),
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| /linux-master/kernel/sched/ |
| H A D | pelt.c | 53 val = mul_u64_u32_shr(val, runnable_avg_yN_inv[local_n], 32);
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| H A D | fair.c | 290 return mul_u64_u32_shr(delta_exec, fact, shift);
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| /linux-master/drivers/iio/accel/ |
| H A D | adxl355_core.c | 281 odr = mul_u64_u32_shr(adxl355_odr_table[data->odr][0], MEGA, 0) +
286 div = div64_u64_rem(mul_u64_u32_shr(odr, multiplier, 0),
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| /linux-master/tools/lib/perf/ |
| H A D | mmap.c | 529 delta = time_offset + mul_u64_u32_shr(cyc, time_mult, time_shift);
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| /linux-master/drivers/perf/ |
| H A D | riscv_pmu.c | 66 ns = mul_u64_u32_shr(rd->epoch_cyc, rd->mult, rd->shift);
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| H A D | arm_pmuv3.c | 1463 ns = mul_u64_u32_shr(rd->epoch_cyc, rd->mult, rd->shift);
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| /linux-master/arch/x86/kernel/ |
| H A D | tsc.c | 130 ns += mul_u64_u32_shr(cyc, data.cyc2ns_mul, data.cyc2ns_shift);
172 mul_u64_u32_shr(tsc_now, data.cyc2ns_mul, data.cyc2ns_shift);
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| /linux-master/drivers/regulator/ |
| H A D | max5970-regulator.c | 93 *val = mul_u64_u32_shr(*val, ddata->mon_rng, 10);
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| /linux-master/drivers/clk/renesas/ |
| H A D | rzg2l-cpg.c | 976 rate = mul_u64_u32_shr(parent_rate, (MDIV(val1) << 16) + KDIV(val1),
1008 rate = mul_u64_u32_shr(parent_rate, 4096 * nir + nfr, 12);
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| /linux-master/kernel/time/ |
| H A D | clocksource.c | 853 nsec = mul_u64_u32_shr(delta, suspend_clocksource->mult,
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| /linux-master/drivers/gpu/drm/i915/gvt/ |
| H A D | handlers.c | 687 new_rate = DIV64_U64_ROUND_CLOSEST(mul_u64_u32_shr(pixel_clk, MSEC_PER_SEC, 0), mul_u32_u32(htotal + 1, vtotal + 1));
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