Searched refs:lvds (Results 1 - 25 of 43) sorted by relevance

12

/linux-master/drivers/gpu/drm/rockchip/
H A Drockchip_lvds.c39 * struct rockchip_lvds_soc_data - rockchip lvds Soc private data
44 int (*probe)(struct platform_device *pdev, struct rockchip_lvds *lvds);
55 int output; /* rgb lvds or dual lvds output */
77 static inline void rk3288_writel(struct rockchip_lvds *lvds, u32 offset, argument
80 writel_relaxed(val, lvds->regs + offset);
81 if (lvds->output == DISPLAY_OUTPUT_LVDS)
83 writel_relaxed(val, lvds->regs + offset + RK3288_LVDS_CH1_OFFSET);
102 else if (strncmp(s, "lvds", 4) == 0)
120 struct rockchip_lvds *lvds local
144 rk3288_lvds_poweron(struct rockchip_lvds *lvds) argument
221 rk3288_lvds_poweroff(struct rockchip_lvds *lvds) argument
243 struct rockchip_lvds *lvds = encoder_to_lvds(encoder); local
272 rk3288_lvds_set_vop_source(struct rockchip_lvds *lvds, struct drm_encoder *encoder) argument
295 struct rockchip_lvds *lvds = encoder_to_lvds(encoder); local
327 struct rockchip_lvds *lvds = encoder_to_lvds(encoder); local
334 px30_lvds_poweron(struct rockchip_lvds *lvds) argument
354 px30_lvds_poweroff(struct rockchip_lvds *lvds) argument
366 struct rockchip_lvds *lvds = encoder_to_lvds(encoder); local
380 px30_lvds_set_vop_source(struct rockchip_lvds *lvds, struct drm_encoder *encoder) argument
396 struct rockchip_lvds *lvds = encoder_to_lvds(encoder); local
428 struct rockchip_lvds *lvds = encoder_to_lvds(encoder); local
449 rk3288_lvds_probe(struct platform_device *pdev, struct rockchip_lvds *lvds) argument
493 px30_lvds_probe(struct platform_device *pdev, struct rockchip_lvds *lvds) argument
547 struct rockchip_lvds *lvds = dev_get_drvdata(dev); local
681 struct rockchip_lvds *lvds = dev_get_drvdata(dev); local
699 struct rockchip_lvds *lvds; local
742 struct rockchip_lvds *lvds = platform_get_drvdata(pdev); local
[all...]
/linux-master/drivers/gpu/drm/panel/
H A Dpanel-lvds.c52 struct panel_lvds *lvds = to_panel_lvds(panel); local
54 if (lvds->enable_gpio)
55 gpiod_set_value_cansleep(lvds->enable_gpio, 0);
57 if (lvds->supply)
58 regulator_disable(lvds->supply);
65 struct panel_lvds *lvds = to_panel_lvds(panel); local
67 if (lvds->supply) {
70 err = regulator_enable(lvds->supply);
72 dev_err(lvds->dev, "failed to enable supply: %d\n",
78 if (lvds
87 struct panel_lvds *lvds = to_panel_lvds(panel); local
114 struct panel_lvds *lvds = to_panel_lvds(panel); local
126 panel_lvds_parse_dt(struct panel_lvds *lvds) argument
164 struct panel_lvds *lvds; local
233 struct panel_lvds *lvds = platform_get_drvdata(pdev); local
[all...]
/linux-master/drivers/gpu/drm/sun4i/
H A Dsun4i_lvds.c44 struct sun4i_lvds *lvds = local
47 return drm_panel_get_modes(lvds->panel, connector);
70 struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder); local
74 if (lvds->panel) {
75 drm_panel_prepare(lvds->panel);
76 drm_panel_enable(lvds->panel);
82 struct sun4i_lvds *lvds = drm_encoder_to_sun4i_lvds(encoder); local
86 if (lvds->panel) {
87 drm_panel_disable(lvds->panel);
88 drm_panel_unprepare(lvds
101 struct sun4i_lvds *lvds; local
[all...]
/linux-master/drivers/gpu/drm/renesas/rcar-du/
H A Drcar_lvds.c59 void (*pll_setup)(struct rcar_lvds *lvds, unsigned int freq);
86 static u32 rcar_lvds_read(struct rcar_lvds *lvds, u32 reg) argument
88 return ioread32(lvds->mmio + reg);
91 static void rcar_lvds_write(struct rcar_lvds *lvds, u32 reg, u32 data) argument
93 iowrite32(data, lvds->mmio + reg);
100 static void rcar_lvds_pll_setup_gen2(struct rcar_lvds *lvds, unsigned int freq) argument
113 rcar_lvds_write(lvds, LVDPLLCR, val);
116 static void rcar_lvds_pll_setup_gen3(struct rcar_lvds *lvds, unsigned int freq) argument
129 rcar_lvds_write(lvds, LVDPLLCR, val);
141 static void rcar_lvds_d3_e3_pll_calc(struct rcar_lvds *lvds, struc argument
272 rcar_lvds_pll_setup_d3_e3(struct rcar_lvds *lvds, unsigned int freq, bool dot_clock_only) argument
312 rcar_lvds_get_lvds_mode(struct rcar_lvds *lvds, const struct drm_connector *connector) argument
358 struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge); local
495 struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge); local
544 struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge); local
564 struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge); local
601 struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge); local
623 struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge); local
640 struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge); local
661 struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge); local
669 struct rcar_lvds *lvds = bridge_to_rcar_lvds(bridge); local
679 rcar_lvds_parse_dt_companion(struct rcar_lvds *lvds) argument
774 rcar_lvds_parse_dt(struct rcar_lvds *lvds) argument
808 rcar_lvds_get_clock(struct rcar_lvds *lvds, const char *name, bool optional) argument
826 rcar_lvds_get_clocks(struct rcar_lvds *lvds) argument
878 struct rcar_lvds *lvds; local
923 struct rcar_lvds *lvds = platform_get_drvdata(pdev); local
985 struct rcar_lvds *lvds = dev_get_drvdata(dev); local
996 struct rcar_lvds *lvds = dev_get_drvdata(dev); local
[all...]
H A Drcar_du_drv.h111 struct drm_bridge *lvds[RCAR_DU_MAX_LVDS]; member in struct:rcar_du_device
H A Drcar_du_encoder.c81 rcdu->lvds[output - RCAR_DU_OUTPUT_LVDS0] = bridge;
/linux-master/drivers/phy/freescale/
H A DMakefile3 obj-$(CONFIG_PHY_MIXEL_LVDS_PHY) += phy-fsl-imx8qm-lvds-phy.o
H A Dphy-fsl-imx8qm-lvds-phy.c170 struct phy_configure_opts_lvds *cfg = &opts->lvds;
226 struct phy_configure_opts_lvds *cfg = &opts->lvds;
430 { .compatible = "fsl,imx8qm-lvds-phy" },
440 .name = "mixel-lvds-phy",
/linux-master/drivers/gpu/drm/amd/display/dc/bios/
H A Dbios_parser.c1220 ATOM_LVDS_INFO_V12 *lvds; local
1228 lvds =
1231 if (!lvds)
1234 if (1 != lvds->sHeader.ucTableFormatRevision
1235 || 2 > lvds->sHeader.ucTableContentRevision)
1242 le16_to_cpu(lvds->sLCDTiming.usPixClk) * 10;
1245 le16_to_cpu(lvds->sLCDTiming.usHActive);
1251 le16_to_cpu(lvds->sLCDTiming.usHBlanking_Time);
1254 le16_to_cpu(lvds->sLCDTiming.usVActive);
1260 le16_to_cpu(lvds
1339 ATOM_LCD_INFO_V13 *lvds; local
[all...]
H A Dbios_parser2.c1431 struct lcd_info_v2_1 *lvds; local
1439 lvds = GET_IMAGE(struct lcd_info_v2_1, DATA_TABLES(lcd_info));
1441 if (!lvds)
1445 if (!((lvds->table_header.format_revision == 2)
1446 && (lvds->table_header.content_revision >= 1)))
1452 info->lcd_timing.pixel_clk = le16_to_cpu(lvds->lcd_timing.pixclk) * 10;
1454 info->lcd_timing.horizontal_addressable = le16_to_cpu(lvds->lcd_timing.h_active);
1460 info->lcd_timing.horizontal_blanking_time = le16_to_cpu(lvds->lcd_timing.h_blanking_time);
1462 info->lcd_timing.vertical_addressable = le16_to_cpu(lvds->lcd_timing.v_active);
1468 info->lcd_timing.vertical_blanking_time = le16_to_cpu(lvds
[all...]
/linux-master/drivers/gpu/drm/radeon/
H A Dradeon_legacy_encoders.c72 struct radeon_encoder_atom_dig *lvds = radeon_encoder->enc_priv; local
73 panel_pwr_delay = lvds->panel_pwr_delay;
74 if (lvds->bl_dev)
75 backlight_level = lvds->backlight_level;
77 struct radeon_encoder_lvds *lvds = radeon_encoder->enc_priv; local
78 panel_pwr_delay = lvds->panel_pwr_delay;
79 if (lvds->bl_dev)
80 backlight_level = lvds->backlight_level;
153 struct radeon_encoder_atom_dig *lvds = radeon_encoder->enc_priv; local
154 lvds
156 struct radeon_encoder_lvds *lvds = radeon_encoder->enc_priv; local
210 struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv; local
304 struct radeon_encoder_atom_dig *lvds = radeon_encoder->enc_priv; local
311 struct radeon_encoder_lvds *lvds = radeon_encoder->enc_priv; local
445 struct radeon_encoder_atom_dig *lvds = radeon_encoder->enc_priv; local
448 struct radeon_encoder_lvds *lvds = radeon_encoder->enc_priv; local
476 struct radeon_encoder_atom_dig *lvds = radeon_encoder->enc_priv; local
480 struct radeon_encoder_lvds *lvds = radeon_encoder->enc_priv; local
[all...]
H A Dradeon_combios.c1104 struct radeon_encoder_lvds *lvds; local
1109 lvds = kzalloc(sizeof(struct radeon_encoder_lvds), GFP_KERNEL);
1111 if (!lvds)
1118 lvds->panel_pwr_delay = 200;
1119 lvds->panel_vcc_delay = 2000;
1121 lvds->lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
1122 lvds->panel_digon_delay = (lvds_ss_gen_cntl >> RADEON_LVDS_PWRSEQ_DELAY1_SHIFT) & 0xf;
1123 lvds->panel_blon_delay = (lvds_ss_gen_cntl >> RADEON_LVDS_PWRSEQ_DELAY2_SHIFT) & 0xf;
1126 lvds->native_mode.vdisplay =
1130 lvds
1179 struct radeon_encoder_lvds *lvds = NULL; local
[all...]
H A Dradeon_atombios.c1627 struct radeon_encoder_atom_dig *lvds = NULL; local
1634 lvds =
1637 if (!lvds)
1640 lvds->native_mode.clock =
1642 lvds->native_mode.hdisplay =
1644 lvds->native_mode.vdisplay =
1646 lvds->native_mode.htotal = lvds->native_mode.hdisplay +
1648 lvds->native_mode.hsync_start = lvds
[all...]
H A Dradeon_legacy_crtc.c799 struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv; local
800 if (lvds) {
801 if (lvds->use_bios_dividers) {
802 pll_ref_div = lvds->panel_ref_divider;
803 pll_fb_post_div = (lvds->panel_fb_divider |
804 (lvds->panel_post_divider << 16));
/linux-master/arch/arm64/boot/dts/freescale/
H A DMakefile140 imx8mm-tqma8mqml-mba8mx-lvds-tm070jvhg33-dtbs += imx8mm-tqma8mqml-mba8mx.dtb imx8mm-tqma8mqml-mba8mx-lvds-tm070jvhg33.dtbo
141 dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx-lvds-tm070jvhg33.dtb
155 imx8mn-tqma8mqnl-mba8mx-lvds-tm070jvhg33-dtbs += imx8mn-tqma8mqnl-mba8mx.dtb imx8mn-tqma8mqnl-mba8mx-lvds-tm070jvhg33.dtbo
157 dtb-$(CONFIG_ARCH_MXC) += imx8mn-tqma8mqnl-mba8mx-lvds-tm070jvhg33.dtb
188 imx8mp-tqma8mpql-mba8mpxl-lvds-dtbs += imx8mp-tqma8mpql-mba8mpxl.dtb imx8mp-tqma8mpql-mba8mpxl-lvds.dtbo
189 imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01-dtbs += imx8mp-tqma8mpql-mba8mpxl.dtb imx8mp-tqma8mpql-mba8mpxl-lvds
[all...]
/linux-master/scripts/dtc/include-prefixes/arm64/freescale/
H A DMakefile140 imx8mm-tqma8mqml-mba8mx-lvds-tm070jvhg33-dtbs += imx8mm-tqma8mqml-mba8mx.dtb imx8mm-tqma8mqml-mba8mx-lvds-tm070jvhg33.dtbo
141 dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx-lvds-tm070jvhg33.dtb
155 imx8mn-tqma8mqnl-mba8mx-lvds-tm070jvhg33-dtbs += imx8mn-tqma8mqnl-mba8mx.dtb imx8mn-tqma8mqnl-mba8mx-lvds-tm070jvhg33.dtbo
157 dtb-$(CONFIG_ARCH_MXC) += imx8mn-tqma8mqnl-mba8mx-lvds-tm070jvhg33.dtb
188 imx8mp-tqma8mpql-mba8mpxl-lvds-dtbs += imx8mp-tqma8mpql-mba8mpxl.dtb imx8mp-tqma8mpql-mba8mpxl-lvds.dtbo
189 imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01-dtbs += imx8mp-tqma8mpql-mba8mpxl.dtb imx8mp-tqma8mpql-mba8mpxl-lvds
[all...]
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Datombios_encoders.c1975 struct amdgpu_encoder_atom_dig *lvds = NULL; local
1982 lvds =
1985 if (!lvds)
1988 lvds->native_mode.clock =
1990 lvds->native_mode.hdisplay =
1992 lvds->native_mode.vdisplay =
1994 lvds->native_mode.htotal = lvds->native_mode.hdisplay +
1996 lvds->native_mode.hsync_start = lvds
[all...]
/linux-master/drivers/gpu/drm/gma500/
H A Dpsb_intel_display.c230 u32 lvds = REG_READ(LVDS); local
232 lvds &= ~LVDS_PIPEB_SELECT;
234 lvds |= LVDS_PIPEB_SELECT;
236 lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
241 lvds &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
243 lvds |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
250 REG_WRITE(LVDS, lvds);
H A Dcdv_intel_lvds.c486 u32 lvds; local
611 lvds = REG_READ(LVDS);
612 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
615 if (crtc && (lvds & LVDS_PORT_EN)) {
628 ("Found no modes on the lvds, ignoring the LVDS\n");
H A Dpsb_intel_lvds.c151 dev_info(dev->dev, "Backlight lvds set brightness %08x\n",
634 u32 lvds; local
757 lvds = REG_READ(LVDS);
758 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
761 if (crtc && (lvds & LVDS_PORT_EN)) {
774 dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
H A Dcdv_intel_display.c518 /* Is pipe b lvds ? */
735 u32 lvds = REG_READ(LVDS); local
737 lvds |=
745 lvds |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
747 lvds &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
754 REG_WRITE(LVDS, lvds);
/linux-master/drivers/gpu/drm/nouveau/include/nvif/
H A Doutp.h41 } lvds; member in union:nvif_outp::__anon741::__anon744
/linux-master/drivers/gpu/drm/bridge/
H A DMakefile14 obj-$(CONFIG_DRM_LVDS_CODEC) += lvds-codec.o
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Doutp.h33 } lvds; member in union:nvkm_outp::__anon779
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_lvds.c289 * special lvds dither control bit on pch-split platforms, dithering is
742 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
848 u32 lvds; local
869 lvds = intel_de_read(i915, lvds_reg);
872 if ((lvds & LVDS_DETECTED) == 0)
878 if ((lvds & LVDS_PORT_EN) == 0) {
942 lvds_encoder->init_lvds_val = lvds;
1000 drm_dbg_kms(&i915->drm, "detected %s-link lvds configuration\n",
1003 lvds_encoder->a3_power = lvds & LVDS_A3_POWER_MASK;

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