/linux-master/arch/mips/mm/ |
H A D | c-octeon.c | 100 * Called to flush the icache on all cores 123 * Flush a range of kernel addresses out of the icache 182 c->icache.linesz = 2 << ((config1 >> 19) & 7); 183 c->icache.sets = 64 << ((config1 >> 22) & 7); 184 c->icache.ways = 1 + ((config1 >> 16) & 7); 185 c->icache.flags |= MIPS_CACHE_VTAG; 187 c->icache.sets * c->icache.ways * c->icache.linesz; 188 c->icache [all...] |
H A D | c-r4k.c | 231 unsigned long end = start + current_cpu_data.icache.waysize; 232 unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit; 233 unsigned long ws_end = current_cpu_data.icache.ways << 234 current_cpu_data.icache.waybit; 481 * enough to be visible to icache. 485 /* If executable, blast stale lines from icache */ 914 /* RM7000 erratum #31. The icache is screwed at startup. */ 1009 c->icache.linesz = 16 << ((config & CONF_IB) >> 5); 1010 c->icache.ways = 2; 1011 c->icache [all...] |
/linux-master/arch/sh/mm/ |
H A D | cache-shx3.c | 27 if (boot_cpu_data.dcache.n_aliases || boot_cpu_data.icache.n_aliases) { 30 boot_cpu_data.icache.n_aliases = 0;
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H A D | cache.c | 268 boot_cpu_data.icache.ways, 269 boot_cpu_data.icache.sets, 270 boot_cpu_data.icache.way_incr); 272 boot_cpu_data.icache.entry_mask, 273 boot_cpu_data.icache.alias_mask, 274 boot_cpu_data.icache.n_aliases); 307 compute_alias(&boot_cpu_data.icache);
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H A D | cache-debugfs.c | 52 cache = ¤t_cpu_data.icache; 103 debugfs_create_file("icache", S_IRUSR, arch_debugfs_dir,
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H A D | cache-sh4.c | 74 cpu_data->icache.entry_mask); 77 n = boot_cpu_data.icache.n_aliases; 78 for (i = 0; i < cpu_data->icache.ways; i++) { 81 icacheaddr += cpu_data->icache.way_incr; 137 /* TODO: Selective icache invalidation through IC address array.. */
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/linux-master/arch/sh/kernel/cpu/sh4/ |
H A D | probe.c | 33 * Setup some sane SH-4 defaults for the icache 35 boot_cpu_data.icache.way_incr = (1 << 13); 36 boot_cpu_data.icache.entry_shift = 5; 37 boot_cpu_data.icache.sets = 256; 38 boot_cpu_data.icache.ways = 1; 39 boot_cpu_data.icache.linesz = L1_CACHE_BYTES; 67 boot_cpu_data.icache.ways = 4; 171 boot_cpu_data.icache.ways = 2; 176 boot_cpu_data.icache.ways = 2; 192 boot_cpu_data.icache [all...] |
/linux-master/arch/mips/include/asm/ |
H A D | r4kcache.h | 245 __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, ) 248 __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, ) 249 __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_) 252 __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, ) 255 __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, ) 279 __BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16) 282 __BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32) 285 __BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64) 305 __BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, ) 307 __BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I_Loongson [all...] |
H A D | cpu-info.h | 75 struct cache_desc icache; /* Primary I-cache */ member in struct:cpuinfo_mips
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H A D | cpu-features.h | 249 #define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG) 255 #define cpu_has_ic_fills_f_dc (cpu_data[0].icache.flags & MIPS_CACHE_IC_F_DC) 274 #define cpu_icache_snoops_remote_store (cpu_data[0].icache.flags & MIPS_IC_SNOOPS_REMOTE) 511 #define cpu_icache_line_size() cpu_data[0].icache.linesz
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/linux-master/arch/sh/kernel/cpu/ |
H A D | init.c | 209 l1i_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.icache); 306 current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr - 307 current_cpu_data.icache.linesz; 309 current_cpu_data.icache.way_size = current_cpu_data.icache.sets * 310 current_cpu_data.icache.linesz;
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H A D | proc.c | 111 if (c->icache.flags & SH_CACHE_COMBINED) { 113 show_cacheinfo(m, "cache", c->icache); 116 show_cacheinfo(m, "icache", c->icache);
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/linux-master/arch/mips/kernel/ |
H A D | cacheinfo.c | 36 leaves += (c->icache.waysize) ? 2 : 1; 84 if (c->icache.waysize) { 89 populate_cache(icache, this_leaf, level, CACHE_TYPE_INST);
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/linux-master/arch/sh/kernel/cpu/sh2a/ |
H A D | probe.c | 51 * The icache is the same as the dcache as far as this setup is 52 * concerned. The only real difference in hardware is that the icache 56 boot_cpu_data.icache = boot_cpu_data.dcache;
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/linux-master/arch/sh/kernel/cpu/sh2/ |
H A D | probe.c | 69 boot_cpu_data.icache = boot_cpu_data.dcache;
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/linux-master/arch/sh/kernel/cpu/sh3/ |
H A D | probe.c | 105 boot_cpu_data.icache = boot_cpu_data.dcache;
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/linux-master/arch/powerpc/perf/ |
H A D | power9-pmu.c | 181 CACHE_EVENT_ATTR(L1-icache-load-misses, PM_L1_ICACHE_MISS); 182 CACHE_EVENT_ATTR(L1-icache-loads, PM_INST_FROM_L1); 183 CACHE_EVENT_ATTR(L1-icache-prefetches, PM_IC_PREF_WRITE);
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H A D | power8-pmu.c | 138 CACHE_EVENT_ATTR(L1-icache-load-misses, PM_L1_ICACHE_MISS); 139 CACHE_EVENT_ATTR(L1-icache-loads, PM_INST_FROM_L1); 140 CACHE_EVENT_ATTR(L1-icache-prefetches, PM_IC_PREF_WRITE);
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H A D | power10-pmu.c | 137 CACHE_EVENT_ATTR(L1-icache-load-misses, PM_L1_ICACHE_MISS); 138 CACHE_EVENT_ATTR(L1-icache-loads, PM_INST_FROM_L1); 139 CACHE_EVENT_ATTR(L1-icache-prefetches, PM_IC_PREF_REQ);
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H A D | generic-compat-pmu.c | 111 CACHE_EVENT_ATTR(L1-icache-load-misses, PM_L1_ICACHE_MISS);
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/linux-master/arch/sh/include/asm/ |
H A D | processor.h | 77 struct cache_info icache; /* Primary I-cache */ member in struct:sh_cpuinfo
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/linux-master/arch/powerpc/kernel/ |
H A D | cacheinfo.c | 372 struct cache *dcache, *icache; local 374 pr_debug("creating L%d dcache and icache for %pOFP\n", level, 378 icache = new_cache(CACHE_TYPE_INSTRUCTION, level, node, group_id); 380 if (!dcache || !icache) 383 dcache->next_local = icache; 388 release_cache(icache);
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H A D | setup_64.c | 570 bool icache, 585 const char **propnames = icache ? ipropnames : dpropnames; 659 pr_warn("Argh, can't find icache properties !\n"); 569 parse_cache_info(struct device_node *np, bool icache, struct ppc_cache_info *info) argument
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/linux-master/drivers/gpu/drm/msm/adreno/ |
H A D | a6xx_gmu.h | 68 struct a6xx_gmu_bo icache; member in struct:a6xx_gmu
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/linux-master/drivers/soc/bcm/brcmstb/pm/ |
H A D | pm-mips.c | 270 s2_params[3] = (u32)current_cpu_data.icache.linesz;
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