#
157efa29 |
|
02-Aug-2023 |
Matthew Wilcox (Oracle) <willy@infradead.org> |
sh: implement the new page table range API Add PFN_PTE_SHIFT, update_mmu_cache_range(), flush_dcache_folio() and flush_icache_pages(). Change the PG_dcache_clean flag from being per-page to per-folio. Flush the entire folio containing the pages in flush_icache_pages() for ease of implementation. Link: https://lkml.kernel.org/r/20230802151406.3735276-25-willy@infradead.org Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org> Acked-by: Mike Rapoport (IBM) <rppt@kernel.org> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Rich Felker <dalias@libc.org> Cc: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
|
#
37744fee |
|
20-Apr-2020 |
Arnd Bergmann <arnd@arndb.de> |
sh: remove sh5 support sh5 never became a product and has probably never really worked. Remove it by recursively deleting all associated Kconfig options and all corresponding files. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rich Felker <dalias@libc.org>
|
#
c456cfc2 |
|
28-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 211 Based on 1 normalized pattern(s): released under the terms of the gnu gpl v2 0 extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 9 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528171439.076212120@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
#
a1e262f6 |
|
15-Feb-2016 |
Rich Felker <dalias@libc.org> |
sh: do not perform IPI-based cache flush except on boards that need it Signed-off-by: Rich Felker <dalias@libc.org>
|
#
5a846aba |
|
17-Mar-2016 |
Rich Felker <dalias@libc.org> |
sh: add support for J-Core J2 processor At the CPU/ISA level, the J2 is compatible with SH-2, and thus the changes to add J2 support build on existing SH-2 support. However, J2 does not duplicate the memory-mapped SH-2 features like the cache interface. Instead, the cache interfaces is described in the device tree, and new code is added to be able to access the flat device tree at early boot before it is unflattened. Support is also added for receiving interrupts on trap numbers in the range 16 to 31, since the J-Core aic1 interrupt controller generates these traps. This range was unused but nominally for hardware exceptions on SH-2, and a few values in this range were used for exceptions on SH-2A, but SH-2A has its own version of the relevant code. No individual cpu subtypes are added for J2 since the intent moving forward is to represent SoCs with device tree rather than as hard-coded subtypes in the kernel. The CPU_SUBTYPE_J2 Kconfig item exists only to fit into the existing cpu selection mechanism until it is overhauled. Signed-off-by: Rich Felker <dalias@libc.org>
|
#
57155c65 |
|
22-Mar-2016 |
Rich Felker <dalias@libc.org> |
sh: disable aliased page logic on NOMMU models SH3/4 (with MMU) have a virtually indexed cache, requiring explicit work to avoid consistency problems arising from having the same physical address range cached in multiple cache lines. This is unneeded for the NOMMU case, and some of the resulting code paths (kmap_coherent) don't work. SH2 only avoided this problem by having a 4-way associative cache with way size equal to the page size (4k), yielding no cache index bits outside of the page offset and thus no aliases. Signed-off-by: Rich Felker <dalias@libc.org>
|
#
e1534ae9 |
|
15-Jan-2016 |
Kirill A. Shutemov <kirill.shutemov@linux.intel.com> |
mm: differentiate page_mapped() from page_mapcount() for compound pages Let's define page_mapped() to be true for compound pages if any sub-pages of the compound page is mapped (with PMD or PTE). On other hand page_mapcount() return mapcount for this particular small page. This will make cases like page_get_anon_vma() behave correctly once we allow huge pages to be mapped with PTE. Most users outside core-mm should use page_mapcount() instead of page_mapped(). Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Tested-by: Sasha Levin <sasha.levin@oracle.com> Tested-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by: Jerome Marchand <jmarchan@redhat.com> Cc: Vlastimil Babka <vbabka@suse.cz> Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: Hugh Dickins <hughd@google.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Mel Gorman <mgorman@suse.de> Cc: Rik van Riel <riel@redhat.com> Cc: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com> Cc: Steve Capper <steve.capper@linaro.org> Cc: Johannes Weiner <hannes@cmpxchg.org> Cc: Michal Hocko <mhocko@suse.cz> Cc: Christoph Lameter <cl@linux.com> Cc: David Rientjes <rientjes@google.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
#
e3560305 |
|
29-Aug-2014 |
Pranith Kumar <bobby.prani@gmail.com> |
flush_icache_range: export symbol to fix build errors Fix building errors occuring due to a missing export of flush_icache_range() in kisskb.ellerman.id.au/kisskb/buildresult/11677809/ ERROR: "flush_icache_range" [drivers/misc/lkdtm.ko] undefined! Signed-off-by: Pranith Kumar <bobby.prani@gmail.com> Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Vineet Gupta <vgupta@synopsys.com> [arc] Acked-by: Richard Kuo <rkuo@codeaurora.org> [hexagon] Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Chris Zankel <chris@zankel.net> Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa] Cc: Noam Camus <noamc@ezchip.com> Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Acked-by: Zhigang Lu <zlu@tilera.com> [tile] Cc: Kirill Tkhai <tkhai@yandex.ru> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
#
a5f6ea29 |
|
03-Mar-2014 |
Geert Uytterhoeven <geert@linux-m68k.org> |
sh: prefix sh-specific "CCR" and "CCR2" by "SH_" Commit bcf24e1daa94 ("mmc: omap_hsmmc: use the generic config for omap2plus devices"), enabled the build for other platforms for compile testing. sh-allmodconfig now fails with: include/linux/omap-dma.h:171:8: error: expected identifier before numeric constant make[4]: *** [drivers/mmc/host/omap_hsmmc.o] Error 1 This happens because SuperH #defines "CCR", which is one of the enum values in include/linux/omap-dma.h. There's a similar issue with "CCR2" on sh2a. As "CCR" and "CCR2" are too generic names for global #defines, prefix them with "SH_" to fix this. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
#
bc3e11be |
|
25-Nov-2011 |
Cong Wang <amwang@redhat.com> |
sh: remove the second argument of k[un]map_atomic() Signed-off-by: Cong Wang <amwang@redhat.com>
|
#
a25bbe12 |
|
31-Jan-2011 |
Stuart Menefy <stuart.menefy@st.com> |
sh: Flush executable pages in copy_user_highpage This resolves a problem seen when using the Android dynamic linker. Sometimes the dynamic linker would seg-fault at start up and this was eventually traced to the handling of a COW fault for a page which was being modified by the linker. If there was no cache aliasing between the kernel and the user page, the page was not flushed, leaving the newly copied data in the D-cache. However when executing instructions from that page, the I-cache is filled directly from external memory, rather than the D-cache, and causing garbage to be executed. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
55661fc1 |
|
30-Nov-2010 |
Paul Mundt <lethal@linux-sh.org> |
sh: Assume new page cache pages have dirty dcache lines. This follows the ARM change c01778001a4f5ad9c62d882776235f3f31922fdd ("ARM: 6379/1: Assume new page cache pages have dirty D-cache") for the same rationale: There are places in Linux where writes to newly allocated page cache pages happen without a subsequent call to flush_dcache_page() (several PIO drivers including USB HCD). This patch changes the meaning of PG_arch_1 to be PG_dcache_clean and always flush the D-cache for a newly mapped page in update_mmu_cache(). This addresses issues seen with executing binaries from MMC, in addition to some of the other HCDs that don't explicitly do cache management for their pipe-in buffers. Requested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
3cf6fa1e |
|
19-Apr-2010 |
Paul Mundt <lethal@linux-sh.org> |
sh: Enable SH-X3 hardware synonym avoidance handling. This enables support for the hardware synonym avoidance handling on SH-X3 CPUs for the case where dcache aliases are possible. icache handling is retained, but we flip on broadcasting of the block invalidations due to the lack of coherency otherwise on SMP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
a6198a23 |
|
14-Jan-2010 |
Paul Mundt <lethal@linux-sh.org> |
sh: Guard against early IPIs in flush_cache_all(). flush_cache_all() gets called in to when we do some early ioremapping. Unfortunately on SDK7786 the interrupt controller itself requires ioremapping, leading to a bit of a chicken and egg scenario. For now, don't bother with IPI crosscalls if there aren't any other CPUs online. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
76382b5b |
|
23-Dec-2009 |
Markus Pietrek <Markus.Pietrek@emtrion.de> |
sh: Ensure all PG_dcache_dirty pages are written back. With some of the cache rework an address aliasing optimization was added, but this managed to fail on certain mappings resulting in pages with PG_dcache_dirty set never writing back their dcache lines. This patch reverts to the earlier behaviour of simply always writing back when the dirty bit is set. Signed-off-by: Markus Pietrek <Markus.Pietrek@emtrion.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
7e01c949 |
|
03-Dec-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: Partial revert of copy/clear_user_highpage() optimizations. These still require more testing, so revert them for now. We keep the off-by-1 in the fixmap colouring and drop the rest. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
39ac11c1 |
|
27-Oct-2009 |
Stuart Menefy <stuart.menefy@st.com> |
sh: Improve performance of SH4 versions of copy/clear_user_highpage The previous implementation of clear_user_highpage and copy_user_highpage checked to see if there was a D-cache aliasing issue between the user and kernel mappings of a page, but if there was they always did a flush with writeback on the dirtied kernel alias. However as we now have the ability to map a page into kernel space with the same cache colour as the user mapping, there is no need to write back this data. Currently we also invalidate the kernel alias as a precaution, however I'm not sure if this is actually required. Also correct the definition of FIX_CMAP_END so that the mappings created by kmap_coherent() are actually at the correct colour. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
3af539e5 |
|
12-Nov-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh64: Fix up reworked cache op build. This gets the build fixed up for the sh64 cache enabled case. Disabling still needs further abstraction for independent I/D-cache disabling. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
0a993b0a |
|
26-Oct-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh64: cache flush symbol exports. These were previously hidden in sh_ksyms_32, despite also being needed for sh64 now that the cache.c code is shared. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
5fb80ae8 |
|
15-Oct-2009 |
Magnus Damm <damm@opensource.se> |
sh: disabled cache handling fix. Add code to handle the cache disabled case. Fixes breakage introduced by 37443ef3f0406e855e169c87ae3f4ffb4b6ff635 ("sh: Migrate SH-4 cacheflush ops to function pointers."). Without this patch configuring caches off with CONFIG_CACHE_OFF=y makes kfr2r09 and migo-r lock up in fbdev deferred io or early user space. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
964f7e5a |
|
12-Oct-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: force dcache flush if dcache_dirty bit set. This too follows the ARM change, given that the issue at hand applies to all platforms that implement lazy D-cache writeback. This fixes up the case when a page mapping disappears between the flush_dcache_page() call (when PG_dcache_dirty is set for the page) and the update_mmu_cache() call -- such as in the case of swap cache being freed early. This kills off the mapping test in update_mmu_cache() and switches to simply testing for PG_dcache_dirty. Reported-by: Nitin Gupta <ngupta@vflare.org> Reported-by: Hugh Dickins <hugh.dickins@tiscali.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
654d364e |
|
08-Sep-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: sh4_flush_cache_mm() optimizations. The i-cache flush in the case of VM_EXEC was added way back when as a sanity measure, and in practice we only care about evicting aliases from the d-cache. As a result, it's possible to drop the i-cache flush completely here. After careful profiling it's also come up that all of the work associated with hunting down aliases and doing ranged flushing ends up generating more overhead than simply blasting away the entire dcache, particularly if there are many mm's that need to be iterated over. As a result of that, just move back to flush_dcache_all() in these cases, which restores the old behaviour, and vastly simplifies the path. Additionally, on platforms without aliases at all, this can simply be nopped out. Presently we have the alias check in the SH-4 specific version, but this is true for all of the platforms, so move the check up to a generic location. This cuts down quite a bit on superfluous cacheop IPIs. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
6e4154d4 |
|
08-Sep-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: Use more aggressive dcache purging in kmap teardown. This fixes up a number of outstanding issues observed with old mappings on the same colour hanging around. This requires some more optimal handling, but is a safe fallback until all of the corner cases have been handled. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
0906a3ad |
|
03-Sep-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: Fix up and optimize the kmap_coherent() interface. This fixes up the kmap_coherent/kunmap_coherent() interface for recent changes both in the page fault path and the shared cache flushers, as well as adding in some optimizations. One of the key things to note here is that the TLB flush itself is deferred until the unmap, and the call in to update_mmu_cache() itself goes away, relying on the regular page fault path to handle the lazy dcache writeback if necessary. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
6f379578 |
|
01-Sep-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: Fix up UP deadlock with SMP-aware cache ops. This builds on top of the previous reversion and implements a special on_each_cpu() variant that simple disables preemption across the call while leaving the interrupt state to the function itself. There were some unintended consequences with IRQ disabling in some of these paths on UP that ran in to a deadlock scenario with IRQs being missed. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
f26b2a56 |
|
21-Aug-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: Make cache flushers SMP-aware. This does a bit of rework for making the cache flushers SMP-aware. The function pointer-based flushers are renamed to local variants with the exported interface being commonly implemented and wrapping as necessary. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
2b431518 |
|
15-Aug-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: Wire up sh5_cache_init(). Now that the SH-5 code is more or less behaving with the new cacheflush interface, wire up the initialization code. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
0d051d90 |
|
14-Aug-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: Convert SH7705 extended mode to new cacheflush interface. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
79f1c9da |
|
14-Aug-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: Convert SH-3 to new cacheflush interface. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
a58e1a2a |
|
14-Aug-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: Convert SH-2A to new cacheflush interface. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
109b44a8 |
|
14-Aug-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: Convert SH-2 to new cacheflush interface. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
37443ef3 |
|
14-Aug-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: Migrate SH-4 cacheflush ops to function pointers. This paves the way for allowing individual CPUs to overload the individual flushing routines that they care about without having to depend on weak aliases. SH-4 is converted over initially, as it wires up pretty much everything. The majority of the other CPUs will simply use the default no-op implementation with their own region flushers wired up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
27d59ec1 |
|
14-Aug-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: Move alias computation to shared cache init. This migrates the alias computation and printing of probed cache parameters from the SH-4 code to the shared cpu_cache_init(). This permits other platforms with aliases to make use of the same probe logic without having to roll their own, and also produces consistent output regardless of platform. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
ecba1060 |
|
14-Aug-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: Centralize the CPU cache initialization routines. This provides a central point for CPU cache initialization routines. This replaces the antiquated p3_cache_init() method, which the vast majority of CPUs never cared about. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
#
cbbe2f68 |
|
14-Aug-2009 |
Paul Mundt <lethal@linux-sh.org> |
sh: rename pg-mmu.c -> cache.c, enable generically. This builds in the newly created cache.c (renamed from pg-mmu.c) for both MMU and NOMMU configurations. The kmap_coherent() stubs and alias information recorded by each CPU family takes care of doing the right thing while enabling the code to be commonly shared. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|