| /linux-master/arch/powerpc/crypto/ |
| H A D | aes-gcm-p10-glue.c | 87 static void set_aad(struct gcm_ctx *gctx, struct Hash_ctx *hash, argument
93 gctx->aadLen = alen;
104 memset(gctx->aad_hash, 0, 16);
105 gcm_ghash_p10(gctx->aad_hash, hash->Htable+32, nXi, 16);
107 memcpy(gctx->aad_hash, nXi, 16);
110 memcpy(hash->Htable, gctx->aad_hash, 16);
113 static void gcmp10_init(struct gcm_ctx *gctx, u8 *iv, unsigned char *rdkey, argument
124 gctx->Plen = 0;
129 aes_p10_encrypt(iv, gctx->ivtag, rdkey);
133 memcpy(gctx
141 finish_tag(struct gcm_ctx *gctx, struct Hash_ctx *hash, int len) argument
206 struct gcm_ctx *gctx = PTR_ALIGN((void *)databuf, PPC_ALIGN); local
[all...] |
| /linux-master/drivers/gpu/drm/radeon/ |
| H A D | atom.c | 184 struct atom_context *gctx = ctx->ctx; local
193 idx += gctx->reg_block;
194 switch (gctx->io_mode) {
196 val = gctx->card->reg_read(gctx->card, idx);
205 if (!(gctx->io_mode & 0x80)) {
209 if (!gctx->iio[gctx->io_mode & 0x7F]) {
211 gctx->io_mode & 0x7F);
215 atom_iio_execute(gctx,
460 struct atom_context *gctx = ctx->ctx; local
[all...] |
| /linux-master/drivers/gpu/drm/amd/amdgpu/ |
| H A D | atom.c | 186 struct atom_context *gctx = ctx->ctx; local
195 idx += gctx->reg_block;
196 switch (gctx->io_mode) {
198 val = gctx->card->reg_read(gctx->card, idx);
207 if (!(gctx->io_mode & 0x80)) {
211 if (!gctx->iio[gctx->io_mode & 0x7F]) {
213 gctx->io_mode & 0x7F);
217 atom_iio_execute(gctx,
461 struct atom_context *gctx = ctx->ctx; local
[all...] |
| /linux-master/net/sunrpc/auth_gss/ |
| H A D | gss_krb5_mech.c | 514 * @gctx: GSS context
523 static u32 gss_krb5_get_mic(struct gss_ctx *gctx, struct xdr_buf *text, argument
526 struct krb5_ctx *kctx = gctx->internal_ctx_id;
533 * @gctx: GSS context
544 static u32 gss_krb5_verify_mic(struct gss_ctx *gctx, argument
548 struct krb5_ctx *kctx = gctx->internal_ctx_id;
555 * @gctx: initialized GSS context
565 static u32 gss_krb5_wrap(struct gss_ctx *gctx, int offset, argument
568 struct krb5_ctx *kctx = gctx->internal_ctx_id;
575 * @gctx
587 gss_krb5_unwrap(struct gss_ctx *gctx, int offset, int len, struct xdr_buf *buf) argument
[all...] |
| /linux-master/crypto/ |
| H A D | gcm.c | 227 struct crypto_gcm_ghash_ctx *gctx = &pctx->ghash_ctx; local
231 lengths.b = cpu_to_be64(gctx->cryptlen * 8);
244 struct crypto_gcm_ghash_ctx *gctx = &pctx->ghash_ctx; local
246 return gctx->complete(req, flags);
288 struct crypto_gcm_ghash_ctx *gctx = &pctx->ghash_ctx; local
291 remain = gcm_remain(gctx->cryptlen);
318 struct crypto_gcm_ghash_ctx *gctx = &pctx->ghash_ctx; local
320 if (gctx->cryptlen)
322 gctx->src, gctx
425 struct crypto_gcm_ghash_ctx *gctx = &pctx->ghash_ctx; local
492 struct crypto_gcm_ghash_ctx *gctx = &pctx->ghash_ctx; local
503 struct crypto_gcm_ghash_ctx *gctx = &pctx->ghash_ctx; local
[all...] |
| /linux-master/drivers/accel/ivpu/ |
| H A D | ivpu_drv.h | 118 struct ivpu_mmu_context gctx; member in struct:ivpu_device
|
| H A D | ivpu_mmu_context.c | 489 return ivpu_mmu_context_init(vdev, &vdev->gctx, IVPU_GLOBAL_CONTEXT_MMU_SSID);
494 return ivpu_mmu_context_fini(vdev, &vdev->gctx);
|
| H A D | ivpu_fw.c | 261 fw->mem = ivpu_bo_create(vdev, &vdev->gctx, &fw_range, fw->runtime_size,
290 fw->mem_shave_nn = ivpu_bo_create(vdev, &vdev->gctx, &vdev->hw->ranges.shave,
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| H A D | ivpu_gem.c | 338 return ivpu_bo_create(vdev, &vdev->gctx, &vdev->hw->ranges.global, size, flags);
|
| H A D | ivpu_mmu.c | 761 ret = ivpu_mmu_cd_add(vdev, 0, vdev->gctx.pgtable.pgd_dma);
|
| /linux-master/drivers/crypto/chelsio/ |
| H A D | chcr_algo.c | 114 static inline struct chcr_gcm_ctx *GCM_CTX(struct chcr_aead_ctx *gctx) argument
116 return gctx->ctx->gcm;
119 static inline struct chcr_authenc_ctx *AUTHENC_CTX(struct chcr_aead_ctx *gctx) argument
121 return gctx->ctx->authenc;
3499 struct chcr_gcm_ctx *gctx = GCM_CTX(aeadctx); local
3545 memset(gctx->ghash_h, 0, AEAD_H_SIZE);
3546 aes_encrypt(&aes, gctx->ghash_h, gctx->ghash_h);
|