| /linux-master/tools/testing/selftests/kvm/include/x86_64/ |
| H A D | pmu.h | 13 * Encode an eventsel+umask pair into event-select MSR format. Note, this is
18 #define RAW_EVENT(eventsel, umask) (((eventsel & 0xf00UL) << 24) | \
19 ((eventsel) & 0xff) | \
|
| /linux-master/arch/x86/kvm/ |
| H A D | pmu.c | 371 static bool filter_contains_match(u64 *events, u64 nevents, u64 eventsel) argument
373 u64 event_select = eventsel & kvm_pmu_ops.EVENTSEL_EVENT;
374 u64 umask = eventsel & ARCH_PERFMON_EVENTSEL_UMASK;
405 u64 eventsel)
407 if (filter_contains_match(f->includes, f->nr_includes, eventsel) &&
408 !filter_contains_match(f->excludes, f->nr_excludes, eventsel))
439 return is_gp_event_allowed(filter, pmc->eventsel);
453 u64 eventsel = pmc->eventsel; local
454 u64 new_config = eventsel;
404 is_gp_event_allowed(struct kvm_x86_pmu_event_filter *f, u64 eventsel) argument
863 kvm_pmu_trigger_event(struct kvm_vcpu *vcpu, u64 eventsel) argument
[all...] |
| H A D | pmu.h | 175 return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE;
273 void kvm_pmu_trigger_event(struct kvm_vcpu *vcpu, u64 eventsel);
|
| /linux-master/arch/x86/kvm/vmx/ |
| H A D | pmu_intel.c | 330 msr_info->data = pmc->eventsel;
402 if (data != pmc->eventsel) {
403 pmc->eventsel = data;
437 u64 eventsel; local
446 eventsel = perf_get_hw_event_config(fixed_pmc_perf_ids[index]);
447 WARN_ON_ONCE(!eventsel && index < kvm_pmu_cap.num_counters_fixed);
448 return eventsel;
579 pmu->fixed_counters[i].eventsel = intel_get_fixed_pmc_eventsel(i);
|
| /linux-master/arch/x86/kvm/svm/ |
| H A D | pmu.c | 142 msr_info->data = pmc->eventsel;
166 if (data != pmc->eventsel) {
167 pmc->eventsel = data;
|
| /linux-master/arch/arm64/kvm/ |
| H A D | pmu-emul.c | 603 u64 eventsel, reg, data; local
611 eventsel = ARMV8_PMUV3_PERFCTR_CPU_CYCLES;
613 eventsel = data & kvm_pmu_event_mask(vcpu->kvm);
619 if (eventsel == ARMV8_PMUV3_PERFCTR_SW_INCR ||
620 eventsel == ARMV8_PMUV3_PERFCTR_CHAIN)
628 !test_bit(eventsel, vcpu->kvm->arch.pmu_filter))
645 attr.config = eventsel;
|
| /linux-master/arch/x86/events/amd/ |
| H A D | core.c | 315 static inline int amd_pmu_addr_offset(int index, bool eventsel) argument
322 if (eventsel)
335 if (eventsel)
1280 .eventsel = MSR_K7_EVNTSEL0,
1382 x86_pmu.eventsel = MSR_F15H_PERF_CTL;
|
| /linux-master/drivers/gpu/drm/amd/amdgpu/ |
| H A D | df_v3_6.c | 412 uint32_t eventsel, instance, unitmask; local
424 eventsel = DF_V3_6_GET_EVENT(config) & 0x3f;
432 *lo_val = (unitmask << 8) | (instance_10 << 6) | eventsel;
|
| /linux-master/tools/testing/selftests/kvm/x86_64/ |
| H A D | pmu_counters_test.c | 250 uint64_t eventsel = ARCH_PERFMON_EVENTSEL_OS | local
259 MSR_P6_EVNTSEL0 + i, eventsel);
|
| /linux-master/arch/x86/events/intel/ |
| H A D | knc.c | 299 .eventsel = MSR_KNC_EVNTSEL0,
|
| H A D | p6.c | 210 .eventsel = MSR_P6_EVNTSEL0,
|
| H A D | p4.c | 1345 .eventsel = MSR_P4_BPU_CCCR0,
|
| H A D | core.c | 268 * Note the low 8 bits eventsel code is not a continuous field, containing
5059 .eventsel = MSR_ARCH_PERFMON_EVENTSEL0,
5112 .eventsel = MSR_ARCH_PERFMON_EVENTSEL0,
|
| /linux-master/arch/x86/events/ |
| H A D | perf_event.h | 771 unsigned eventsel; member in struct:x86_pmu
773 int (*addr_offset)(int index, bool eventsel);
1113 return x86_pmu.eventsel + (x86_pmu.addr_offset ?
|
| /linux-master/arch/x86/events/zhaoxin/ |
| H A D | core.c | 468 .eventsel = MSR_ARCH_PERFMON_EVENTSEL0,
|
| /linux-master/arch/x86/include/asm/ |
| H A D | kvm_host.h | 521 u64 eventsel; member in struct:kvm_pmc
526 * eventsel value for general purpose counters,
|