Searched refs:dw (Results 1 - 25 of 187) sorted by relevance

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/linux-master/drivers/dma/dw-edma/
H A DMakefile3 obj-$(CONFIG_DW_EDMA) += dw-edma.o
4 dw-edma-$(CONFIG_DEBUG_FS) := dw-edma-v0-debugfs.o \
5 dw-hdma-v0-debugfs.o
6 dw-edma-objs := dw-edma-core.o \
7 dw-edma-v0-core.o \
8 dw-hdma-v0-core.o $(dw-edma-y)
9 obj-$(CONFIG_DW_EDMA_PCIE) += dw
[all...]
H A Ddw-edma-v0-debugfs.c12 #include "dw-edma-v0-debugfs.h"
13 #include "dw-edma-v0-regs.h"
14 #include "dw-edma-core.h"
16 #define REGS_ADDR(dw, name) \
18 struct dw_edma_v0_regs __iomem *__regs = (dw)->chip->reg_base; \
23 #define REGS_CH_ADDR(dw, name, _dir, _ch) \
27 if ((dw)->chip->mf == EDMA_MF_EDMA_LEGACY) \
28 __ch_regs = REGS_ADDR(dw, type.legacy.ch); \
30 __ch_regs = REGS_ADDR(dw, type.unroll.ch[_ch].rd); \
32 __ch_regs = REGS_ADDR(dw, typ
64 struct dw_edma *dw; member in struct:dw_edma_debugfs_entry
74 struct dw_edma *dw = entry->dw; local
99 dw_edma_debugfs_create_x32(struct dw_edma *dw, const struct dw_edma_debugfs_entry ini[], int nr_entries, struct dentry *dent) argument
119 dw_edma_debugfs_regs_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch, struct dentry *dent) argument
140 dw_edma_debugfs_regs_wr(struct dw_edma *dw, struct dentry *dent) argument
201 dw_edma_debugfs_regs_rd(struct dw_edma *dw, struct dentry *dent) argument
264 dw_edma_debugfs_regs(struct dw_edma *dw) argument
282 dw_edma_v0_debugfs_on(struct dw_edma *dw) argument
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H A Ddw-edma-v0-debugfs.h15 void dw_edma_v0_debugfs_on(struct dw_edma *dw);
17 static inline void dw_edma_v0_debugfs_on(struct dw_edma *dw) argument
H A Ddw-hdma-v0-debugfs.h15 void dw_hdma_v0_debugfs_on(struct dw_edma *dw);
17 static inline void dw_hdma_v0_debugfs_on(struct dw_edma *dw) argument
H A Ddw-hdma-v0-debugfs.c12 #include "dw-hdma-v0-debugfs.h"
13 #include "dw-hdma-v0-regs.h"
14 #include "dw-edma-core.h"
16 #define REGS_ADDR(dw, name) \
18 struct dw_hdma_v0_regs __iomem *__regs = (dw)->chip->reg_base; \
23 #define REGS_CH_ADDR(dw, name, _dir, _ch) \
28 __ch_regs = REGS_ADDR(dw, ch[_ch].rd); \
30 __ch_regs = REGS_ADDR(dw, ch[_ch].wr); \
35 #define CTX_REGISTER(dw, name, dir, ch) \
36 {#name, REGS_CH_ADDR(dw, nam
59 dw_hdma_debugfs_create_x32(struct dw_edma *dw, const struct dw_hdma_debugfs_entry ini[], int nr_entries, struct dentry *dent) argument
79 dw_hdma_debugfs_regs_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch, struct dentry *dent) argument
116 dw_hdma_debugfs_regs_wr(struct dw_edma *dw, struct dentry *dent) argument
133 dw_hdma_debugfs_regs_rd(struct dw_edma *dw, struct dentry *dent) argument
150 dw_hdma_debugfs_regs(struct dw_edma *dw) argument
160 dw_hdma_v0_debugfs_on(struct dw_edma *dw) argument
[all...]
H A Ddw-edma-v0-core.h15 void dw_edma_v0_core_register(struct dw_edma *dw);
H A Ddw-hdma-v0-core.h15 void dw_hdma_v0_core_register(struct dw_edma *dw);
H A Ddw-edma-v0-core.c13 #include "dw-edma-core.h"
14 #include "dw-edma-v0-core.h"
15 #include "dw-edma-v0-regs.h"
16 #include "dw-edma-v0-debugfs.h"
28 static inline struct dw_edma_v0_regs __iomem *__dw_regs(struct dw_edma *dw) argument
30 return dw->chip->reg_base;
33 #define SET_32(dw, name, value) \
34 writel(value, &(__dw_regs(dw)->name))
36 #define GET_32(dw, name) \
37 readl(&(__dw_regs(dw)
95 __dw_ch_regs(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch) argument
106 writel_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch, u32 value, void __iomem *addr) argument
129 readl_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch, const void __iomem *addr) argument
163 dw_edma_v0_core_off(struct dw_edma *dw) argument
172 dw_edma_v0_core_ch_count(struct dw_edma *dw, enum dw_edma_dir dir) argument
191 struct dw_edma *dw = chan->dw; local
207 struct dw_edma *dw = chan->dw; local
215 struct dw_edma *dw = chan->dw; local
221 dw_edma_v0_core_status_done_int(struct dw_edma *dw, enum dw_edma_dir dir) argument
227 dw_edma_v0_core_status_abort_int(struct dw_edma *dw, enum dw_edma_dir dir) argument
237 struct dw_edma *dw = dw_irq->dw; local
366 struct dw_edma *dw = chan->dw; local
439 struct dw_edma *dw = chan->dw; local
507 dw_edma_v0_core_debugfs_on(struct dw_edma *dw) argument
522 dw_edma_v0_core_register(struct dw_edma *dw) argument
[all...]
H A Ddw-hdma-v0-core.c11 #include "dw-edma-core.h"
12 #include "dw-hdma-v0-core.h"
13 #include "dw-hdma-v0-regs.h"
14 #include "dw-hdma-v0-debugfs.h"
26 static inline struct dw_hdma_v0_regs __iomem *__dw_regs(struct dw_edma *dw) argument
28 return dw->chip->reg_base;
32 __dw_ch_regs(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch) argument
35 return &(__dw_regs(dw)->ch[ch].wr);
37 return &(__dw_regs(dw)->ch[ch].rd);
40 #define SET_CH_32(dw, di
53 dw_hdma_v0_core_off(struct dw_edma *dw) argument
66 dw_hdma_v0_core_ch_count(struct dw_edma *dw, enum dw_edma_dir dir) argument
78 struct dw_edma *dw = chan->dw; local
94 struct dw_edma *dw = chan->dw; local
101 struct dw_edma *dw = chan->dw; local
108 struct dw_edma *dw = chan->dw; local
117 struct dw_edma *dw = dw_irq->dw; local
242 struct dw_edma *dw = chan->dw; local
278 struct dw_edma *dw = chan->dw; local
291 dw_hdma_v0_core_debugfs_on(struct dw_edma *dw) argument
306 dw_hdma_v0_core_register(struct dw_edma *dw) argument
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H A Ddw-edma-core.h76 struct dw_edma *dw; member in struct:dw_edma_chan
95 struct dw_edma *dw; member in struct:dw_edma_irq
121 void (*off)(struct dw_edma *dw);
122 u16 (*ch_count)(struct dw_edma *dw, enum dw_edma_dir dir);
128 void (*debugfs_on)(struct dw_edma *dw);
167 void dw_edma_core_off(struct dw_edma *dw) argument
169 dw->core->off(dw);
173 u16 dw_edma_core_ch_count(struct dw_edma *dw, enum dw_edma_dir dir) argument
175 return dw
192 dw_edma_core_start(struct dw_edma *dw, struct dw_edma_chunk *chunk, bool first) argument
204 dw_edma_core_debugfs_on(struct dw_edma *dw) argument
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H A Ddw-edma-core.c19 #include "dw-edma-core.h"
20 #include "dw-edma-v0-core.h"
21 #include "dw-hdma-v0-core.h"
46 struct dw_edma_chip *chip = chan->dw->chip;
78 struct dw_edma_chip *chip = desc->chan->dw->chip;
187 struct dw_edma *dw = chan->dw; local
205 dw_edma_core_start(dw, child, !desc->xfer_sz);
220 if (chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) {
404 if (chan->dw
710 dw_edma_channel_setup(struct dw_edma *dw, u32 wr_alloc, u32 rd_alloc) argument
830 dw_edma_irq_request(struct dw_edma *dw, u32 *wr_alloc, u32 *rd_alloc) argument
908 struct dw_edma *dw; local
988 struct dw_edma *dw = chip->dw; local
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/linux-master/drivers/gpu/drm/bridge/synopsys/
H A DMakefile2 obj-$(CONFIG_DRM_DW_HDMI) += dw-hdmi.o
3 obj-$(CONFIG_DRM_DW_HDMI_AHB_AUDIO) += dw-hdmi-ahb-audio.o
4 obj-$(CONFIG_DRM_DW_HDMI_GP_AUDIO) += dw-hdmi-gp-audio.o
5 obj-$(CONFIG_DRM_DW_HDMI_I2S_AUDIO) += dw-hdmi-i2s-audio.o
6 obj-$(CONFIG_DRM_DW_HDMI_CEC) += dw-hdmi-cec.o
8 obj-$(CONFIG_DRM_DW_MIPI_DSI) += dw-mipi-dsi.o
H A Ddw-hdmi-ahb-audio.c21 #include "dw-hdmi-audio.h"
23 #define DRIVER_NAME "dw-hdmi-ahb-audio"
153 static void dw_hdmi_reformat_iec958(struct snd_dw_hdmi *dw, argument
156 u32 *src = dw->buf_src + offset;
157 u32 *dst = dw->buf_dst + offset;
158 u32 *end = dw->buf_src + offset + bytes;
181 static void dw_hdmi_reformat_s24(struct snd_dw_hdmi *dw, argument
184 u32 *src = dw->buf_src + offset;
185 u32 *dst = dw->buf_dst + offset;
186 u32 *end = dw
209 dw_hdmi_create_cs(struct snd_dw_hdmi *dw, struct snd_pcm_runtime *runtime) argument
233 dw_hdmi_start_dma(struct snd_dw_hdmi *dw) argument
262 dw_hdmi_stop_dma(struct snd_dw_hdmi *dw) argument
271 struct snd_dw_hdmi *dw = data; local
321 struct snd_dw_hdmi *dw = substream->private_data; local
378 struct snd_dw_hdmi *dw = substream->private_data; local
405 struct snd_dw_hdmi *dw = substream->private_data; local
466 struct snd_dw_hdmi *dw = substream->private_data; local
500 struct snd_dw_hdmi *dw = substream->private_data; local
525 struct snd_dw_hdmi *dw; local
589 struct snd_dw_hdmi *dw = platform_get_drvdata(pdev); local
601 struct snd_dw_hdmi *dw = dev_get_drvdata(dev); local
610 struct snd_dw_hdmi *dw = dev_get_drvdata(dev); local
[all...]
H A Ddw-hdmi-gp-audio.c3 * dw-hdmi-gp-audio.c
26 #include "dw-hdmi-audio.h"
28 #define DRIVER_NAME "dw-hdmi-gp-audio"
79 struct snd_dw_hdmi *dw = dev_get_drvdata(dev); local
82 dw_hdmi_set_sample_rate(dw->data.hdmi, params->sample_rate);
86 dw_hdmi_set_channel_count(dw->data.hdmi, params->channels);
87 dw_hdmi_set_channel_allocation(dw->data.hdmi, ca);
89 dw_hdmi_set_sample_non_pcm(dw->data.hdmi,
91 dw_hdmi_set_sample_width(dw->data.hdmi, params->sample_width);
103 struct snd_dw_hdmi *dw local
133 struct snd_dw_hdmi *dw = dev_get_drvdata(dev); local
149 struct snd_dw_hdmi *dw; local
177 struct snd_dw_hdmi *dw = platform_get_drvdata(pdev); local
[all...]
/linux-master/drivers/dma/dw-axi-dmac/
H A DMakefile2 obj-$(CONFIG_DW_AXI_DMAC) += dw-axi-dmac-platform.o
/linux-master/drivers/gpu/drm/xe/
H A Dxe_ring_ops.c53 u32 *dw, int i)
55 dw[i++] = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) | MI_LRI_MMIO_REMAP_EN;
56 dw[i++] = reg.addr + gt->mmio.adj_offset;
57 dw[i++] = AUX_INV;
58 dw[i++] = MI_NOOP;
63 static int emit_user_interrupt(u32 *dw, int i) argument
65 dw[i++] = MI_USER_INTERRUPT;
66 dw[i++] = MI_ARB_ON_OFF | MI_ARB_ENABLE;
67 dw[i++] = MI_ARB_CHECK;
72 static int emit_store_imm_ggtt(u32 addr, u32 value, u32 *dw, in argument
52 emit_aux_table_inv(struct xe_gt *gt, struct xe_reg reg, u32 *dw, int i) argument
82 emit_flush_imm_ggtt(u32 addr, u32 value, bool invalidate_tlb, u32 *dw, int i) argument
94 emit_bb_start(u64 batch_addr, u32 ppgtt_flag, u32 *dw, int i) argument
103 emit_flush_invalidate(u32 flag, u32 *dw, int i) argument
118 emit_pipe_control(u32 *dw, int i, u32 bit_group_0, u32 bit_group_1, u32 offset, u32 value) argument
130 emit_pipe_invalidate(u32 mask_flags, bool invalidate_tlb, u32 *dw, int i) argument
151 emit_store_imm_ppgtt_posted(u64 addr, u64 value, u32 *dw, int i) argument
163 emit_render_cache_flush(struct xe_sched_job *job, u32 *dw, int i) argument
187 emit_pipe_control_to_ring_end(struct xe_hw_engine *hwe, u32 *dw, int i) argument
199 emit_pipe_imm_ggtt(u32 addr, u32 value, bool stall_only, u32 *dw, int i) argument
220 u32 dw[MAX_JOB_SIZE_DW], i = 0; local
267 u32 dw[MAX_JOB_SIZE_DW], i = 0; local
313 u32 dw[MAX_JOB_SIZE_DW], i = 0; local
361 u32 dw[MAX_JOB_SIZE_DW], i = 0; local
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/linux-master/drivers/dma/dw/
H A Dinternal.h11 #include <linux/dma/dw.h>
18 void do_dw_dma_on(struct dw_dma *dw);
19 void do_dw_dma_off(struct dw_dma *dw);
27 void dw_dma_acpi_controller_register(struct dw_dma *dw);
28 void dw_dma_acpi_controller_free(struct dw_dma *dw);
30 static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {} argument
31 static inline void dw_dma_acpi_controller_free(struct dw_dma *dw) {} argument
38 void dw_dma_of_controller_register(struct dw_dma *dw);
39 void dw_dma_of_controller_free(struct dw_dma *dw);
45 static inline void dw_dma_of_controller_register(struct dw_dma *dw) {} argument
46 dw_dma_of_controller_free(struct dw_dma *dw) argument
[all...]
H A Ddw.c16 struct dw_dma *dw = to_dw_dma(dwc->chan.device); local
23 cfghi |= DWC_CFGH_PROTCTL(dw->pdata->protctl);
91 static void dw_dma_set_device_name(struct dw_dma *dw, int id) argument
93 snprintf(dw->name, sizeof(dw->name), "dw:dmac%d", id);
96 static void dw_dma_disable(struct dw_dma *dw) argument
98 do_dw_dma_off(dw);
101 static void dw_dma_enable(struct dw_dma *dw) argument
103 do_dw_dma_on(dw);
108 struct dw_dma *dw; local
[all...]
H A Dcore.c79 struct dw_dma *dw = to_dw_dma(dwc->chan.device); local
83 desc = dma_pool_zalloc(dw->desc_pool, GFP_ATOMIC, &phys);
98 struct dw_dma *dw = to_dw_dma(dwc->chan.device); local
106 dma_pool_free(dw->desc_pool, child, child->txd.phys);
110 dma_pool_free(dw->desc_pool, desc, desc->txd.phys);
116 struct dw_dma *dw = to_dw_dma(dwc->chan.device); local
118 dw->initialize_chan(dwc);
121 channel_set_bit(dw, MASK.XFER, dwc->mask);
122 channel_set_bit(dw, MASK.ERROR, dwc->mask);
138 static inline void dwc_chan_disable(struct dw_dma *dw, struc argument
151 struct dw_dma *dw = to_dw_dma(dwc->chan.device); local
173 struct dw_dma *dw = to_dw_dma(dwc->chan.device); local
259 dwc_complete_all(struct dw_dma *dw, struct dw_dma_chan *dwc) argument
290 struct dw_dma *dw = to_dw_dma(dwc->chan.device); local
297 dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc) argument
420 dwc_handle_error(struct dw_dma *dw, struct dw_dma_chan *dwc) argument
465 struct dw_dma *dw = from_tasklet(dw, t, tasklet); local
493 struct dw_dma *dw = dev_id; local
541 struct dw_dma *dw = to_dw_dma(chan->device); local
619 struct dw_dma *dw = to_dw_dma(chan->device); local
786 struct dw_dma *dw = to_dw_dma(chan->device); local
803 struct dw_dma *dw = to_dw_dma(dwc->chan.device); local
828 struct dw_dma *dw = to_dw_dma(dwc->chan.device); local
853 struct dw_dma *dw = to_dw_dma(chan->device); local
955 do_dw_dma_off(struct dw_dma *dw) argument
969 do_dw_dma_on(struct dw_dma *dw) argument
977 struct dw_dma *dw = to_dw_dma(chan->device); local
1014 struct dw_dma *dw = to_dw_dma(chan->device); local
1066 struct dw_dma *dw = chip->dw; local
1277 struct dw_dma *dw = chip->dw; local
1300 struct dw_dma *dw = chip->dw; local
1309 struct dw_dma *dw = chip->dw; local
[all...]
H A Didma32.c48 struct dw_dma *dw = to_dw_dma(dwc->chan.device); local
49 void __iomem *misc = __dw_regs(dw);
217 static void idma32_set_device_name(struct dw_dma *dw, int id) argument
219 snprintf(dw->name, sizeof(dw->name), "idma32:dmac%d", id);
228 static void idma32_fifo_partition(struct dw_dma *dw) argument
241 idma32_writeq(dw, FIFO_PARTITION1, fifo_partition);
242 idma32_writeq(dw, FIFO_PARTITION0, fifo_partition);
245 static void idma32_disable(struct dw_dma *dw) argument
247 do_dw_dma_off(dw);
251 idma32_enable(struct dw_dma *dw) argument
259 struct dw_dma *dw; local
[all...]
H A Dacpi.c23 void dw_dma_acpi_controller_register(struct dw_dma *dw) argument
25 struct device *dev = dw->dma.dev;
46 void dw_dma_acpi_controller_free(struct dw_dma *dw) argument
48 struct device *dev = dw->dma.dev;
/linux-master/drivers/misc/
H A Ddw-xdata-pcie.c20 #define DW_XDATA_DRIVER_NAME "dw-xdata-pcie"
73 static inline struct dw_xdata_regs __iomem *__dw_regs(struct dw_xdata *dw) argument
75 return dw->rg_region.vaddr;
78 static void dw_xdata_stop(struct dw_xdata *dw) argument
82 mutex_lock(&dw->mutex);
84 burst = readl(&(__dw_regs(dw)->burst_cnt));
88 writel(burst, &(__dw_regs(dw)->burst_cnt));
91 mutex_unlock(&dw->mutex);
94 static void dw_xdata_start(struct dw_xdata *dw, bool write) argument
96 struct device *dev = &dw
138 dw_xdata_perf_meas(struct dw_xdata *dw, u64 *data, bool write) argument
162 dw_xdata_perf(struct dw_xdata *dw, u64 *rate, bool write) argument
210 struct dw_xdata *dw = misc_dev_to_dw(misc_dev); local
222 struct dw_xdata *dw = misc_dev_to_dw(misc_dev); local
247 struct dw_xdata *dw = misc_dev_to_dw(misc_dev); local
259 struct dw_xdata *dw = misc_dev_to_dw(misc_dev); local
292 struct dw_xdata *dw; local
387 struct dw_xdata *dw = pci_get_drvdata(pdev); local
[all...]
/linux-master/drivers/net/wireless/mediatek/mt76/mt7925/
H A Dmac.h15 static inline u32 mt7925_mac_wtbl_lmac_addr(struct mt792x_dev *dev, u16 wcid, u8 dw) argument
20 return MT_WTBL_LMAC_OFFS(wcid, dw);
/linux-master/drivers/pci/controller/dwc/
H A Dpcie-rcar-gen4.c52 struct dw_pcie dw; member in struct:rcar_gen4_pcie
57 #define to_rcar_gen4_pcie(_dw) container_of(_dw, struct rcar_gen4_pcie, dw)
81 static int rcar_gen4_pcie_link_up(struct dw_pcie *dw) argument
83 struct rcar_gen4_pcie *rcar = to_rcar_gen4_pcie(dw);
96 static int rcar_gen4_pcie_speed_change(struct dw_pcie *dw) argument
101 val = dw_pcie_readl_dbi(dw, PCIE_LINK_WIDTH_SPEED_CONTROL);
103 dw_pcie_writel_dbi(dw, PCIE_LINK_WIDTH_SPEED_CONTROL, val);
105 val = dw_pcie_readl_dbi(dw, PCIE_LINK_WIDTH_SPEED_CONTROL);
107 dw_pcie_writel_dbi(dw, PCIE_LINK_WIDTH_SPEED_CONTROL, val);
110 val = dw_pcie_readl_dbi(dw, PCIE_LINK_WIDTH_SPEED_CONTRO
123 rcar_gen4_pcie_start_link(struct dw_pcie *dw) argument
152 rcar_gen4_pcie_stop_link(struct dw_pcie *dw) argument
161 struct dw_pcie *dw = &rcar->dw; local
203 struct dw_pcie *dw = &rcar->dw; local
268 struct dw_pcie *dw = to_dw_pcie_from_pp(pp); local
302 struct dw_pcie *dw = to_dw_pcie_from_pp(pp); local
335 struct dw_pcie *dw = to_dw_pcie_from_ep(ep); local
357 struct dw_pcie *dw = to_dw_pcie_from_ep(ep); local
367 struct dw_pcie *dw = to_dw_pcie_from_ep(ep); local
[all...]
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ih.c144 * @num_dw: size of the iv in dw
258 uint32_t dw[8]; local
260 dw[0] = le32_to_cpu(ih->ring[ring_index + 0]);
261 dw[1] = le32_to_cpu(ih->ring[ring_index + 1]);
262 dw[2] = le32_to_cpu(ih->ring[ring_index + 2]);
263 dw[3] = le32_to_cpu(ih->ring[ring_index + 3]);
264 dw[4] = le32_to_cpu(ih->ring[ring_index + 4]);
265 dw[5] = le32_to_cpu(ih->ring[ring_index + 5]);
266 dw[6] = le32_to_cpu(ih->ring[ring_index + 6]);
267 dw[
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