dma/dw-edma/dw-edma-core.c

19 #include "dw-edma-core.h"
20 #include "dw-edma-v0-core.h"
21 #include "dw-hdma-v0-core.h"
46 	struct dw_edma_chip *chip = chan->dw->chip;
78 	struct dw_edma_chip *chip = desc->chan->dw->chip;
187 	struct dw_edma *dw = chan->dw;
205 	dw_edma_core_start(dw, child, !desc->xfer_sz);
220 	if (chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) {
404 	if (chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) {
710 static int dw_edma_channel_setup(struct dw_edma *dw, u32 wr_alloc, u32 rd_alloc)
712 	struct dw_edma_chip *chip = dw->chip;
720 	ch_cnt = dw->wr_ch_cnt + dw->rd_ch_cnt;
721 	dma = &dw->dma;
726 		chan = &dw->chan[i];
728 		chan->dw = dw;
730 		if (i < dw->wr_ch_cnt) {
734 			chan->id = i - dw->wr_ch_cnt;
752 		if (dw->nr_irqs == 1)
759 		irq = &dw->irq[pos];
766 		irq->dw = dw;
776 					&dw->chip->dt_region_wr[chan->id] :
777 					&dw->chip->dt_region_rd[chan->id];
830 static int dw_edma_irq_request(struct dw_edma *dw,
833 	struct dw_edma_chip *chip = dw->chip;
834 	struct device *dev = dw->chip->dev;
841 	ch_cnt = dw->wr_ch_cnt + dw->rd_ch_cnt;
846 	dw->irq = devm_kcalloc(dev, chip->nr_irqs, sizeof(*dw->irq), GFP_KERNEL);
847 	if (!dw->irq)
854 				  IRQF_SHARED, dw->name, &dw->irq[0]);
856 			dw->nr_irqs = 0;
861 			get_cached_msi_msg(irq, &dw->irq[0].msi);
863 		dw->nr_irqs = 1;
869 			dw_edma_dec_irq_alloc(&tmp, wr_alloc, dw->wr_ch_cnt);
870 			dw_edma_dec_irq_alloc(&tmp, rd_alloc, dw->rd_ch_cnt);
873 		dw_edma_add_irq_mask(&wr_mask, *wr_alloc, dw->wr_ch_cnt);
874 		dw_edma_add_irq_mask(&rd_mask, *rd_alloc, dw->rd_ch_cnt);
882 					  IRQF_SHARED, dw->name,
883 					  &dw->irq[i]);
888 				get_cached_msi_msg(irq, &dw->irq[i].msi);
891 		dw->nr_irqs = i;
899 		free_irq(irq, &dw->irq[i]);
908 	struct dw_edma *dw;
920 	dw = devm_kzalloc(dev, sizeof(*dw), GFP_KERNEL);
921 	if (!dw)
924 	dw->chip = chip;
926 	if (dw->chip->mf == EDMA_MF_HDMA_NATIVE)
927 		dw_hdma_v0_core_register(dw);
929 		dw_edma_v0_core_register(dw);
931 	raw_spin_lock_init(&dw->lock);
933 	dw->wr_ch_cnt = min_t(u16, chip->ll_wr_cnt,
934 			      dw_edma_core_ch_count(dw, EDMA_DIR_WRITE));
935 	dw->wr_ch_cnt = min_t(u16, dw->wr_ch_cnt, EDMA_MAX_WR_CH);
937 	dw->rd_ch_cnt = min_t(u16, chip->ll_rd_cnt,
938 			      dw_edma_core_ch_count(dw, EDMA_DIR_READ));
939 	dw->rd_ch_cnt = min_t(u16, dw->rd_ch_cnt, EDMA_MAX_RD_CH);
941 	if (!dw->wr_ch_cnt && !dw->rd_ch_cnt)
945 		 dw->wr_ch_cnt, dw->rd_ch_cnt);
948 	dw->chan = devm_kcalloc(dev, dw->wr_ch_cnt + dw->rd_ch_cnt,
949 				sizeof(*dw->chan), GFP_KERNEL);
950 	if (!dw->chan)
953 	snprintf(dw->name, sizeof(dw->name), "dw-edma-core:%s",
957 	dw_edma_core_off(dw);
960 	err = dw_edma_irq_request(dw, &wr_alloc, &rd_alloc);
965 	err = dw_edma_channel_setup(dw, wr_alloc, rd_alloc);
970 	dw_edma_core_debugfs_on(dw);
972 	chip->dw = dw;
977 	for (i = (dw->nr_irqs - 1); i >= 0; i--)
978 		free_irq(chip->ops->irq_vector(dev, i), &dw->irq[i]);
988 	struct dw_edma *dw = chip->dw;
992 	if (!dw)
996 	dw_edma_core_off(dw);
999 	for (i = (dw->nr_irqs - 1); i >= 0; i--)
1000 		free_irq(chip->ops->irq_vector(dev, i), &dw->irq[i]);
1003 	dma_async_device_unregister(&dw->dma);
1004 	list_for_each_entry_safe(chan, _chan, &dw->dma.channels,