/linux-master/arch/mips/include/asm/ |
H A D | debug.h | 9 #include <linux/dcache.h>
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H A D | r4kcache.h | 244 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, ) 247 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, ) 251 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, ) 254 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, ) 258 __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, ) 259 __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, ) 277 __BUILD_BLAST_USER_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 280 __BUILD_BLAST_USER_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 283 __BUILD_BLAST_USER_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 304 __BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_ [all...] |
/linux-master/arch/sh/kernel/cpu/sh2/ |
H A D | probe.c | 34 boot_cpu_data.dcache.ways = 4; 35 boot_cpu_data.dcache.way_incr = (1<<12); 36 boot_cpu_data.dcache.sets = 256; 37 boot_cpu_data.dcache.entry_shift = 4; 38 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; 39 boot_cpu_data.dcache.flags = 0; 56 boot_cpu_data.dcache.ways = 1; 57 boot_cpu_data.dcache.sets = 256; 58 boot_cpu_data.dcache.entry_shift = 5; 59 boot_cpu_data.dcache [all...] |
/linux-master/arch/sh/kernel/cpu/sh3/ |
H A D | probe.c | 50 boot_cpu_data.dcache.ways = 4; 51 boot_cpu_data.dcache.entry_shift = 4; 52 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; 53 boot_cpu_data.dcache.flags = 0; 60 boot_cpu_data.dcache.way_incr = (1 << 11); 61 boot_cpu_data.dcache.entry_mask = 0x7f0; 62 boot_cpu_data.dcache.sets = 128; 67 boot_cpu_data.dcache.way_incr = (1 << 12); 68 boot_cpu_data.dcache.entry_mask = 0xff0; 69 boot_cpu_data.dcache [all...] |
/linux-master/arch/mips/mm/ |
H A D | c-octeon.c | 33 * Octeon automatically flushes the dcache on tlb changes, so 117 * dcache aliases don't need to do anything here 189 c->dcache.linesz = 128; 191 c->dcache.sets = 2; /* CN5XXX has two Dcache sets */ 193 c->dcache.sets = 1; /* CN3XXX has one Dcache set */ 194 c->dcache.ways = 64; 196 c->dcache.sets * c->dcache.ways * c->dcache.linesz; 197 c->dcache [all...] |
H A D | c-r4k.c | 479 * If dcache can alias, we must blast it since mapping is changing. 1014 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); 1015 c->dcache.ways = 2; 1016 c->dcache.waybit= __ffs(dcache_size/2); 1028 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); 1029 c->dcache.ways = 2; 1030 c->dcache.waybit = 0; 1042 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); 1043 c->dcache.ways = 4; 1044 c->dcache [all...] |
/linux-master/arch/sh/kernel/cpu/sh2a/ |
H A D | probe.c | 43 boot_cpu_data.dcache.ways = 4; 44 boot_cpu_data.dcache.way_incr = (1 << 11); 45 boot_cpu_data.dcache.sets = 128; 46 boot_cpu_data.dcache.entry_shift = 4; 47 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; 48 boot_cpu_data.dcache.flags = 0; 51 * The icache is the same as the dcache as far as this setup is 53 * lacks the U bit that the dcache has, none of this has any bearing 56 boot_cpu_data.icache = boot_cpu_data.dcache;
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/linux-master/drivers/crypto/caam/ |
H A D | dpseci-debugfs.h | 7 #include <linux/dcache.h>
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/linux-master/arch/sh/mm/ |
H A D | cache-shx3.c | 27 if (boot_cpu_data.dcache.n_aliases || boot_cpu_data.icache.n_aliases) { 31 boot_cpu_data.dcache.n_aliases = 0;
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H A D | cache-sh7705.c | 35 ways = current_cpu_data.dcache.ways; 36 waysize = current_cpu_data.dcache.sets; 37 waysize <<= current_cpu_data.dcache.entry_shift; 46 addr += current_cpu_data.dcache.linesz) { 57 addrstart += current_cpu_data.dcache.way_incr; 103 ways = current_cpu_data.dcache.ways; 104 waysize = current_cpu_data.dcache.sets; 105 waysize <<= current_cpu_data.dcache.entry_shift; 114 addr += current_cpu_data.dcache.linesz) { 124 addrstart += current_cpu_data.dcache [all...] |
H A D | cache.c | 66 if (boot_cpu_data.dcache.n_aliases && folio_mapped(folio) && 73 if (boot_cpu_data.dcache.n_aliases) 87 if (boot_cpu_data.dcache.n_aliases && page_mapcount(page) && 94 if (boot_cpu_data.dcache.n_aliases) 107 if (boot_cpu_data.dcache.n_aliases && folio_mapped(src) && 146 if (!boot_cpu_data.dcache.n_aliases) 164 if (boot_cpu_data.dcache.n_aliases && folio_mapped(folio) && 186 if (boot_cpu_data.dcache.n_aliases == 0) 194 if (boot_cpu_data.dcache.n_aliases == 0) 276 boot_cpu_data.dcache [all...] |
H A D | cache-sh3.c | 44 for (j = 0; j < current_cpu_data.dcache.ways; j++) { 48 addr = addrstart | (v & current_cpu_data.dcache.entry_mask); 60 addrstart += current_cpu_data.dcache.way_incr; 85 (v & current_cpu_data.dcache.entry_mask) | SH_CACHE_ASSOC;
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H A D | cache-sh4.c | 25 * The maximum number of pages we support up to when doing ranged dcache 26 * flushing. Anything exceeding this will simply flush the dcache in its 164 (current_cpu_data.dcache.sets << 165 current_cpu_data.dcache.entry_shift) * 166 current_cpu_data.dcache.ways; 168 entry_offset = 1 << current_cpu_data.dcache.entry_shift; 248 map_coherent = (current_cpu_data.dcache.n_aliases && 299 if (boot_cpu_data.dcache.n_aliases == 0) 327 struct cache_info *dcache; local 332 dcache [all...] |
H A D | cache-sh2a.c | 18 * The maximum number of pages we support up to when doing ranged dcache 19 * flushing. Anything exceeding this will simply flush the dcache in its 60 nr_ways = current_cpu_data.dcache.ways; 68 end = begin + (nr_ways * current_cpu_data.dcache.way_size); 107 int nr_ways = current_cpu_data.dcache.ways;
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/linux-master/fs/proc/ |
H A D | util.c | 1 #include <linux/dcache.h>
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/linux-master/drivers/net/ethernet/freescale/dpaa2/ |
H A D | dpaa2-eth-debugfs.h | 8 #include <linux/dcache.h>
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/linux-master/arch/sh/kernel/cpu/ |
H A D | init.c | 128 waysize = current_cpu_data.dcache.sets; 139 waysize <<= current_cpu_data.dcache.entry_shift; 147 ways = current_cpu_data.dcache.ways; 155 addr += current_cpu_data.dcache.linesz) 158 addrstart += current_cpu_data.dcache.way_incr; 170 if (current_cpu_data.dcache.ways > 1) 204 l1d_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.dcache); 206 if (current_cpu_data.dcache.flags & SH_CACHE_COMBINED) 313 current_cpu_data.dcache.entry_mask = current_cpu_data.dcache [all...] |
/linux-master/arch/sh/kernel/cpu/sh4/ |
H A D | probe.c | 42 * And again for the dcache .. 44 boot_cpu_data.dcache.way_incr = (1 << 14); 45 boot_cpu_data.dcache.entry_shift = 5; 46 boot_cpu_data.dcache.sets = 512; 47 boot_cpu_data.dcache.ways = 1; 48 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; 68 boot_cpu_data.dcache.ways = 4; 172 boot_cpu_data.dcache.ways = 2; 177 boot_cpu_data.dcache.ways = 2; 193 boot_cpu_data.dcache [all...] |
/linux-master/fs/orangefs/ |
H A D | Makefile | 9 dcache.o inode.o orangefs-sysfs.o orangefs-mod.o super.o \
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/linux-master/lib/ |
H A D | debug_info.c | 10 #include <linux/dcache.h>
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/linux-master/arch/mips/kernel/ |
H A D | cacheinfo.c | 30 if (c->dcache.waysize) 87 populate_cache(dcache, this_leaf, level, CACHE_TYPE_DATA); 92 populate_cache(dcache, this_leaf, level, CACHE_TYPE_UNIFIED);
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/linux-master/fs/ecryptfs/ |
H A D | dentry.c | 11 #include <linux/dcache.h> 25 * dcache. Most filesystems leave this as NULL, because all their 26 * dentries in the dcache are valid.
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/linux-master/drivers/gpu/drm/msm/disp/dpu1/ |
H A D | dpu_core_perf.h | 9 #include <linux/dcache.h>
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/linux-master/drivers/gpu/drm/imagination/ |
H A D | pvr_debugfs.c | 10 #include <linux/dcache.h>
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/linux-master/fs/ocfs2/ |
H A D | Makefile | 16 dcache.o \
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