1/* SPDX-License-Identifier: GPL-2.0-only */
2/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
3 */
4
5#ifndef _DPU_CORE_PERF_H_
6#define _DPU_CORE_PERF_H_
7
8#include <linux/types.h>
9#include <linux/dcache.h>
10#include <linux/mutex.h>
11#include <drm/drm_crtc.h>
12
13#include "dpu_hw_catalog.h"
14
15/**
16 * struct dpu_core_perf_params - definition of performance parameters
17 * @max_per_pipe_ib: maximum instantaneous bandwidth request
18 * @bw_ctl: arbitrated bandwidth request
19 * @core_clk_rate: core clock rate request
20 */
21struct dpu_core_perf_params {
22	u64 max_per_pipe_ib;
23	u64 bw_ctl;
24	u64 core_clk_rate;
25};
26
27/**
28 * struct dpu_core_perf_tune - definition of performance tuning control
29 * @mode: performance mode
30 */
31struct dpu_core_perf_tune {
32	u32 mode;
33};
34
35/**
36 * struct dpu_core_perf - definition of core performance context
37 * @perf_cfg: Platform-specific performance configuration
38 * @core_clk_rate: current core clock rate
39 * @max_core_clk_rate: maximum allowable core clock rate
40 * @perf_tune: debug control for performance tuning
41 * @enable_bw_release: debug control for bandwidth release
42 * @fix_core_clk_rate: fixed core clock request in Hz used in mode 2
43 * @fix_core_ib_vote: fixed core ib vote in bps used in mode 2
44 * @fix_core_ab_vote: fixed core ab vote in bps used in mode 2
45 */
46struct dpu_core_perf {
47	const struct dpu_perf_cfg *perf_cfg;
48	u64 core_clk_rate;
49	u64 max_core_clk_rate;
50	struct dpu_core_perf_tune perf_tune;
51	u32 enable_bw_release;
52	u64 fix_core_clk_rate;
53	u64 fix_core_ib_vote;
54	u64 fix_core_ab_vote;
55};
56
57/**
58 * dpu_core_perf_crtc_check - validate performance of the given crtc state
59 * @crtc: Pointer to crtc
60 * @state: Pointer to new crtc state
61 * return: zero if success, or error code otherwise
62 */
63int dpu_core_perf_crtc_check(struct drm_crtc *crtc,
64		struct drm_crtc_state *state);
65
66/**
67 * dpu_core_perf_crtc_update - update performance of the given crtc
68 * @crtc: Pointer to crtc
69 * @params_changed: true if crtc parameters are modified
70 * return: zero if success, or error code otherwise
71 */
72int dpu_core_perf_crtc_update(struct drm_crtc *crtc,
73			      int params_changed);
74
75/**
76 * dpu_core_perf_crtc_release_bw - release bandwidth of the given crtc
77 * @crtc: Pointer to crtc
78 */
79void dpu_core_perf_crtc_release_bw(struct drm_crtc *crtc);
80
81/**
82 * dpu_core_perf_init - initialize the given core performance context
83 * @perf: Pointer to core performance context
84 * @perf_cfg: Pointer to platform performance configuration
85 * @max_core_clk_rate: Maximum core clock rate
86 */
87int dpu_core_perf_init(struct dpu_core_perf *perf,
88		const struct dpu_perf_cfg *perf_cfg,
89		unsigned long max_core_clk_rate);
90
91struct dpu_kms;
92
93/**
94 * dpu_core_perf_debugfs_init - initialize debugfs for core performance context
95 * @dpu_kms: Pointer to the dpu_kms struct
96 * @debugfs_parent: Pointer to parent debugfs
97 */
98int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent);
99
100#endif /* _DPU_CORE_PERF_H_ */
101