Searched refs:clock_table (Results 1 - 25 of 25) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_clk_mgr.c455 const DpmClocks_316_t *clock_table,
464 if (clock_table->SocVoltage[i] == voltage) {
466 } else if (clock_table->SocVoltage[i] >= max_voltage &&
467 clock_table->SocVoltage[i] < voltage) {
468 max_voltage = clock_table->SocVoltage[i];
480 const DpmClocks_316_t *clock_table)
493 if (clock_table->DfPstateTable[i].FClk != 0) {
508 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS &&
509 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) {
510 max_dispclk = find_max_clk_value(clock_table
454 find_clk_for_voltage( const DpmClocks_316_t *clock_table, const uint32_t clocks[], unsigned int voltage) argument
477 dcn316_clk_mgr_helper_populate_bw_params( struct clk_mgr_internal *clk_mgr, struct integrated_info *bios_info, const DpmClocks_316_t *clock_table) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c619 const DpmClocks314_t *clock_table)
627 for (i = 0; i < clock_table->NumDfPstatesEnabled; i++) {
628 if (is_valid_clock_value(clock_table->DfPstateTable[i].FClk) &&
629 clock_table->DfPstateTable[i].FClk > max_fclk) {
630 max_fclk = clock_table->DfPstateTable[i].FClk;
639 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS &&
640 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) {
641 max_dispclk = find_max_clk_value(clock_table->DispClocks, clock_table->NumDispClkLevelsEnabled);
642 max_dppclk = find_max_clk_value(clock_table
617 dcn314_clk_mgr_helper_populate_bw_params(struct clk_mgr_internal *clk_mgr, struct integrated_info *bios_info, const DpmClocks314_t *clock_table) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c708 DpmClocks_t_dcn35 *clock_table)
718 num_memps = (clock_table->NumMemPstatesEnabled > NUM_MEM_PSTATE_LEVELS) ? NUM_MEM_PSTATE_LEVELS :
719 clock_table->NumMemPstatesEnabled;
721 uint32_t dram_speed_mts = calc_dram_speed_mts(&clock_table->MemPstateTable[i]);
733 uint32_t dram_speed_mts = calc_dram_speed_mts(&clock_table->MemPstateTable[i]);
742 ASSERT(clock_table->NumMemPstatesEnabled &&
747 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS &&
748 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) {
749 max_dispclk = find_max_clk_value(clock_table->DispClocks,
750 clock_table
706 dcn35_clk_mgr_helper_populate_bw_params(struct clk_mgr_internal *clk_mgr, struct integrated_info *bios_info, DpmClocks_t_dcn35 *clock_table) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_clk_mgr.c474 const DpmClocks_315_t *clock_table)
478 uint32_t max_pstate = clock_table->NumDfPstatesEnabled - 1;
482 for (i = 0; i < clock_table->NumDcfClkLevelsEnabled; i++) {
486 for (j = clock_table->NumDfPstatesEnabled - 2; j >= 0; j--) {
487 if (clock_table->DfPstateTable[j].Voltage <= clock_table->SocVoltage[i])
491 if (i == clock_table->NumDcfClkLevelsEnabled - 1)
496 if (bw_params->clk_table.entries[j].dcfclk_mhz <= clock_table->DcfClocks[i])
503 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[max_pstate].FClk;
504 bw_params->clk_table.entries[i].memclk_mhz = clock_table
471 dcn315_clk_mgr_helper_populate_bw_params( struct clk_mgr_internal *clk_mgr, struct integrated_info *bios_info, const DpmClocks_315_t *clock_table) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c533 const DpmClocks_t *clock_table,
542 if (clock_table->SocVoltage[i] == voltage) {
544 } else if (clock_table->SocVoltage[i] >= max_voltage &&
545 clock_table->SocVoltage[i] < voltage) {
546 max_voltage = clock_table->SocVoltage[i];
557 const DpmClocks_t *clock_table)
570 if (clock_table->DfPstateTable[i].FClk != 0) {
585 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS &&
586 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) {
587 max_dispclk = find_max_clk_value(clock_table
532 find_clk_for_voltage( const DpmClocks_t *clock_table, const uint32_t clocks[], unsigned int voltage) argument
555 dcn31_clk_mgr_helper_populate_bw_params(struct clk_mgr_internal *clk_mgr, struct integrated_info *bios_info, const DpmClocks_t *clock_table) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr.c613 static unsigned int find_socclk_for_voltage(struct dpm_clocks *clock_table, unsigned int voltage) argument
618 if (clock_table->SocClocks[i].Vol == voltage)
619 return clock_table->SocClocks[i].Freq;
626 static unsigned int find_dcfclk_for_voltage(struct dpm_clocks *clock_table, unsigned int voltage) argument
631 if (clock_table->DcfClocks[i].Vol == voltage)
632 return clock_table->DcfClocks[i].Freq;
639 static void rn_clk_mgr_helper_populate_bw_params(struct clk_bw_params *bw_params, struct dpm_clocks *clock_table, struct integrated_info *bios_info) argument
650 if (clock_table->FClocks[i].Freq != 0 && clock_table->FClocks[i].Vol != 0) {
665 bw_params->clk_table.entries[i].fclk_mhz = clock_table
705 struct dpm_clocks clock_table = { 0 }; local
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
H A Dvg_clk_mgr.c543 static unsigned int find_dcfclk_for_voltage(const struct vg_dpm_clocks *clock_table, argument
551 if (clock_table->SocVoltage[i] == voltage)
552 return clock_table->DcfClocks[i];
562 const struct vg_dpm_clocks *clock_table)
574 if (clock_table->DfPstateTable[i].fclk != 0) {
589 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].fclk;
590 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].memclk;
591 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].voltage;
592 bw_params->clk_table.entries[i].dcfclk_mhz = find_dcfclk_for_voltage(clock_table, clock_table
559 vg_clk_mgr_helper_populate_bw_params( struct clk_mgr_internal *clk_mgr, struct integrated_info *bios_info, const struct vg_dpm_clocks *clock_table) argument
[all...]
/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu8_hwmgr.c437 struct SMU8_Fusion_ClkTable *clock_table; local
462 clock_table = (struct SMU8_Fusion_ClkTable *)table;
479 clock_table->SclkBreakdownTable.ClkLevel[i].GnbVid =
481 clock_table->SclkBreakdownTable.ClkLevel[i].Frequency =
485 clock_table->SclkBreakdownTable.ClkLevel[i].Frequency,
488 clock_table->SclkBreakdownTable.ClkLevel[i].DfsDid =
492 clock_table->SclkBreakdownTable.ClkLevel[i].GfxVid =
496 clock_table->AclkBreakdownTable.ClkLevel[i].GfxVid =
498 clock_table->AclkBreakdownTable.ClkLevel[i].Frequency =
502 clock_table
[all...]
H A Dsmu10_hwmgr.c499 DpmClocks_t *table = &(smu10_data->clock_table);
511 &smu10_data->clock_table.DcefClocks[0]);
514 &smu10_data->clock_table.SocClocks[0]);
517 &smu10_data->clock_table.FClocks[0]);
520 &smu10_data->clock_table.MemClocks[0]);
643 if (min_mclk < data->clock_table.FClocks[0].Freq)
644 min_mclk = data->clock_table.FClocks[0].Freq;
H A Dprocesspptables.c410 struct phm_clock_array *clock_table; local
412 clock_table = kzalloc(struct_size(clock_table, values, table->count), GFP_KERNEL);
413 if (!clock_table)
416 clock_table->count = (unsigned long)table->count;
418 for (i = 0; i < clock_table->count; i++)
419 clock_table->values[i] = (unsigned long)table->entries[i].clk;
421 *ptable = clock_table;
H A Dsmu10_hwmgr.h297 DpmClocks_t clock_table; member in struct:smu10_hwmgr
/linux-master/drivers/gpu/drm/amd/display/dc/
H A Ddm_pp_smu.h285 struct dpm_clocks *clock_table);
305 struct dpm_clocks *clock_table);
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c756 static int renoir_get_dpm_clock_table(struct smu_context *smu, struct dpm_clocks *clock_table) argument
761 if (!clock_table || !table)
765 clock_table->DcfClocks[i].Freq = table->DcfClocks[i].Freq;
766 clock_table->DcfClocks[i].Vol = table->DcfClocks[i].Vol;
770 clock_table->SocClocks[i].Freq = table->SocClocks[i].Freq;
771 clock_table->SocClocks[i].Vol = table->SocClocks[i].Vol;
775 clock_table->FClocks[i].Freq = table->FClocks[i].Freq;
776 clock_table->FClocks[i].Vol = table->FClocks[i].Vol;
780 clock_table->MemClocks[i].Freq = table->MemClocks[i].Freq;
781 clock_table
[all...]
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_0_ppt.c1372 static int smu_14_0_1_get_dpm_table(struct smu_context *smu, struct dpm_clocks *clock_table) argument
1379 clock_table->SocClocks[idx].Freq = (idx < clk_table->NumSocClkLevelsEnabled) ? clk_table->SocClocks[idx]:0;
1380 clock_table->SocClocks[idx].Vol = 0;
1384 clock_table->VPEClocks[idx].Freq = (idx < clk_table->VpeClkLevelsEnabled) ? clk_table->VPEClocks[idx]:0;
1385 clock_table->VPEClocks[idx].Vol = 0;
1391 static int smu_14_0_0_get_dpm_table(struct smu_context *smu, struct dpm_clocks *clock_table) argument
1398 clock_table->SocClocks[idx].Freq = (idx < clk_table->NumSocClkLevelsEnabled) ? clk_table->SocClocks[idx]:0;
1399 clock_table->SocClocks[idx].Vol = 0;
1403 clock_table->VPEClocks[idx].Freq = (idx < clk_table->VpeClkLevelsEnabled) ? clk_table->VPEClocks[idx]:0;
1404 clock_table
1410 smu_v14_0_common_get_dpm_table(struct smu_context *smu, struct dpm_clocks *clock_table) argument
[all...]
/linux-master/drivers/tty/serial/8250/
H A D8250_fintek.c288 static u8 clock_table[] = { F81866_UART_CLK_1_8432MHZ, local
329 clock_table[i]);
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_vpe.c127 struct dpm_clocks clock_table = { 0 }; local
139 if (amdgpu_dpm_get_dpm_clock_table(adev, &clock_table)) {
144 SOCClks = clock_table.SocClocks;
145 VPEClks = clock_table.VPEClocks;
/linux-master/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c727 struct pp_smu *pp, struct dpm_clocks *clock_table)
733 ret = amdgpu_dpm_get_dpm_clock_table(adev, clock_table);
726 pp_rn_get_dpm_clock_table( struct pp_smu *pp, struct dpm_clocks *clock_table) argument
/linux-master/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dvangogh_ppt.c2170 static int vangogh_get_dpm_clock_table(struct smu_context *smu, struct dpm_clocks *clock_table) argument
2175 if (!clock_table || !table)
2179 clock_table->SocClocks[i].Freq = table->SocClocks[i];
2180 clock_table->SocClocks[i].Vol = table->SocVoltage[i];
2184 clock_table->FClocks[i].Freq = table->DfPstateTable[i].fclk;
2185 clock_table->FClocks[i].Vol = table->DfPstateTable[i].voltage;
2189 clock_table->MemClocks[i].Freq = table->DfPstateTable[i].memclk;
2190 clock_table->MemClocks[i].Vol = table->DfPstateTable[i].voltage;
/linux-master/drivers/usb/serial/
H A Df81232.c128 static u8 const clock_table[] = { F81232_CLK_1_846_MHZ, F81232_CLK_14_77_MHZ, variable
520 F81232_CLK_MASK, clock_table[idx]);
H A Df81534.c190 static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ, variable
586 port_priv->shadow_clk |= clock_table[idx];
/linux-master/drivers/gpu/drm/amd/pm/inc/
H A Damdgpu_dpm.h596 struct dpm_clocks *clock_table);
/linux-master/drivers/gpu/drm/amd/pm/
H A Damdgpu_dpm.c1880 struct dpm_clocks *clock_table)
1890 clock_table);
1879 amdgpu_dpm_get_dpm_clock_table(struct amdgpu_device *adev, struct dpm_clocks *clock_table) argument
/linux-master/drivers/gpu/drm/amd/include/
H A Dkgd_pp_interface.h444 struct dpm_clocks *clock_table);
/linux-master/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Damdgpu_smu.h896 int (*get_dpm_clock_table)(struct smu_context *smu, struct dpm_clocks *clock_table);
/linux-master/drivers/gpu/drm/amd/pm/swsmu/
H A Damdgpu_smu.c3383 struct dpm_clocks *clock_table)
3392 ret = smu->ppt_funcs->get_dpm_clock_table(smu, clock_table);
3382 smu_get_dpm_clock_table(void *handle, struct dpm_clocks *clock_table) argument

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