Searched refs:UVD_SUVD_CGC_GATE__SCM_HEVC_MASK (Results 1 - 20 of 20) sorted by last modified time

/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_5.c676 | UVD_SUVD_CGC_GATE__SCM_HEVC_MASK
H A Dvcn_v4_0_3.c578 | UVD_SUVD_CGC_GATE__SCM_HEVC_MASK
H A Dvcn_v3_0.c775 | UVD_SUVD_CGC_GATE__SCM_HEVC_MASK
H A Dvcn_v4_0.c741 | UVD_SUVD_CGC_GATE__SCM_HEVC_MASK
H A Dvcn_v2_5.c654 | UVD_SUVD_CGC_GATE__SCM_HEVC_MASK
H A Dvcn_v2_0.c565 | UVD_SUVD_CGC_GATE__SCM_HEVC_MASK
H A Dvcn_v1_0.c540 | UVD_SUVD_CGC_GATE__SCM_HEVC_MASK
H A Duvd_v6_0.c676 UVD_SUVD_CGC_GATE__SCM_HEVC_MASK |
709 UVD_SUVD_CGC_GATE__SCM_HEVC_MASK |
1299 UVD_SUVD_CGC_GATE__SCM_HEVC_MASK |
/linux-master/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_5_0_0_sh_mask.h1151 #define UVD_SUVD_CGC_GATE__SCM_HEVC_MASK 0x00000400L macro
H A Dvcn_4_0_5_sh_mask.h1342 #define UVD_SUVD_CGC_GATE__SCM_HEVC_MASK 0x00000400L macro
H A Dvcn_4_0_0_sh_mask.h1346 #define UVD_SUVD_CGC_GATE__SCM_HEVC_MASK 0x00000400L macro
H A Dvcn_4_0_3_sh_mask.h1346 #define UVD_SUVD_CGC_GATE__SCM_HEVC_MASK 0x00000400L macro
[all...]
H A Dvcn_2_5_sh_mask.h2093 #define UVD_SUVD_CGC_GATE__SCM_HEVC_MASK 0x00000400L macro
H A Dvcn_2_6_0_sh_mask.h3764 #define UVD_SUVD_CGC_GATE__SCM_HEVC_MASK 0x00000400L macro
H A Dvcn_3_0_0_sh_mask.h2829 #define UVD_SUVD_CGC_GATE__SCM_HEVC_MASK 0x00000400L macro
H A Dvcn_2_0_0_sh_mask.h3219 #define UVD_SUVD_CGC_GATE__SCM_HEVC_MASK 0x00000400L macro
H A Dvcn_1_0_sh_mask.h464 #define UVD_SUVD_CGC_GATE__SCM_HEVC_MASK 0x00000400L macro
/linux-master/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h236 #define UVD_SUVD_CGC_GATE__SCM_HEVC_MASK 0x00000400L macro
H A Duvd_5_0_sh_mask.h743 #define UVD_SUVD_CGC_GATE__SCM_HEVC_MASK 0x400 macro
H A Duvd_6_0_sh_mask.h745 #define UVD_SUVD_CGC_GATE__SCM_HEVC_MASK 0x400 macro

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