Searched refs:RREG8 (Results 1 - 16 of 16) sorted by relevance

/linux-master/drivers/gpu/drm/mgag200/
H A Dmgag200_bmc.c18 tmp = RREG8(DAC_DATA);
24 tmp = RREG8(DAC_DATA);
34 tmp = RREG8(DAC_DATA);
45 tmp = RREG8(DAC_DATA);
59 tmp = RREG8(DAC_DATA);
72 tmp = RREG8(MGAREG_CRTCEXT_DATA);
77 tmp = RREG8(DAC_DATA);
90 tmp = RREG8(DAC_DATA);
96 tmp = RREG8(DAC_DATA);
H A Dmgag200_g200wb.c118 tmp = RREG8(MGAREG_CRTC_DATA);
125 tmp = RREG8(DAC_DATA);
130 tmp = RREG8(DAC_DATA);
135 tmp = RREG8(MGAREG_MEM_MISC_READ);
140 tmp = RREG8(DAC_DATA);
148 tmp = RREG8(DAC_DATA);
163 tmp = RREG8(DAC_DATA);
171 tmp = RREG8(DAC_DATA);
177 tmp = RREG8(DAC_DATA);
184 tmp = RREG8(MGAREG_SEQ_DAT
[all...]
H A Dmgag200_g200ev.c122 tmp = RREG8(DAC_DATA);
126 tmp = RREG8(MGAREG_MEM_MISC_READ);
131 tmp = RREG8(DAC_DATA);
135 tmp = RREG8(DAC_DATA);
146 tmp = RREG8(DAC_DATA);
153 tmp = RREG8(DAC_DATA);
159 tmp = RREG8(DAC_DATA);
162 tmp = RREG8(MGAREG_MEM_MISC_READ);
167 tmp = RREG8(DAC_DATA);
H A Dmgag200_g200eh.c118 tmp = RREG8(DAC_DATA);
122 tmp = RREG8(MGAREG_MEM_MISC_READ);
127 tmp = RREG8(DAC_DATA);
140 tmp = RREG8(DAC_DATA);
146 tmp = RREG8(DAC_DATA);
151 vcount = RREG8(MGAREG_VCOUNT);
154 tmpcount = RREG8(MGAREG_VCOUNT);
H A Dmgag200_i2c.c39 return RREG8(DAC_DATA);
47 tmp = (RREG8(DAC_DATA) & mask) | val;
H A Dmgag200_drv.h37 #define RREG8(reg) ioread8(((void __iomem *)mdev->rmmio) + (reg)) macro
51 ((v) = RREG8(MGA_MISC_IN))
65 RREG8(0x1fda); \
73 v = RREG8(MGAREG_SEQ_DATA); \
85 v = RREG8(MGAREG_CRTC_DATA); \
97 v = RREG8(MGAREG_CRTCEXT_DATA); \
H A Dmgag200_g200er.c143 tmp = RREG8(DAC_DATA);
148 tmp = RREG8(DAC_DATA);
152 tmp = RREG8(MGAREG_MEM_MISC_READ);
157 tmp = RREG8(DAC_DATA);
H A Dmgag200_drv.c199 misc = RREG8(MGA_MISC_IN);
H A Dmgag200_mode.c127 status = RREG8(MGAREG_Status + 2);
198 misc = RREG8(MGA_MISC_IN);
224 misc = RREG8(MGA_MISC_IN);
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dmxgpu_ai.c79 return RREG8(AI_MAIBOX_CONTROL_TRN_OFFSET_BYTE) & 2;
88 reg = RREG8(AI_MAIBOX_CONTROL_TRN_OFFSET_BYTE);
H A Dmxgpu_nv.c77 return RREG8(NV_MAIBOX_CONTROL_TRN_OFFSET_BYTE) & 2;
86 reg = RREG8(NV_MAIBOX_CONTROL_TRN_OFFSET_BYTE);
H A Damdgpu.h1264 #define RREG8(reg) amdgpu_mm_rreg8(adev, (reg)) macro
/linux-master/drivers/gpu/drm/radeon/
H A Dradeon_legacy_tv.c292 if (RREG8(RADEON_CLOCK_CNTL_DATA + 3) >= cnt_threshold)
H A Dr100.c3777 save->GENMO_WT = RREG8(R_0003C2_GENMO_WT);
3830 tmp = RREG8(R_0003C2_GENMO_WT);
H A Dradeon_combios.c1147 ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3;
H A Dradeon.h2498 #define RREG8(reg) readb((rdev->rmmio) + (reg)) macro

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