/freebsd-11-stable/sys/contrib/dev/ath/ath_hal/ar9300/ |
H A D | ar9300_tx99_tgt.c | 50 OS_REG_WRITE(ah, AR_PHY_TX_FORCED_GAIN, 0); 54 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(1), 61 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(2), 70 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(3), 77 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(4), 86 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(5), 94 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(6), 102 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(10), 111 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE(11), 121 OS_REG_WRITE(a [all...] |
H A D | ar9300_beacon.c | 46 OS_REG_WRITE(ah, AR_NEXT_TBTT_TIMER, ONE_EIGHTH_TU_TO_USEC(next_beacon)); 47 OS_REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT, 50 OS_REG_WRITE(ah, AR_NEXT_SWBA, 64 OS_REG_WRITE(ah, AR_BEACON_PERIOD, beacon_period_usec); 65 OS_REG_WRITE(ah, AR_DMA_BEACON_PERIOD, beacon_period_usec); 66 OS_REG_WRITE(ah, AR_SWBA_PERIOD, beacon_period_usec); 91 OS_REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(bs->bs_nexttbtt)); 98 OS_REG_WRITE(ah, AR_BEACON_PERIOD, 100 OS_REG_WRITE(ah, AR_DMA_BEACON_PERIOD, 165 OS_REG_WRITE(a [all...] |
H A D | ar9300_power.c | 42 OS_REG_WRITE(ah, AR_MCAST_FIL0, val); 47 OS_REG_WRITE(ah, AR_MCAST_FIL1, val); 76 OS_REG_WRITE(ah, reg, val); 93 OS_REG_WRITE(ah, addr, 8); 95 OS_REG_WRITE(ah, addr, 0x5000); 99 OS_REG_WRITE(ah, addr, AH_PRIVATE(ah)->ah_config.ath_hal_pcie_000); 101 OS_REG_WRITE(ah, addr, 0x5008); 105 OS_REG_WRITE(ah, addr, AH_PRIVATE(ah)->ah_config.ath_hal_pcie_008); 107 OS_REG_WRITE(ah, addr, 0x502c); 111 OS_REG_WRITE(a [all...] |
H A D | ar9300_recv.c | 49 OS_REG_WRITE(ah, AR_HP_RXDP, rxdp); 51 OS_REG_WRITE(ah, AR_LP_RXDP, rxdp); 61 OS_REG_WRITE(ah, AR_CR, 0); 124 OS_REG_WRITE(ah, AR_MACMISC, 138 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); 160 OS_REG_WRITE(ah, AR_MACMISC, org_value); 202 OS_REG_WRITE(ah, AR_MCAST_FIL0, filter0); 203 OS_REG_WRITE(ah, AR_MCAST_FIL1, filter1); 239 OS_REG_WRITE(ah, AR_RX_FILTER, 248 OS_REG_WRITE(a [all...] |
H A D | ar9300_keycache.c | 93 OS_REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), 0); 94 OS_REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), 0); 95 OS_REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), 0); 96 OS_REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), 0); 97 OS_REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), 0); 98 OS_REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), AR_KEYTABLE_TYPE_CLR); 99 OS_REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), 0); 100 OS_REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), 0); 105 OS_REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), 0); 106 OS_REG_WRITE(a [all...] |
H A D | ar9300_misc.c | 127 OS_REG_WRITE(ah, AR_BSSMSKL, LE_READ_4(ahp->ah_bssid_mask)); 128 OS_REG_WRITE(ah, AR_BSSMSKU, LE_READ_2(ahp->ah_bssid_mask + 4)); 298 OS_REG_WRITE(ah, AR_BSS_ID0, LE_READ_4(ahp->ah_bssid)); 299 OS_REG_WRITE(ah, AR_BSS_ID1, LE_READ_2(ahp->ah_bssid + 4) | 320 OS_REG_WRITE(ah, AR_TSF_L32, (tsf & 0xffffffff)); 321 OS_REG_WRITE(ah, AR_TSF_U32, ((tsf >> 32) & 0xffffffff)); 357 OS_REG_WRITE(ah, AR_RESET_TSF, AR_RESET_TSF_ONCE); 390 OS_REG_WRITE(ah, AR_STA_ID1, reg | AR_STA_ID1_BASE_RATE_11B); 392 OS_REG_WRITE(ah, AR_STA_ID1, reg &~ AR_STA_ID1_BASE_RATE_11B); 521 OS_REG_WRITE(a [all...] |
/freebsd-11-stable/sys/dev/ath/ath_hal/ar5312/ |
H A D | ar5312_misc.c | 46 OS_REG_WRITE(ah, resOffset+AR5312_PCICFG, 106 OS_REG_WRITE(ah, AR_PHY_SLEEP_CTR_CONTROL, 0x1f); 107 OS_REG_WRITE(ah, AR_PHY_SLEEP_CTR_LIMIT, 0x0d); 108 OS_REG_WRITE(ah, AR_PHY_SLEEP_SCAL, 0x0c); 109 OS_REG_WRITE(ah, AR_PHY_M_SLEEP, 0x03); 110 OS_REG_WRITE(ah, AR_PHY_REFCLKDLY, 0x05); 111 OS_REG_WRITE(ah, AR_PHY_REFCLKPD, 115 OS_REG_WRITE(ah, AR_TSF_PARM, 61); /* 32 KHz TSF incr */ 118 OS_REG_WRITE(ah, AR_TSF_PARM, 1); /* 32 MHz TSF incr */ 122 OS_REG_WRITE(a [all...] |
H A D | ar5312_reset.c | 71 OS_REG_WRITE(ah, reg, V(i, 1)); 227 OS_REG_WRITE(ah, AR_PHY(0), 0x00000007); 242 OS_REG_WRITE(ah, AR_PHY_ADC_CTL, 256 OS_REG_WRITE(ah, AR_PHY_TXPWRADJ, 260 OS_REG_WRITE(ah, AR_PHY_TXPWRADJ, 0); 270 OS_REG_WRITE(ah, AR_SEQ_MASK, 0x0000000F); 275 OS_REG_WRITE(ah, AR_PHY_BLUETOOTH, 0); 288 OS_REG_WRITE(ah, AR_PHY_SIGMA_DELTA, 302 OS_REG_WRITE(ah, AR_PHY_SLEEP_SCAL, 0x04); 309 OS_REG_WRITE(a [all...] |
H A D | ar5315_gpio.c | 44 OS_REG_WRITE(ah, gpioOffset+AR5315_GPIODIR, 61 OS_REG_WRITE(ah, gpioOffset+AR5315_GPIODIR, 83 OS_REG_WRITE(ah, gpioOffset+AR5315_GPIODO, reg); 123 OS_REG_WRITE(ah, gpioOffset+AR5315_GPIOINT, val);
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/freebsd-11-stable/sys/dev/ath/ath_hal/ar5210/ |
H A D | ar5210_beacon.c | 47 OS_REG_WRITE(ah, AR_TIMER0, bt->bt_nexttbtt); 48 OS_REG_WRITE(ah, AR_TIMER1, bt->bt_nextdba); 49 OS_REG_WRITE(ah, AR_TIMER2, bt->bt_nextswba); 50 OS_REG_WRITE(ah, AR_TIMER3, bt->bt_nextatim); 54 OS_REG_WRITE(ah, AR_BEACON, bt->bt_intval); 98 OS_REG_WRITE(ah, AR_TIMER0, 0); /* no beacons */ 102 OS_REG_WRITE(ah, AR_STA_ID1, 104 OS_REG_WRITE(ah, AR_BEACON, AR_BEACON_PERIOD); 126 OS_REG_WRITE(ah, AR_STA_ID1, 131 OS_REG_WRITE(a [all...] |
H A D | ar5210_keycache.c | 60 OS_REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), 0); 61 OS_REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), 0); 62 OS_REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), 0); 63 OS_REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), 0); 64 OS_REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), 0); 65 OS_REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), 0); 66 OS_REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), 0); 67 OS_REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), 0); 97 OS_REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), macLo); 98 OS_REG_WRITE(a [all...] |
H A D | ar5210_reset.c | 126 OS_REG_WRITE(ah, AR_STA_ID0, LE_READ_4(ahp->ah_macaddr)); 127 OS_REG_WRITE(ah, AR_STA_ID1, LE_READ_2(ahp->ah_macaddr + 4)); 132 OS_REG_WRITE(ah, AR_BCR, INIT_BCON_CNTRL_REG); 133 OS_REG_WRITE(ah, AR_PCICFG, 137 OS_REG_WRITE(ah, AR_BCR, INIT_BCON_CNTRL_REG | AR_BCR_BCMD); 138 OS_REG_WRITE(ah, AR_PCICFG, 142 OS_REG_WRITE(ah, AR_BCR, INIT_BCON_CNTRL_REG); 143 OS_REG_WRITE(ah, AR_PCICFG, 147 OS_REG_WRITE(ah, AR_BCR, INIT_BCON_CNTRL_REG); 148 OS_REG_WRITE(a [all...] |
/freebsd-11-stable/sys/dev/ath/ath_hal/ar5211/ |
H A D | ar5211_beacon.c | 50 OS_REG_WRITE(ah, AR_TIMER0, bt->bt_nexttbtt); 51 OS_REG_WRITE(ah, AR_TIMER1, bt->bt_nextdba); 52 OS_REG_WRITE(ah, AR_TIMER2, bt->bt_nextswba); 53 OS_REG_WRITE(ah, AR_TIMER3, bt->bt_nextatim); 57 OS_REG_WRITE(ah, AR_BEACON, bt->bt_intval); 107 OS_REG_WRITE(ah, AR_TIMER0, 0); /* no beacons */ 111 OS_REG_WRITE(ah, AR_STA_ID1, 113 OS_REG_WRITE(ah, AR_BEACON, AR_BEACON_PERIOD); 132 OS_REG_WRITE(ah, AR_STA_ID1, 136 OS_REG_WRITE(a [all...] |
H A D | ar5211_keycache.c | 64 OS_REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), 0); 65 OS_REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), 0); 66 OS_REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), 0); 67 OS_REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), 0); 68 OS_REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), 0); 69 OS_REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), 0); 70 OS_REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), 0); 71 OS_REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), 0); 106 OS_REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), macLo); 107 OS_REG_WRITE(a [all...] |
H A D | ar5211_recv.c | 48 OS_REG_WRITE(ah, AR_RXDP, rxdp); 59 OS_REG_WRITE(ah, AR_CR, AR_CR_RXE); 68 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); /* Set receive disable bit */ 90 OS_REG_WRITE(ah, AR_DIAG_SW, 100 OS_REG_WRITE(ah, AR_DIAG_SW, 111 OS_REG_WRITE(ah, AR_MCAST_FIL0, filter0); 112 OS_REG_WRITE(ah, AR_MCAST_FIL1, filter1); 127 OS_REG_WRITE(ah, AR_MCAST_FIL1, (val &~ (1<<(ix-32)))); 130 OS_REG_WRITE(ah, AR_MCAST_FIL0, (val &~ (1<<ix))); 147 OS_REG_WRITE(a [all...] |
/freebsd-11-stable/sys/dev/ath/ath_hal/ar5212/ |
H A D | ar5212_keycache.c | 78 OS_REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), 0); 79 OS_REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), 0); 80 OS_REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), 0); 81 OS_REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), 0); 82 OS_REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), 0); 83 OS_REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), AR_KEYTABLE_TYPE_CLR); 84 OS_REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), 0); 85 OS_REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), 0); 90 OS_REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), 0); 91 OS_REG_WRITE(a [all...] |
H A D | ar5212_eeprom.c | 38 OS_REG_WRITE(ah, AR_EEPROM_ADDR, off); 39 OS_REG_WRITE(ah, AR_EEPROM_CMD, AR_EEPROM_CMD_READ);
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H A D | ar5212_beacon.c | 57 OS_REG_WRITE(ah, AR_TIMER0, bt->bt_nexttbtt & 0xffff); 58 OS_REG_WRITE(ah, AR_TIMER1, bt->bt_nextdba & 0x7ffff); 59 OS_REG_WRITE(ah, AR_TIMER2, bt->bt_nextswba & 0x1ffffff); 61 OS_REG_WRITE(ah, AR_TIMER3, bt->bt_nextatim & 0xffff); 75 OS_REG_WRITE(ah, AR_BEACON, AR_BEACON_RESET_TSF); 77 OS_REG_WRITE(ah, AR_BEACON, bt->bt_intval); 131 OS_REG_WRITE(ah, AR_TIMER0, 0); /* no beacons */ 135 OS_REG_WRITE(ah, AR_STA_ID1, 137 OS_REG_WRITE(ah, AR_BEACON, AR_BEACON_PERIOD); 155 OS_REG_WRITE(a [all...] |
H A D | ar5212_recv.c | 48 OS_REG_WRITE(ah, AR_RXDP, rxdp); 58 OS_REG_WRITE(ah, AR_CR, AR_CR_RXE); 68 OS_REG_WRITE(ah, AR_CR, AR_CR_RXD); /* Set receive disable bit */ 93 OS_REG_WRITE(ah, AR_DIAG_SW, 107 OS_REG_WRITE(ah, AR_DIAG_SW, 119 OS_REG_WRITE(ah, AR_MCAST_FIL0, filter0); 120 OS_REG_WRITE(ah, AR_MCAST_FIL1, filter1); 135 OS_REG_WRITE(ah, AR_MCAST_FIL1, (val &~ (1<<(ix-32)))); 138 OS_REG_WRITE(ah, AR_MCAST_FIL0, (val &~ (1<<ix))); 155 OS_REG_WRITE(a [all...] |
H A D | ar5212_gpio.c | 47 OS_REG_WRITE(ah, AR_GPIOCR, 61 OS_REG_WRITE(ah, AR_GPIOCR, 82 OS_REG_WRITE(ah, AR_GPIODO, reg); 120 OS_REG_WRITE(ah, AR_GPIOCR, val);
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/freebsd-11-stable/sys/dev/ath/ath_hal/ar9001/ |
H A D | ar9130_phy.c | 44 OS_REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll); 46 OS_REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_SLEEP_DERIVED_CLK);
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/freebsd-11-stable/sys/dev/ath/ath_hal/ar5416/ |
H A D | ar5416_beacon.c | 51 OS_REG_WRITE(ah, AR_NEXT_TBTT, TU_TO_USEC(bt->bt_nexttbtt)); 52 OS_REG_WRITE(ah, AR_NEXT_DBA, ONE_EIGHTH_TU_TO_USEC(bt->bt_nextdba)); 53 OS_REG_WRITE(ah, AR_NEXT_SWBA, ONE_EIGHTH_TU_TO_USEC(bt->bt_nextswba)); 54 OS_REG_WRITE(ah, AR_NEXT_NDP, TU_TO_USEC(bt->bt_nextatim)); 58 OS_REG_WRITE(ah, AR5416_BEACON_PERIOD, bperiod); 59 OS_REG_WRITE(ah, AR_DBA_PERIOD, bperiod); 60 OS_REG_WRITE(ah, AR_SWBA_PERIOD, bperiod); 61 OS_REG_WRITE(ah, AR_NDP_PERIOD, bperiod); 135 OS_REG_WRITE(ah, AR_NEXT_TBTT, 0); /* no beacons */ 139 OS_REG_WRITE(a [all...] |
H A D | ar5416_interrupts.c | 140 OS_REG_WRITE(ah, AR_ISR_S2, isr2); 181 OS_REG_WRITE(ah, AR_ISR_S0, isr0); 183 OS_REG_WRITE(ah, AR_ISR_S1, isr1); 201 OS_REG_WRITE(ah, AR_ISR_S5, isr5); 220 OS_REG_WRITE(ah, AR_ISR, isr); 237 OS_REG_WRITE(ah, AR_RC, AR_RC_HOSTIF); 238 OS_REG_WRITE(ah, AR_RC, 0); 252 OS_REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause); 275 OS_REG_WRITE(ah, AR_IER, AR_IER_DISABLE); 279 OS_REG_WRITE(a [all...] |
/freebsd-11-stable/sys/dev/ath/ath_hal/ar9002/ |
H A D | ar9285_btcoex.c | 66 OS_REG_WRITE(ah, AR_BT_COEX_MODE2, ahp->ah_btCoexMode2); 69 OS_REG_WRITE(ah, AR_PHY_SWITCH_COM, 79 OS_REG_WRITE(ah, AR_BT_COEX_MODE2, ahp->ah_btCoexMode2); 85 OS_REG_WRITE(ah, AR_PHY_SWITCH_COM, 95 OS_REG_WRITE(ah, AR_BT_COEX_MODE2, ahp->ah_btCoexMode2); 101 OS_REG_WRITE(ah, AR_PHY_SWITCH_COM, 0); 118 OS_REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regVal); 124 OS_REG_WRITE(ah, AR_PHY_CCK_DETECT, regVal);
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H A D | ar9287_cal.c | 58 OS_REG_WRITE(ah, AR_PHY_AGC_CONTROL,
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