Searched refs:NUM_DPPCLK_DPM_LEVELS (Results 1 - 16 of 16) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_smu.h34 #define NUM_DPPCLK_DPM_LEVELS 4 macro
72 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
/linux-master/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu13_driver_if_v13_0_5.h45 #define NUM_DPPCLK_DPM_LEVELS 4 macro
113 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
H A Dsmu11_driver_if_vangogh.h105 #define NUM_DPPCLK_DPM_LEVELS 7 macro
130 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
H A Dsmu13_driver_if_v13_0_4.h106 #define NUM_DPPCLK_DPM_LEVELS 8 macro
125 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
H A Dsmu13_driver_if_yellow_carp.h105 #define NUM_DPPCLK_DPM_LEVELS 8 macro
124 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
H A Dsmu14_driver_if_v14_0_0.h101 #define NUM_DPPCLK_DPM_LEVELS 8 macro
123 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
152 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
H A Dsmu13_driver_if_v13_0_0.h38 #define NUM_DPPCLK_DPM_LEVELS 8 macro
1047 uint16_t FreqTableDppClk [NUM_DPPCLK_DPM_LEVELS ]; // In MHz
1407 uint16_t FreqTableDppClk [NUM_DPPCLK_DPM_LEVELS ]; // In MHz
H A Dsmu13_driver_if_v13_0_7.h39 #define NUM_DPPCLK_DPM_LEVELS 8 macro
1056 uint16_t FreqTableDppClk [NUM_DPPCLK_DPM_LEVELS ]; // In MHz
1400 uint16_t FreqTableDppClk [NUM_DPPCLK_DPM_LEVELS ]; // In MHz
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_smu.h34 #define NUM_DPPCLK_DPM_LEVELS 8 macro
80 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
H A Ddcn316_clk_mgr.c509 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) {
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_smu.h107 #define NUM_DPPCLK_DPM_LEVELS 8 macro
133 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
H A Ddcn31_clk_mgr.c586 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) {
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_smu.h78 #define NUM_DPPCLK_DPM_LEVELS 8 macro
106 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
H A Ddcn35_clk_mgr.c748 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) {
819 find_max_clk_value(clock_table->DppClocks, NUM_DPPCLK_DPM_LEVELS);
/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_smu.h52 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
H A Ddcn314_clk_mgr.c640 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) {
704 bw_params->clk_table.entries[i].dppclk_mhz = find_max_clk_value(clock_table->DppClocks, NUM_DPPCLK_DPM_LEVELS);

Completed in 179 milliseconds