Searched refs:M3 (Results 1 - 15 of 15) sorted by relevance

/linux-master/arch/sparc/kernel/
H A Dtraps_64.c1097 #define M3 145 macro
1101 /*00*/NONE, C0, C1, M2, C2, M2, M3, 47, C3, M2, M2, 53, M2, 41, 29, M,
1106 /*05*/M2, 44, 28, M2, M, M2, M2, 52, 68, M2, M2, 62, M2, M3, M3, M4,
1107 /*06*/M2, 26, 106, M2, 64, M, M2, 2, 120, M, M2, M3, M, M3, M3, M4,
1108 /*07*/116, M2, M2, M3, M2, M3, M, M4, M2, 58, 54, M2, M, M4, M4, M3,
[all...]
/linux-master/arch/xtensa/variants/csp/include/variant/
H A Dtie-asm.h113 rsr.M3 \at1 // MAC16 option
180 wsr.M3 \at1 // MAC16 option
/linux-master/arch/xtensa/variants/dc232b/include/variant/
H A Dtie-asm.h54 rsr \at2, M3
97 wsr \at2, M3
/linux-master/arch/xtensa/variants/dc233c/include/variant/
H A Dtie-asm.h110 rsr \at1, M3 // MAC16 option
175 wsr \at1, M3 // MAC16 option
/linux-master/arch/xtensa/variants/de212/include/variant/
H A Dtie-asm.h101 rsr.M3 \at1 // MAC16 option
156 wsr.M3 \at1 // MAC16 option
/linux-master/arch/arm64/crypto/
H A Dpolyval-ce-core.S41 M3 .req v3 label
223 ld1 {M0.16b, M1.16b, M2.16b, M3.16b}, [MSG], #64
246 karatsuba1 M3 KEY5
278 ld1 {M0.16b, M1.16b, M2.16b, M3.16b}, [MSG], #64
283 karatsuba1 M3 KEY5
/linux-master/arch/x86/crypto/
H A Dpoly1305-x86_64-cryptogams.pl2208 my ($M0,$M1,$M2,$M3,$M4) = map("%zmm$_",(25..29));
2300 vpmuludq $T1,$R2,$M3
2306 vpaddq $M3,$D3,$D3 # d3 += r1'*r2
2311 vpmuludq $T2,$R1,$M3
2317 vpaddq $M3,$D3,$D3 # d3 += r2'*r1
2322 vpmuludq $T3,$R0,$M3
2327 vpaddq $M3,$D3,$D3 # d3 += r3'*r0
2332 vpmuludq $T4,$S4,$M3
2337 vpaddq $M3,$D3,$D3 # d3 += r2'*5*r4
2352 vpsrlq \$26,$D3,$M3
[all...]
/linux-master/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dtie-asm.h113 rsr.M3 \at1 // MAC16 option
180 wsr.M3 \at1 // MAC16 option
/linux-master/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dtie-asm.h110 rsr.M3 \at1 // MAC16 option
177 wsr.M3 \at1 // MAC16 option
/linux-master/drivers/bus/mhi/
H A Dcommon.h306 mhi_state(M3, "M3") \
/linux-master/include/linux/
H A Dmhi.h144 * @MHI_STATE_M3: M3 state
145 * @MHI_STATE_M3_FAST: M3 Fast state
337 * @M0, M2, M3: Counters to track number of device MHI state changes
413 u32 M0, M2, M3; member in struct:mhi_controller
662 * has to be in M3 state during resume. But some devices seem to be in a
663 * different MHI state other than M3 but they continue working fine if allowed.
/linux-master/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g4.c1507 #define M3 183 macro
1508 SIG_EXPR_LIST_DECL_SINGLE(M3, GPIOW7, GPIOW7, SIG_DESC_SET(SCUA0, 31));
1509 SIG_EXPR_LIST_DECL_SINGLE(M3, ADC7, ADC7);
1510 PIN_DECL_(M3, SIG_EXPR_LIST_PTR(M3, GPIOW7), SIG_EXPR_LIST_PTR(M3, ADC7));
1511 FUNC_GROUP_DECL(ADC7, M3);
2064 ASPEED_PINCTRL_PIN(M3),
2506 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, M3, M3, SCUA
[all...]
/linux-master/drivers/bus/mhi/host/
H A Ddebugfs.c28 seq_printf(m, "M0: %u M2: %u M3: %u", mhi_cntrl->M0, mhi_cntrl->M2,
29 mhi_cntrl->M3);
H A Dinternal.h122 mhi_pm_state(M3_ENTER, "M?->M3") \
123 mhi_pm_state(M3, "M3") \
124 mhi_pm_state(M3_EXIT, "M3->M0") \
H A Dpm.c39 * M0 -> M3_ENTER -> M3 -> M3_EXIT --> M0
372 /* MHI M3 completion handler */
383 dev_err(dev, "Unable to transition to M3 state\n");
387 mhi_cntrl->M3++;
880 dev_dbg(dev, "Allowing M3 transition\n");
891 /* Set MHI to M3 and wait for completion */
894 dev_dbg(dev, "Waiting for M3 completion\n");
903 "Did not enter M3 state, MHI state: %s, PM state: %s\n",
939 dev_warn(dev, "Resuming from non M3 state (%s)\n",

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