Searched refs:LVDS (Results 1 - 25 of 30) sorted by relevance

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/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_lvds_regs.h11 /* LVDS port control */
12 #define LVDS _MMIO(0x61180) macro
14 * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
15 * the DPLL semantics change when the LVDS is assigned to that pipe.
18 /* Selects pipe B for LVDS data. Must be set on pre-965. */
23 /* LVDS dithering flag on 965/g4x platform */
25 /* LVDS sync polarity flags. Set to invert (i.e. negative) */
H A Dintel_crtc_state_dump.c81 OUTPUT_TYPE(LVDS),
/linux-master/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dsmu7.h178 LVDS, enumerator in enum:DisplayConfig
H A Dsmu71.h466 LVDS, enumerator in enum:DisplayConfig
H A Dsmu72.h552 LVDS, enumerator in enum:DisplayConfig
H A Dsmu73.h532 LVDS, enumerator in enum:DisplayConfig
H A Dsmu74.h606 LVDS, enumerator in enum:DisplayConfig
H A Dsmu75.h500 LVDS, enumerator in enum:DisplayConfig
/linux-master/drivers/gpu/drm/radeon/
H A Dsmu7.h159 LVDS, enumerator in enum:DisplayConfig
/linux-master/drivers/gpu/drm/gma500/
H A Dpsb_intel_display.c225 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
230 u32 lvds = REG_READ(LVDS);
250 REG_WRITE(LVDS, lvds);
251 REG_READ(LVDS);
322 is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN);
H A Dcdv_intel_display.c370 * Now only single-channel LVDS is supported on CDV. If it is
371 * incorrect, please add the dual-channel LVDS.
635 * Based on the spec the low-end SKU has only CRT/LVDS. So it is
703 /* the BPC will be 6 if it is 18-bit LVDS panel */
704 if ((REG_READ(LVDS) & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP)
730 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
735 u32 lvds = REG_READ(LVDS);
754 REG_WRITE(LVDS, lvds);
755 REG_READ(LVDS);
854 is_lvds = (pipe == 1) && (REG_READ(LVDS)
[all...]
H A Dpsb_intel_lvds.c25 * LVDS I2C backlight control macros
84 * Set LVDS backlight level by I2C command
159 * Set LVDS backlight level either by I2C or PWM
168 dev_err(dev->dev, "NO LVDS backlight info\n");
250 /* XXX: We never power down the LVDS pairs. */
263 lvds_priv->saveLVDS = REG_READ(LVDS);
316 REG_WRITE(LVDS, lvds_priv->saveLVDS);
376 /* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
378 pr_err("Can't support LVDS on pipe A\n");
390 pr_err("Can't enable LVDS an
[all...]
H A Doaktrail_lvds.c79 /* XXX: We never power down the LVDS pairs. */
99 * The LVDS pin pair will already have been turned on in the
103 lvds_port = (REG_READ(LVDS) &
113 REG_WRITE(LVDS, lvds_port);
269 /* Then try the LVDS VBT mode */
285 * oaktrail_lvds_init - setup LVDS connectors on this device
289 * Create the connector, register the LVDS DDC bus, and try to figure out what
290 * modes we can display on the LVDS panel (if present).
352 * LVDS discovery:
355 * 3) check to see if LVDS i
[all...]
H A Doaktrail_device.c174 /* LVDS state */
180 regs->psb.saveLVDS = PSB_RVDC32(LVDS);
304 PSB_WVDC32(regs->psb.saveLVDS, LVDS); /*port 61180h*/
H A Dcdv_device.c79 DRM_DEBUG_KMS("LVDS Panel PWM value is 0!\n");
257 regs->cdv.saveLVDS = REG_READ(LVDS);
329 REG_WRITE(LVDS, regs->cdv.saveLVDS);
H A Dcdv_intel_lvds.c27 * LVDS I2C backlight control macros
144 /* XXX: We never power down the LVDS pairs. */
195 pr_err("Can't enable LVDS and another encoder on the same pipe\n");
270 * The LVDS pin pair will already have been turned on in the
418 * the LVDS is present.
421 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
447 * the VBT correctly. Since LVDS requires additional
449 * a good indicator that the LVDS is actually present.
457 * the OpRegion then they have validated the LVDS's existence.
467 * cdv_intel_lvds_init - setup LVDS connector
[all...]
H A Dgma_display.c761 (REG_READ(LVDS) & LVDS_PORT_EN) != 0) {
763 * For LVDS, if the panel is on, just rely on its current
768 if ((REG_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
H A Dpsb_intel_reg.h157 * - LVDS/DVOB/DVOC on
250 * The i830 generation, in LVDS mode, defines P1 as the bit number set within
431 * This register controls the LVDS output enable, pipe selection, and data
436 #define LVDS 0x61180 macro
438 * Enables the LVDS port. This bit must be set before DPLLs are enabled, as
439 * the DPLL semantics change when the LVDS is assigned to that pipe.
442 /* Selects pipe B for LVDS data. Must be set on pre-965. */
776 /* #define LVDS 0x61180 */
1316 #define SB_P2_14 2 /* LVDS single */
1317 #define SB_P2_7 3 /* LVDS doubl
[all...]
/linux-master/drivers/video/fbdev/nvidia/
H A Dnv_setup.c634 par->LVDS = 0;
638 par->LVDS = 1;
639 printk("nvidiafb: Panel is %s\n", par->LVDS ? "LVDS" : "TMDS");
H A Dnv_type.h135 int LVDS; member in struct:nvidia_par
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dior.h30 LVDS, enumerator in enum:nvkm_ior::nvkm_ior_state::nvkm_ior_proto
H A Dg94.c276 case 0: state->proto = LVDS; state->link = 1; break;
H A Doutp.c70 case DCB_OUTPUT_LVDS : *type = SOR; return LVDS;
H A Dnv50.c239 case 0: state->proto = LVDS; state->link = 1; break;
1052 if (ior->asy.proto == LVDS) {
1279 * A) Give dual-link LVDS a separate EVO protocol, like for TMDS.
1281 * B) Use SetControlOutputResource.PixelDepth on LVDS.
1286 if (outp && ior->type == SOR && ior->asy.proto == LVDS) {
H A Duoutp.c405 if (ior->arm.proto != LVDS)

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