Searched refs:I915_NUM_ENGINES (Results 1 - 23 of 23) sorted by relevance
/linux-master/drivers/gpu/drm/i915/selftests/ |
H A D | igt_live_test.h | 11 #include "gt/intel_engine.h" /* for I915_NUM_ENGINES */ 21 unsigned int reset_engine[I915_MAX_GT][I915_NUM_ENGINES];
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/linux-master/drivers/gpu/drm/i915/gvt/ |
H A D | scheduler.h | 47 struct intel_vgpu_workload *current_workload[I915_NUM_ENGINES]; 52 struct intel_vgpu *engine_owner[I915_NUM_ENGINES]; 55 struct task_struct *thread[I915_NUM_ENGINES]; 56 wait_queue_head_t waitq[I915_NUM_ENGINES];
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H A D | gvt.h | 151 struct intel_vgpu_execlist execlist[I915_NUM_ENGINES]; 152 struct list_head workload_q_head[I915_NUM_ENGINES]; 153 struct intel_context *shadow[I915_NUM_ENGINES]; 160 DECLARE_BITMAP(shadow_ctx_desc_updated, I915_NUM_ENGINES); 161 DECLARE_BITMAP(tlb_handle_pending, I915_NUM_ENGINES); 162 void *ring_scan_buffer[I915_NUM_ENGINES]; 163 int ring_scan_buffer_size[I915_NUM_ENGINES]; 171 } last_ctx[I915_NUM_ENGINES]; 209 u32 hws_pga[I915_NUM_ENGINES]; 340 struct notifier_block shadow_ctx_notifier_block[I915_NUM_ENGINES]; [all...] |
H A D | vgpu.c | 280 for (i = 0; i < I915_NUM_ENGINES; i++)
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H A D | mmio_context.c | 162 u32 control_table[I915_NUM_ENGINES][GEN9_MOCS_SIZE];
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H A D | scheduler.c | 1420 bitmap_zero(s->shadow_ctx_desc_updated, I915_NUM_ENGINES); 1435 bitmap_zero(s->tlb_handle_pending, I915_NUM_ENGINES);
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H A D | cmd_parser.c | 596 static const struct decode_info *ring_decode_info[I915_NUM_ENGINES][8] = {
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/linux-master/drivers/gpu/drm/i915/gt/ |
H A D | intel_gt_types.h | 205 struct intel_engine_cs *engine[I915_NUM_ENGINES];
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H A D | intel_gt.h | 183 (id__) < I915_NUM_ENGINES; \
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H A D | intel_engine_types.h | 143 I915_NUM_ENGINES enumerator in enum:intel_engine_id
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H A D | selftest_timeline.c | 284 return i915_prandom_u32_max_state(I915_NUM_ENGINES, rnd); 539 timelines = kvmalloc_array(NUM_TIMELINES * I915_NUM_ENGINES, 614 timelines = kvmalloc_array(NUM_TIMELINES * I915_NUM_ENGINES,
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H A D | mock_engine.c | 347 GEM_BUG_ON(id >= I915_NUM_ENGINES);
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H A D | intel_engine_cs.c | 478 BUILD_BUG_ON(BITS_PER_TYPE(engine->mask) < I915_NUM_ENGINES); 991 GENMASK(BITS_PER_TYPE(mask) - 1, I915_NUM_ENGINES)); 1730 static const i915_reg_t _reg[I915_NUM_ENGINES] = {
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H A D | selftest_hangcheck.c | 989 threads = kmalloc_array(I915_NUM_ENGINES, sizeof(*threads), GFP_KERNEL); 1012 memset(threads, 0, sizeof(*threads) * I915_NUM_ENGINES);
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H A D | intel_gt.c | 529 struct i915_request *requests[I915_NUM_ENGINES] = {};
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H A D | selftest_workarounds.c | 34 } engine[I915_NUM_ENGINES];
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H A D | intel_reset.c | 1559 BUILD_BUG_ON(I915_RESET_ENGINE + I915_NUM_ENGINES >
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H A D | selftest_execlists.c | 3557 struct kthread_worker *worker[I915_NUM_ENGINES] = {}; 3564 arg = kmalloc_array(I915_NUM_ENGINES, sizeof(*arg), GFP_KERNEL); 3568 memset(arg, 0, I915_NUM_ENGINES * sizeof(*arg));
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H A D | intel_execlists_submission.c | 194 } nodes[I915_NUM_ENGINES];
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/linux-master/drivers/gpu/drm/i915/ |
H A D | intel_device_info.c | 368 BUILD_BUG_ON(BITS_PER_TYPE(intel_engine_mask_t) < I915_NUM_ENGINES);
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/linux-master/drivers/gpu/drm/i915/gt/uc/ |
H A D | intel_guc.h | 202 u32 ads_regset_count[I915_NUM_ENGINES];
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H A D | intel_guc_submission.c | 5844 BUILD_BUG_ON(ilog2(VIRTUAL_ENGINES) < I915_NUM_ENGINES);
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/linux-master/drivers/gpu/drm/i915/gem/ |
H A D | i915_gem_context.c | 1106 const unsigned int max = I915_NUM_ENGINES;
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