Searched refs:F3 (Results 1 - 16 of 16) sorted by relevance

/linux-master/crypto/
H A Dmd5.c34 #define F3(x, y, z) (x ^ y ^ z) macro
83 MD5STEP(F3, a, b, c, d, in[5] + 0xfffa3942, 4);
84 MD5STEP(F3, d, a, b, c, in[8] + 0x8771f681, 11);
85 MD5STEP(F3, c, d, a, b, in[11] + 0x6d9d6122, 16);
86 MD5STEP(F3, b, c, d, a, in[14] + 0xfde5380c, 23);
87 MD5STEP(F3, a, b, c, d, in[1] + 0xa4beea44, 4);
88 MD5STEP(F3, d, a, b, c, in[4] + 0x4bdecfa9, 11);
89 MD5STEP(F3, c, d, a, b, in[7] + 0xf6bb4b60, 16);
90 MD5STEP(F3, b, c, d, a, in[10] + 0xbebfbc70, 23);
91 MD5STEP(F3,
[all...]
H A Drmd160.c39 #define F3(x, y, z) ((x | ~y) ^ z) macro
104 ROUND(dd, ee, aa, bb, cc, F3, K3, in[3], 11);
105 ROUND(cc, dd, ee, aa, bb, F3, K3, in[10], 13);
106 ROUND(bb, cc, dd, ee, aa, F3, K3, in[14], 6);
107 ROUND(aa, bb, cc, dd, ee, F3, K3, in[4], 7);
108 ROUND(ee, aa, bb, cc, dd, F3, K3, in[9], 14);
109 ROUND(dd, ee, aa, bb, cc, F3, K3, in[15], 9);
110 ROUND(cc, dd, ee, aa, bb, F3, K3, in[8], 13);
111 ROUND(bb, cc, dd, ee, aa, F3, K3, in[1], 15);
112 ROUND(aa, bb, cc, dd, ee, F3, K
[all...]
H A Dcast5_generic.c299 #define F3(D, m, r) ((I = ((m) - (D))), (I = rol32(I, (r))), \ macro
329 t = l; l = r; r = t ^ F3(r, Km[2], Kr[2]);
332 t = l; l = r; r = t ^ F3(r, Km[5], Kr[5]);
335 t = l; l = r; r = t ^ F3(r, Km[8], Kr[8]);
338 t = l; l = r; r = t ^ F3(r, Km[11], Kr[11]);
342 t = l; l = r; r = t ^ F3(r, Km[14], Kr[14]);
373 t = l; l = r; r = t ^ F3(r, Km[14], Kr[14]);
377 t = l; l = r; r = t ^ F3(r, Km[11], Kr[11]);
380 t = l; l = r; r = t ^ F3(r, Km[8], Kr[8]);
383 t = l; l = r; r = t ^ F3(
[all...]
H A Dcast6_generic.c31 #define F3(D, r, m) ((I = ((m) - (D))), (I = rol32(I, (r))), \ macro
98 key[4] ^= F3(key[5], Tr[i % 4][2], Tm[i][2]);
101 key[1] ^= F3(key[2], Tr[i % 4][5], Tm[i][5]);
158 block[0] ^= F3(block[1], Kr[2], Km[2]);
167 block[0] ^= F3(block[1], Kr[2], Km[2]);
/linux-master/drivers/pinctrl/renesas/
H A Dpfc-r8a73a4.c233 #define F3(a) a##_MARK macro
240 F1(LCDD0), F3(PDM2_CLK_0), F7(DU0_DR0), IRQ(0), /* Port0 */ enumerator in enum:__anon2472
241 F1(LCDD1), F3(PDM2_DATA_1), F7(DU0_DR19), IRQ(1), enumerator in enum:__anon2472
242 F1(LCDD2), F3(PDM3_CLK_2), F7(DU0_DR2), IRQ(2), enumerator in enum:__anon2472
243 F1(LCDD3), F3(PDM3_DATA_3), F7(DU0_DR3), IRQ(3), enumerator in enum:__anon2472
244 F1(LCDD4), F3(PDM4_CLK_4), F7(DU0_DR4), IRQ(4), enumerator in enum:__anon2472
245 F1(LCDD5), F3(PDM4_DATA_5), F7(DU0_DR5), IRQ(5), enumerator in enum:__anon2472
246 F1(LCDD6), F3(PDM0_OUTCLK_6), F7(DU0_DR6), IRQ(6), enumerator in enum:__anon2472
247 F1(LCDD7), F3(PDM0_OUTDATA_7), F7(DU0_DR7), IRQ(7), enumerator in enum:__anon2472
248 F1(LCDD8), F3(PDM1_OUTCLK_ enumerator in enum:__anon2472
249 F1(LCDD9), F3(PDM1_OUTDATA_9), F7(DU0_DG1), IRQ(9), enumerator in enum:__anon2472
250 F1(LCDD10), F3(FSICCK), F7(DU0_DG2), IRQ(10), /* Port10 */ enumerator in enum:__anon2472
251 F1(LCDD11), F3(FSICISLD), F7(DU0_DG3), IRQ(11), enumerator in enum:__anon2472
252 F1(LCDD12), F3(FSICOMC), F7(DU0_DG4), IRQ(12), enumerator in enum:__anon2472
253 F1(LCDD13), F3(FSICOLR), F4(FSICILR), F7(DU0_DG5), IRQ(13), enumerator in enum:__anon2472
254 F1(LCDD14), F3(FSICOBT), F4(FSICIBT), F7(DU0_DG6), IRQ(14), enumerator in enum:__anon2472
255 F1(LCDD15), F3(FSICOSLD), F7(DU0_DG7), IRQ(15), enumerator in enum:__anon2472
259 F1(LCDD19), F3(SCIFB3_RTS_19), F7(DU0_DB3), enumerator in enum:__anon2472
260 F1(LCDD20), F3(SCIFB3_CTS_20), F7(DU0_DB4), /* Port20 */ enumerator in enum:__anon2472
261 F1(LCDD21), F3(SCIFB3_TXD_21), F7(DU0_DB5), enumerator in enum:__anon2472
262 F1(LCDD22), F3(SCIFB3_RXD_22), F7(DU0_DB6), enumerator in enum:__anon2472
263 F1(LCDD23), F3(SCIFB3_SCK_23), F7(DU0_DB7), enumerator in enum:__anon2472
264 F1(LCDHSYN), F2(LCDCS), F3(SCIFB1_RTS_24), enumerator in enum:__anon2472
266 F1(LCDVSYN), F3(SCIFB1_CTS_25), F7(DU0_EXVSYNC_N_VSYNC_N_CSYNC_N), enumerator in enum:__anon2472
267 F1(LCDDCK), F2(LCDWR), F3(SCIFB1_TXD_26), F7(DU0_DOTCLKIN), enumerator in enum:__anon2472
268 F1(LCDDISP), F2(LCDRS), F3(SCIFB1_RXD_27), F7(DU0_DOTCLKOUT), enumerator in enum:__anon2472
269 F1(LCDRD_N), F3(SCIFB1_SCK_28), F7(DU0_DOTCLKOUTB), enumerator in enum:__anon2472
279 F1(SCIFB0_RTS), F3(TPU0TO1), F4(SCIFB3_RTS_38), F7(CHSCIF0_HRTS), enumerator in enum:__anon2472
280 F1(SCIFB0_CTS), F3(TPU0TO2), F4(SCIFB3_CTS_39), F7(CHSCIF0_HCTS), enumerator in enum:__anon2472
281 F1(SCIFB0_SCK), F3(TPU0TO3), F4(SCIFB3_SCK_40), enumerator in enum:__anon2472
286 F1(HSI_RX_WAKE), F2(SCIFB2_CTS_66), F3(MSIOF3_SYNC), F5(GenIO4), enumerator in enum:__anon2472
289 F1(HSI_RX_FLAG), F2(SCIFB2_TXD_68), F3(MSIOF3_TXD), F5(GIO_OUT4_68), enumerator in enum:__anon2472
290 F1(HSI_RX_DATA), F2(SCIFB2_RXD_69), F3(MSIOF3_RXD), F5(GIO_OUT5_69), enumerator in enum:__anon2472
296 F1(HSI_TX_READY), F2(SCIFB2_RTS_73), F3(MSIOF3_SCK), F5(GIO_OUT0_73), enumerator in enum:__anon2472
313 F3(SF_PORT_1_120), F4(SCIFB3_RXD_120), F7(DU0_CDE), /* Port120 */ enumerator in enum:__anon2472
314 F3(SF_PORT_0_121), F4(SCIFB3_TXD_121), enumerator in enum:__anon2472
316 F1(SCIFB0_RXD), F7(CHSCIF0_HRX), F3(ISP_STROBE_124), enumerator in enum:__anon2472
317 F1(STP_ISD_0), F2(PDM4_CLK_125), F3(MSIOF2_TXD), F5(SIM0_VOLTSEL0), enumerator in enum:__anon2472
318 F1(TS_SDEN), F2(MSIOF7_SYNC), F3(STP_ISEN_1), enumerator in enum:__anon2472
319 F1(STP_ISEN_0), F2(PDM1_OUTDATA_128), F3(MSIOF2_SYNC), enumerator in enum:__anon2472
320 F5(SIM1_VOLTSEL1), F1(TS_SPSYNC), F2(MSIOF7_RXD), F3(STP_ISSYNC_1), enumerator in enum:__anon2472
321 F1(STP_ISSYNC_0), F2(PDM4_DATA_130), F3(MSIOF2_RXD), enumerator in enum:__anon2472
324 F3(STP_ISCLK_1), F1(STP_ISCLK_0), F2(PDM1_OUTCLK_133), F3(MSIOF2_SCK), enumerator in enum:__anon2472
325 F5(SIM1_VOLTSEL0), F1(TS_SDAT), F2(MSIOF7_TXD), F3(STP_ISD_1), enumerator in enum:__anon2472
371 F1(FSIACK), F2(PDM3_CLK_234), F3(ISP_IRIS1_234), enumerator in enum:__anon2472
373 F1(FSIAOMC), F2(PDM0_OUTCLK_236), F3(ISP_IRIS0_236), enumerator in enum:__anon2472
377 F1(FSIBOLR), F2(FSIBILR), F1(FSIBOMC), F3(ISP_SHUTTER1_242), enumerator in enum:__anon2472
379 F1(FSIBCK), F3(ISP_SHUTTER0_245), enumerator in enum:__anon2472
383 F3(VIO_CKO3_259), F1(MSIOF0_TXD), /* Port260 */ enumerator in enum:__anon2472
389 F1(MSIOF2_SS1), F3(VIO_CKO5_270), /* Port270 */ enumerator in enum:__anon2472
390 F1(MSIOF2_SS2), F3(VIO_CKO2_271), F1(MSIOF3_SS2), F3(VIO_CKO1_272), enumerator in enum:__anon2472
391 F1(MSIOF3_SS1), F3(VIO_CKO4_273), F1(MSIOF4_SS2), F4(TPU1TO0), enumerator in enum:__anon2472
395 F1(SIM1_RST), F1(SDHID1_0), F3(STMDATA0_2), enumerator in enum:__anon2472
396 F1(SDHID1_1), F3(STMDATA1_2), IRQ(51), /* Port290 */ enumerator in enum:__anon2472
397 F1(SDHID1_2), F3(STMDATA2_2), F1(SDHID1_3), F3(STMDATA3_2), enumerator in enum:__anon2472
398 F1(SDHICLK1), F3(STMCLK_2), F1(SDHICMD1), F3(STMSIDI_2), enumerator in enum:__anon2472
399 F1(SDHID2_0), F2(MSIOF4_TXD), F3(SCIFB2_TXD_295), F4(MSIOF6_TXD), enumerator in enum:__anon2472
401 F1(SDHID2_2), F2(MSIOF4_RXD), F3(SCIFB2_RXD_297), F4(MSIOF6_RXD), enumerator in enum:__anon2472
402 F1(SDHID2_3), F2(MSIOF4_SYNC), F3(SCIFB2_CTS_298), F4(MSIOF6_SYNC), enumerator in enum:__anon2472
403 F1(SDHICLK2), F2(MSIOF4_SCK), F3(SCIFB2_SCK_299), F4(MSIOF6_SCK), enumerator in enum:__anon2472
404 F1(SDHICMD2), F2(MSIOF4_SS1), F3(SCIFB2_RTS_300), enumerator in enum:__anon2472
406 F1(SDHICD0), IRQ(50), F1(SDHID0_0), F3(STMDATA0_1), enumerator in enum:__anon2472
407 F1(SDHID0_1), F3(STMDATA1_1), F1(SDHID0_2), F3(STMDATA2_1), enumerator in enum:__anon2472
408 F1(SDHID0_3), F3(STMDATA3_1), F1(SDHICMD0), F3(STMSIDI_1), enumerator in enum:__anon2472
409 F1(SDHIWP0), F1(SDHICLK0), F3(STMCLK_1), IRQ(16), /* Port320 */ enumerator in enum:__anon2472
[all...]
/linux-master/arch/sparc/net/
H A Dbpf_jit_comp_32.c34 #define F3(X, Y) (OP(X) | OP3(Y)) macro
71 (F3(2, 0x02) | IMMED | RS1(REG) | ((K) & 0x3ff) | RD(REG))
73 #define ADD F3(2, 0x00)
74 #define AND F3(2, 0x01)
75 #define ANDCC F3(2, 0x11)
76 #define OR F3(2, 0x02)
77 #define XOR F3(2, 0x03)
78 #define SUB F3(2, 0x04)
79 #define SUBCC F3(2, 0x14)
80 #define MUL F3(
[all...]
H A Dbpf_jit_comp_64.c64 #define F3(X, Y) (OP(X) | OP3(Y)) macro
139 (F3(2, 0x02) | IMMED | RS1(REG) | ((K) & 0x3ff) | RD(REG))
141 #define ADD F3(2, 0x00)
142 #define AND F3(2, 0x01)
143 #define ANDCC F3(2, 0x11)
144 #define OR F3(2, 0x02)
145 #define XOR F3(2, 0x03)
146 #define SUB F3(2, 0x04)
147 #define SUBCC F3(2, 0x14)
148 #define MUL F3(
[all...]
/linux-master/arch/x86/crypto/
H A Dsha1_ssse3_asm.S152 RR F3,A,B,C,D,E,40
153 RR F3,D,E,A,B,C,42
154 RR F3,B,C,D,E,A,44
155 RR F3,E,A,B,C,D,46
156 RR F3,C,D,E,A,B,48
158 RR F3,A,B,C,D,E,50
159 RR F3,D,E,A,B,C,52
160 RR F3,B,C,D,E,A,54
161 RR F3,E,A,B,C,D,56
162 RR F3,
[all...]
/linux-master/drivers/gpu/drm/i915/
H A Dintel_step.h50 func(F3) \
/linux-master/arch/arm/crypto/
H A Dsha1-armv7-neon.S463 _R( _a, _b, _c, _d, _e, F3, 40,
466 _R( _e, _a, _b, _c, _d, F3, 41,
469 _R( _d, _e, _a, _b, _c, F3, 42,
472 _R( _c, _d, _e, _a, _b, F3, 43,
478 _R( _b, _c, _d, _e, _a, F3, 44,
481 _R( _a, _b, _c, _d, _e, F3, 45,
484 _R( _e, _a, _b, _c, _d, F3, 46,
487 _R( _d, _e, _a, _b, _c, F3, 47,
491 _R( _c, _d, _e, _a, _b, F3, 48,
494 _R( _b, _c, _d, _e, _a, F3, 4
[all...]
/linux-master/arch/x86/kernel/cpu/mce/
H A Dinject.c442 struct pci_dev *F3; local
450 F3 = nb->misc;
451 if (!F3)
454 err = pci_read_config_dword(F3, NBCFG, &val);
457 __func__, PCI_FUNC(F3->devfn), NBCFG);
468 err = pci_write_config_dword(F3, NBCFG, val);
471 __func__, PCI_FUNC(F3->devfn), NBCFG);
/linux-master/drivers/edac/
H A Damd64_edac.c222 pci_write_bits32(pvt->F3, SCRCTRL, scrubval, 0x001F);
264 amd64_read_pci_cfg(pvt->F3, SCRCTRL, &scrubval);
266 amd64_read_pci_cfg(pvt->F3, SCRCTRL, &scrubval);
728 amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_ADDR, section);
733 amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_DATA, word_bits);
761 amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_ADDR, section);
772 amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_DATA, word_bits);
776 amd64_read_pci_cfg(pvt->F3, F10_NB_ARRAY_DATA, &tmp);
1011 if (pvt->F3->device != PCI_DEVICE_ID_AMD_MI200_DF_F3)
2853 * Use pvt->F3 whic
3257 enable_ecc_error_reporting(struct ecc_settings *s, u16 nid, struct pci_dev *F3) argument
3309 restore_ecc_error_reporting(struct ecc_settings *s, u16 nid, struct pci_dev *F3) argument
3998 struct pci_dev *F3 = node_to_amd_nb(nid)->misc; local
4078 struct pci_dev *F3 = node_to_amd_nb(nid)->misc; local
[all...]
H A Damd64_edac.h332 struct pci_dev *F1, *F2, *F3; member in struct:amd64_pvt
/linux-master/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g5.c1339 #define F3 180 macro
1340 SIG_EXPR_LIST_DECL_SINGLE(F3, GPIOW4, GPIOW4, SIG_DESC_SET(SCUA0, 28));
1341 SIG_EXPR_LIST_DECL_SINGLE(F3, ADC4, ADC4);
1342 PIN_DECL_(F3, SIG_EXPR_LIST_PTR(F3, GPIOW4), SIG_EXPR_LIST_PTR(F3, ADC4));
1343 FUNC_GROUP_DECL(ADC4, F3);
2020 ASPEED_PINCTRL_PIN(F3),
2573 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, F3, F3, SCUA
[all...]
H A Dpinctrl-aspeed-g4.c681 #define F3 87 macro
682 SIG_EXPR_LIST_DECL_SINGLE(F3, SDA8, I2C8, I2C8_DESC);
683 PIN_DECL_1(F3, GPIOK7, SDA8);
685 FUNC_GROUP_DECL(I2C8, G5, F3);
2023 ASPEED_PINCTRL_PIN(F3),
/linux-master/drivers/pinctrl/
H A Dpinctrl-pic32.c152 PINCTRL_PIN(83, "F3"),
226 "G9", "B14", "D0", "B6", "D5", "B2", "F3", "F13",
250 "G9", "B14", "D0", "B6", "D5", "B2", "F3", "F13",
262 "G9", "B14", "D0", "B6", "D5", "B2", "F3", "F13",
267 "G9", "B14", "D0", "B6", "D5", "B2", "F3", "F13",
1386 PIC32_PINCTRL_GROUP(83, F3,

Completed in 259 milliseconds