| /linux-master/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_dccg.h | 57 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK0_EN, mask_sh),\
58 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK1_EN, mask_sh),\
59 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK2_EN, mask_sh),\
60 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK3_EN, mask_sh),\
61 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK0_SRC_SEL, mask_sh),\
62 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK1_SRC_SEL, mask_sh),\
63 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK2_SRC_SEL, mask_sh),\
64 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK3_SRC_SEL, mask_sh),\
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| H A D | dcn32_dccg.c | 290 REG_UPDATE_2(DPSTREAMCLK_CNTL,
295 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK1_EN,
299 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK2_EN,
303 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK3_EN,
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_dccg.h | 48 SR(DPSTREAMCLK_CNTL),\
89 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK0_EN, mask_sh),\
90 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK1_EN, mask_sh),\
91 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK2_EN, mask_sh),\
92 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK3_EN, mask_sh),\
93 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK0_SRC_SEL, mask_sh),\
94 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK1_SRC_SEL, mask_sh),\
95 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK2_SRC_SEL, mask_sh),\
96 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK3_SRC_SEL, mask_sh),\
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| H A D | dcn314_dccg.c | 262 REG_UPDATE_2(DPSTREAMCLK_CNTL,
267 REG_UPDATE_2(DPSTREAMCLK_CNTL,
272 REG_UPDATE_2(DPSTREAMCLK_CNTL,
277 REG_UPDATE_2(DPSTREAMCLK_CNTL,
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn35/ |
| H A D | dcn35_dccg.h | 68 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK0_EN, mask_sh),\
69 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK1_EN, mask_sh),\
70 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK2_EN, mask_sh),\
71 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK3_EN, mask_sh),\
72 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK0_SRC_SEL, mask_sh),\
73 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK1_SRC_SEL, mask_sh),\
74 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK2_SRC_SEL, mask_sh),\
75 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK3_SRC_SEL, mask_sh),\
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| H A D | dcn35_dccg.c | 336 REG_UPDATE_2(DPSTREAMCLK_CNTL,
341 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK1_EN,
345 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK2_EN,
349 REG_UPDATE_2(DPSTREAMCLK_CNTL, DPSTREAMCLK3_EN,
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_dccg.h | 42 SR(DPSTREAMCLK_CNTL),\
91 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK_PIPE0_EN, mask_sh),\
92 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK_PIPE1_EN, mask_sh),\
93 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK_PIPE2_EN, mask_sh),\
94 DCCG_SF(DPSTREAMCLK_CNTL, DPSTREAMCLK_PIPE3_EN, mask_sh),\
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| H A D | dcn31_dccg.c | 104 REG_UPDATE(DPSTREAMCLK_CNTL,
108 REG_UPDATE(DPSTREAMCLK_CNTL,
112 REG_UPDATE(DPSTREAMCLK_CNTL,
116 REG_UPDATE(DPSTREAMCLK_CNTL,
140 REG_UPDATE(DPSTREAMCLK_CNTL,
144 REG_UPDATE(DPSTREAMCLK_CNTL,
148 REG_UPDATE(DPSTREAMCLK_CNTL,
152 REG_UPDATE(DPSTREAMCLK_CNTL,
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_dccg.h | 367 uint32_t DPSTREAMCLK_CNTL; member in struct:dccg_registers
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| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.h | 1227 SR(PHYESYMCLK_CLOCK_CNTL), SR(DPSTREAMCLK_CNTL), SR(HDMISTREAMCLK_CNTL), \
|