Searched refs:AR_PHY_DAG_CTRLCCK (Results 1 - 6 of 6) sorted by relevance
| /haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/ |
| H A D | ar5212phy.h | 328 #define AR_PHY_DAG_CTRLCCK 0xA228 macro
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| H A D | ar5212_reset.c | 358 OS_REG_CLR_BIT(ah, AR_PHY_DAG_CTRLCCK,
360 OS_REG_RMW_FIELD(ah, AR_PHY_DAG_CTRLCCK,
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| /haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5312/ |
| H A D | ar5312_reset.c | 266 OS_REG_CLR_BIT(ah, AR_PHY_DAG_CTRLCCK,
268 OS_REG_RMW_FIELD(ah, AR_PHY_DAG_CTRLCCK,
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| /haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/ |
| H A D | ar9300phy.h | 364 #define AR_PHY_DAG_CTRLCCK AR_AGC_OFFSET(BB_bbb_dagc_ctrl) macro
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| H A D | ar9300_misc.c | 1466 reg = OS_REG_READ(ah, AR_PHY_DAG_CTRLCCK);
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| /haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/ |
| H A D | ar5416_reset.c | 226 HALDEBUG(ah, HAL_DEBUG_RESET, ">>>2 %s: AR_PHY_DAG_CTRLCCK=0x%x\n",
227 __func__, OS_REG_READ(ah,AR_PHY_DAG_CTRLCCK));
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