/u-boot/arch/arm/mach-uniphier/ |
H A D | reset.c | 10 #include <asm/secure.h>
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/u-boot/arch/arm/mach-renesas/ |
H A D | psci-r8a779a0.c | 11 #include <asm/secure.h>
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/u-boot/arch/arm/cpu/armv7/ |
H A D | exception_level.c | 3 * Switch to non-secure mode 8 * secure mode before booting an operating system. 16 #include <asm/secure.h> 20 * entry_non_secure() - entry point when switching to non-secure mode 22 * When switching to non-secure mode switch_to_non_secure_mode() calls this 31 debug("Reached non-secure mode\n"); 38 * switch_to_non_secure_mode() - switch to non-secure mode 40 * Operating systems may expect to run in non-secure mode. Here we check if 41 * we are running in secure mode and switch to non-secure mod [all...] |
H A D | psci-common.c | 24 #include <asm/secure.h>
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H A D | virt-v7.c | 6 * Routines to transition ARMv7 processors from secure into non-secure state 7 * and from non-secure SVC into HYP mode 17 #include <asm/secure.h> 104 * according to the spec one should not tinker with it in secure state 105 * in SVC mode. Do not try to read it once in non-secure state, 121 * from non-secure state. The first 32 interrupts are private per 130 * Relocate secure section before any cpu runs in secure ram. 131 * smp_kick_all_cpus may enable other cores and runs into secure [all...] |
H A D | nonsec_virt.S | 3 * code for switching cores into non-secure state and into HYP mode 20 /* the vector table for secure state and HYP mode */ 38 * secure monitor handler 41 * to non-secure state. 51 @ Obtain a secure stack 77 @ FIQ preserved for secure mode 104 movs pc, lr @ ERET to non-secure 139 * of the non-secure and HYP mode transition. The GIC distributor specific 155 * Switch a core to non-secure state. 158 * 2. allow coprocessor access in non-secure mode [all...] |
H A D | psci.S | 137 @ Switch to secure 155 @ Switch back to non-secure
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/u-boot/arch/arm/mach-omap2/ |
H A D | utils.c | 58 const char *secure; local 63 secure = "EMU"; 66 secure = "HS"; 69 secure = "GP"; 72 secure = NULL; 73 printf("Warning: fastboot.secure: unknown CPU sec: %u\n", dev); 76 env_set("fastboot.secure", secure);
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H A D | config_secure.mk | 23 "variable must be defined for TI secure devices. \ 30 ifneq ($(wildcard $(TI_SECURE_DEV_PKG)/scripts/secure-binary-image.sh),) 31 cmd_omapsecureimg = $(TI_SECURE_DEV_PKG)/scripts/secure-binary-image.sh \ 36 "$(TI_SECURE_DEV_PKG)/scripts/secure-binary-image.sh not found." \ 41 "variable must be defined for TI secure devices." \ 101 # order to secure them in some way
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/u-boot/board/kontron/sl28/ |
H A D | psci.c | 3 #include <asm/secure.h>
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/u-boot/arch/arm/cpu/armv8/ |
H A D | cpu.c | 19 #include <asm/secure.h>
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H A D | psci.S | 11 #include <asm/secure.h>
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/u-boot/drivers/power/domain/ |
H A D | Makefile | 15 obj-$(CONFIG_MESON_SECURE_POWER_DOMAIN) += meson-secure-pwrc.o
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/u-boot/arch/arm/mach-at91/include/mach/ |
H A D | at91_sfr.h | 24 u32 secure; /* 0x28: Security Configuration Register */ member in struct:atmel_sfr
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/u-boot/board/freescale/common/ |
H A D | arm_sleep.c | 10 #error " Deep sleep needs non-secure mode support. " 12 #include <asm/secure.h>
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/u-boot/arch/arm/mach-uniphier/arm32/ |
H A D | psci.c | 17 #include <asm/secure.h>
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/u-boot/arch/arm/mach-tegra/ |
H A D | psci.S | 46 @ lock reset vector for non-secure
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/u-boot/include/firmware/imx/sci/ |
H A D | sci.h | 105 int sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, sc_bool_t secure, 268 static inline int sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, sc_bool_t secure, argument
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/u-boot/arch/arm/mach-imx/imx8m/ |
H A D | psci.c | 12 #include <asm/secure.h>
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/u-boot/arch/arm/cpu/armv7/sunxi/ |
H A D | psci.c | 18 #include <asm/secure.h> 272 /* Switch to secure mode */ 353 /* Be cool with non-secure */
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/u-boot/arch/arm/lib/ |
H A D | bootm.c | 31 #include <asm/secure.h>
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/u-boot/board/xilinx/zynqmp/ |
H A D | cmds.c | 61 printf("Failed: secure op status:0x%x\n", ret); 343 U_BOOT_CMD_MKENT(secure, 5, 0, do_zynqmp_verify_secure, "", ""), 385 "secure src len [key_addr] - verifies secure images of $len bytes\n"
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/u-boot/arch/arm/mach-socfpga/ |
H A D | mailbox_s10.c | 13 #include <asm/secure.h>
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/u-boot/drivers/misc/imx8/ |
H A D | scu_api.c | 651 int sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, sc_bool_t secure, argument 663 RPC_U8(&msg, 0U) = B2U8(secure); 672 printf("%s: secure:%u isolated:%u restricted:%u grant:%u coherent:%u res:%d\n", 673 __func__, secure, isolated, restricted, grant, coherent,
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/u-boot/arch/arm/mach-imx/mx7/ |
H A D | psci-mx7.c | 11 #include <asm/secure.h> 474 * from non-secure state. The first 32 interrupts are private per
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