Searched refs:reg_width (Results 1 - 17 of 17) sorted by relevance

/u-boot/drivers/reset/
H A Dreset-socfpga.c69 int reg_width = sizeof(u32); local
70 int bank = id / (reg_width * BITS_PER_BYTE);
71 int offset = id % (reg_width * BITS_PER_BYTE);
81 int reg_width = sizeof(u32); local
82 int bank = id / (reg_width * BITS_PER_BYTE);
83 int offset = id % (reg_width * BITS_PER_BYTE);
/u-boot/drivers/gpio/
H A Dsh_pfc.c37 unsigned long reg_width)
39 switch (reg_width) {
54 unsigned long reg_width,
57 switch (reg_width) {
78 pos = dr->reg_width - (in_pos + 1);
81 dr->reg + offset, pos, dr->reg_width);
84 dr->reg_width) >> pos) & 1;
92 pos = dr->reg_width - (in_pos + 1);
96 dr->reg, !!value, pos, dr->reg_width);
103 gpio_write_raw_reg(dr->mapped_reg, dr->reg_width, d
36 gpio_read_raw_reg(void *mapped_reg, unsigned long reg_width) argument
53 gpio_write_raw_reg(void *mapped_reg, unsigned long reg_width, unsigned long data) argument
[all...]
/u-boot/drivers/serial/
H A Dserial_s5p.c54 u8 reg_width; /* register width */ member in struct:s5p_serial_plat
103 static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, u8 reg_width, argument
114 else if (reg_width == 4)
139 s5p_serial_baud(uart, plat->reg_width, uclk, baudrate);
182 if (plat->reg_width == 4)
196 if (plat->reg_width == 4)
229 plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
H A Dserial_coreboot.c88 plat->reg_width = 4; /* coreboot sets bit_width to 0 */
106 plat->reg_width = cb_info->regwidth;
H A Dns16550.c113 } else if (plat->reg_width == 4) {
133 } else if (plat->reg_width == 4) {
488 info->reg_width = plat->reg_width;
567 plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
H A Dsandbox.c214 .reg_width = 1,
/u-boot/include/
H A Dsh_pfc.h45 unsigned long reg, reg_width, field_width; member in struct:pinmux_cfg_reg
52 .reg = r, .reg_width = r_width, .field_width = f_width, \
57 .reg = r, .reg_width = r_width, \
63 unsigned long reg, reg_width, reg_shadow; member in struct:pinmux_data_reg
69 .reg = r, .reg_width = r_width, \
H A Dns16550.h62 * @reg_width: IO accesses size of registers (in bytes, 1 or 4)
73 int reg_width; member in struct:ns16550_plat
H A Dserial.h141 * @reg_width: size (in bytes) of the IO accesses to the registers
152 u8 reg_width; member in struct:serial_device_info
/u-boot/arch/x86/cpu/slimbootloader/
H A Dserial.c42 plat->reg_width = data->stride;
/u-boot/drivers/pwm/
H A Dpwm-mtk.c80 reg_width = PWMDWIDTH, reg_thres = PWMTHRES; local
115 reg_width = PWM45DWIDTH_FIXUP;
123 mtk_pwm_w32(dev, channel, reg_width, cnt_period);
/u-boot/drivers/pinctrl/renesas/
H A Dpfc.c100 u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width) argument
102 switch (reg_width) {
115 void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width, argument
118 switch (reg_width) {
172 *posp = crp->reg_width - ((in_pos + 1) * crp->field_width);
175 *posp = crp->reg_width;
193 crp->reg, value, field, crp->reg_width, crp->field_width);
198 data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width);
203 sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data);
215 unsigned int r_width = config_reg->reg_width;
[all...]
H A Dsh_pfc.h101 u8 reg_width, field_width; member in struct:pinmux_cfg_reg
126 .reg = r, .reg_width = r_width, \
146 .reg = r, .reg_width = r_width, \
183 u8 reg_width; member in struct:pinmux_data_reg
196 .reg = r, .reg_width = r_width + \
/u-boot/arch/x86/cpu/apollolake/
H A Duart.c108 ns.reg_width = 1;
/u-boot/cmd/
H A Dbdinfo.c131 bdinfo_print_num_l(" width", info.reg_width);
/u-boot/test/cmd/
H A Dbdinfo.c217 ut_assertok(test_num_l(uts, " width", info.reg_width));
/u-boot/arch/x86/lib/
H A Dacpi_table.c335 serial_width = serial_info.reg_width * 8;

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