Searched refs:rdata (Results 1 - 25 of 34) sorted by relevance

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/u-boot/arch/arm/mach-zynqmp/
H A Dpsu_spl_init.c65 int rdata = 0; local
67 rdata = readl(addr);
68 rdata = rdata & (~mask);
69 rdata = rdata | (value << shift);
70 writel(rdata, addr);
/u-boot/drivers/ddr/imx/imx8m/
H A Dddr_init.c224 unsigned int addr_slot, rdata, tmp, tmp_t; local
232 rdata = reg32_read(DDRC_DRAMTMG2(0) + addr_slot);
233 ddrc_w2r = rdata & 0x3f;
240 ddrc_r2w = (rdata >> 8) & 0x3f;
247 tmp_t = (rdata & 0xffffc0c0) | (ddrc_r2w << 8) | ddrc_w2r;
251 rdata = reg32_read(DDRC_DRAMTMG9(0) + addr_slot);
252 ddrc_w2r = rdata & 0x3f;
258 tmp_t = (rdata & 0xffffffc0) | ddrc_w2r;
262 rdata = reg32_read(DDRC_DRAMTMG2(0) + addr_slot);
263 ddrc_r2w = (rdata >>
[all...]
/u-boot/drivers/mtd/
H A Drenesas_rpc_hf.c208 static int rpc_hf_xfer(void *addr, u64 wdata, u64 *rdata, argument
253 *rdata = be64_to_cpu(readq(rpc_base + RPC_SMRDR0));
255 *rdata = be32_to_cpu(readl(rpc_base + RPC_SMRDR0));
272 u64 rdata = 0; local
275 ret = rpc_hf_xfer(addr, 0, &rdata, size, 0);
279 return rdata;
/u-boot/drivers/clk/altera/
H A Dclk-agilex.c159 u32 addr_offset, u32 *rdata, int timeout)
173 *rdata = 0;
179 *rdata = CM_REG_READL(plat, CLKMGR_MAINPLL_MEMSTAT);
181 *rdata = CM_REG_READL(plat, CLKMGR_PERPLL_MEMSTAT);
183 debug("MEMBUS: Read 0x%08x from addr = 0x%08x\n", *rdata, addr);
191 u32 rdata; local
195 &rdata, MEMBUS_TIMEOUT);
197 ((rdata & ~membus_pll[i].mask) | membus_pll[i].val),
158 membus_read_pll(struct socfpga_clk_plat *plat, u32 pll, u32 addr_offset, u32 *rdata, int timeout) argument
H A Dclk-agilex5.c158 u32 addr_offset, u32 *rdata, int timeout)
172 *rdata = 0;
178 *rdata = CM_REG_READL(plat, CLKMGR_MAINPLL_MEMSTAT);
180 *rdata = CM_REG_READL(plat, CLKMGR_PERPLL_MEMSTAT);
182 debug("MEMBUS: Read 0x%08x from addr = 0x%08x\n", *rdata, addr);
190 u32 rdata; local
194 &rdata, MEMBUS_TIMEOUT);
196 ((rdata & ~membus_pll[i].mask) |
157 membus_read_pll(struct socfpga_clk_plat *plat, u32 pll, u32 addr_offset, u32 *rdata, int timeout) argument
/u-boot/drivers/spi/
H A Dsh_qspi.c155 u8 *tdata = &dtdata, *rdata = &drdata; local
185 rdata = din;
214 *rdata = readb(&ss->regs->spdr);
216 rdata++;
/u-boot/include/
H A Dspartan3.h22 xilinx_rdata_fn rdata; member in struct:__anon1370
H A Dspartan2.h22 xilinx_rdata_fn rdata; member in struct:__anon1368
H A Dvirtex2.h25 xilinx_rdata_fn rdata; member in struct:__anon811
/u-boot/drivers/fpga/
H A Dspartan2.c121 fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy,
264 (*fn->rdata) (&(data[bytecount++]), cookie); /* read the data */
H A Dspartan3.c126 fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy,
271 (*fn->rdata) (&(data[bytecount++]), cookie); /* read the data */
H A Dvirtex2.c163 " rdata 0x%p\n"
168 fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata,
399 (*fn->rdata)(&data[bytecount++], cookie);
/u-boot/board/xilinx/zynqmp/zynqmp-zcu208-revA/
H A Dpsu_init_gpl.c715 unsigned int rdata = 0; local
859 rdata = Xil_In32(0xFD410098);
860 rdata = (rdata & 0xDF);
861 Xil_Out32(0xFD410098, rdata);
1706 unsigned int rdata = 0; local
1725 rdata = Xil_In32(0xFD40289C);
1726 rdata = rdata & ~0x03;
1727 rdata
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/u-boot/board/xilinx/zynqmp/zynqmp-zcu216-revA/
H A Dpsu_init_gpl.c715 unsigned int rdata = 0; local
859 rdata = Xil_In32(0xFD410098);
860 rdata = (rdata & 0xDF);
861 Xil_Out32(0xFD410098, rdata);
1706 unsigned int rdata = 0; local
1725 rdata = Xil_In32(0xFD40289C);
1726 rdata = rdata & ~0x03;
1727 rdata
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/u-boot/board/xilinx/zynqmp/zynqmp-a2197-revA/
H A Dpsu_init_gpl.c999 unsigned int rdata = 0; local
1017 rdata = Xil_In32(0xFD40289C);
1018 rdata = rdata & ~0x03;
1019 rdata = rdata | 0x1;
1020 Xil_Out32(0xFD40289C, rdata);
1025 rdata = Xil_In32(0xFD402B1C);
1027 } while ((rdata & 0x0000000E) != 0x0000000E);
/u-boot/board/xilinx/zynqmp/zynqmp-g-a2197-00-revA/
H A Dpsu_init_gpl.c999 unsigned int rdata = 0; local
1017 rdata = Xil_In32(0xFD40289C);
1018 rdata = rdata & ~0x03;
1019 rdata = rdata | 0x1;
1020 Xil_Out32(0xFD40289C, rdata);
1025 rdata = Xil_In32(0xFD402B1C);
1027 } while ((rdata & 0x0000000E) != 0x0000000E);
/u-boot/board/xilinx/zynqmp/zynqmp-m-a2197-01-revA/
H A Dpsu_init_gpl.c999 unsigned int rdata = 0; local
1017 rdata = Xil_In32(0xFD40289C);
1018 rdata = rdata & ~0x03;
1019 rdata = rdata | 0x1;
1020 Xil_Out32(0xFD40289C, rdata);
1025 rdata = Xil_In32(0xFD402B1C);
1027 } while ((rdata & 0x0000000E) != 0x0000000E);
/u-boot/board/xilinx/zynqmp/zynqmp-m-a2197-02-revA/
H A Dpsu_init_gpl.c999 unsigned int rdata = 0; local
1017 rdata = Xil_In32(0xFD40289C);
1018 rdata = rdata & ~0x03;
1019 rdata = rdata | 0x1;
1020 Xil_Out32(0xFD40289C, rdata);
1025 rdata = Xil_In32(0xFD402B1C);
1027 } while ((rdata & 0x0000000E) != 0x0000000E);
/u-boot/board/xilinx/zynqmp/zynqmp-m-a2197-03-revA/
H A Dpsu_init_gpl.c999 unsigned int rdata = 0; local
1017 rdata = Xil_In32(0xFD40289C);
1018 rdata = rdata & ~0x03;
1019 rdata = rdata | 0x1;
1020 Xil_Out32(0xFD40289C, rdata);
1025 rdata = Xil_In32(0xFD402B1C);
1027 } while ((rdata & 0x0000000E) != 0x0000000E);
/u-boot/board/xilinx/zynqmp/zynqmp-p-a2197-00-revA/
H A Dpsu_init_gpl.c999 unsigned int rdata = 0; local
1017 rdata = Xil_In32(0xFD40289C);
1018 rdata = rdata & ~0x03;
1019 rdata = rdata | 0x1;
1020 Xil_Out32(0xFD40289C, rdata);
1025 rdata = Xil_In32(0xFD402B1C);
1027 } while ((rdata & 0x0000000E) != 0x0000000E);
/u-boot/board/xilinx/zynqmp/zynqmp-zc1751-xm015-dc1/
H A Dpsu_init_gpl.c744 unsigned int rdata = 0; local
763 rdata = Xil_In32(0xFD40289C);
764 rdata = rdata & ~0x03;
765 rdata = rdata | 0x1;
766 Xil_Out32(0xFD40289C, rdata);
771 rdata = Xil_In32(0xFD402B1C);
773 } while ((rdata & 0x0000000E) != 0x0000000E);
/u-boot/board/xilinx/zynqmp/zynqmp-zc1751-xm019-dc5/
H A Dpsu_init_gpl.c754 unsigned int rdata = 0; local
773 rdata = Xil_In32(0xFD40289C);
774 rdata = rdata & ~0x03;
775 rdata = rdata | 0x1;
776 Xil_Out32(0xFD40289C, rdata);
781 rdata = Xil_In32(0xFD402B1C);
783 } while ((rdata & 0x0000000E) != 0x0000000E);
/u-boot/board/xilinx/zynqmp/zynqmp-zc1751-xm017-dc3/
H A Dpsu_init_gpl.c728 unsigned int rdata = 0; local
747 rdata = Xil_In32(0xFD40289C);
748 rdata = rdata & ~0x03;
749 rdata = rdata | 0x1;
750 Xil_Out32(0xFD40289C, rdata);
755 rdata = Xil_In32(0xFD402B1C);
757 } while ((rdata & 0x0000000E) != 0x0000000E);
/u-boot/board/xilinx/zynqmp/zynqmp-zc1751-xm016-dc2/
H A Dpsu_init_gpl.c728 unsigned int rdata = 0; local
747 rdata = Xil_In32(0xFD40289C);
748 rdata = rdata & ~0x03;
749 rdata = rdata | 0x1;
750 Xil_Out32(0xFD40289C, rdata);
755 rdata = Xil_In32(0xFD402B1C);
757 } while ((rdata & 0x0000000E) != 0x0000000E);
/u-boot/board/xilinx/zynqmp/zynqmp-zc1751-xm018-dc4/
H A Dpsu_init_gpl.c728 unsigned int rdata = 0; local
747 rdata = Xil_In32(0xFD40289C);
748 rdata = rdata & ~0x03;
749 rdata = rdata | 0x1;
750 Xil_Out32(0xFD40289C, rdata);
755 rdata = Xil_In32(0xFD402B1C);
757 } while ((rdata & 0x0000000E) != 0x0000000E);

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