1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018 Xilinx, Inc.
4 *
5 * Michal Simek <michal.simek@amd.com>
6 */
7#include <common.h>
8#include <asm/io.h>
9#include <asm/arch/psu_init_gpl.h>
10#include <linux/delay.h>
11
12#define PSU_MASK_POLL_TIME 1100000
13
14int __maybe_unused mask_pollonvalue(unsigned long add, u32 mask, u32 value)
15{
16	int i = 0;
17
18	while ((__raw_readl(add) & mask) != value) {
19		if (i == PSU_MASK_POLL_TIME)
20			return 0;
21		i++;
22	}
23	return 1;
24}
25
26__weak int mask_poll(u32 add, u32 mask)
27{
28	int i = 0;
29	unsigned long addr = add;
30
31	while (!(__raw_readl(addr) & mask)) {
32		if (i == PSU_MASK_POLL_TIME)
33			return 0;
34		i++;
35	}
36	return 1;
37}
38
39__weak u32 mask_read(u32 add, u32 mask)
40{
41	unsigned long addr = add;
42
43	return __raw_readl(addr) & mask;
44}
45
46__weak void mask_delay(u32 delay)
47{
48	udelay(delay);
49}
50
51__weak void psu_mask_write(unsigned long offset, unsigned long mask,
52			   unsigned long val)
53{
54	unsigned long regval = 0;
55
56	regval = readl(offset);
57	regval &= ~(mask);
58	regval |= (val & mask);
59	writel(regval, offset);
60}
61
62__weak void prog_reg(unsigned long addr, unsigned long mask,
63		     unsigned long shift, unsigned long value)
64{
65	int rdata = 0;
66
67	rdata = readl(addr);
68	rdata = rdata & (~mask);
69	rdata = rdata | (value << shift);
70	writel(rdata, addr);
71}
72
73__weak int psu_init(void)
74{
75	/*
76	 * This function is overridden by the one in
77	 * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists.
78	 */
79	return -1;
80}
81
82__weak unsigned long psu_post_config_data(void)
83{
84	/*
85	 * This function is overridden by the one in
86	 * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists.
87	 */
88	return 0;
89}
90