Searched refs:pmuxcr (Results 1 - 5 of 5) sorted by relevance
| /u-boot/board/freescale/p1_p2_rdb_pc/ |
| H A D | spl.c | 42 /* Set pmuxcr to allow both i2c1 and i2c2 */
43 setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
44 setbits_be32(&gur->pmuxcr,
45 in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
48 in_be32(&gur->pmuxcr);
51 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
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| H A D | p1_p2_rdb_pc.c | 202 setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SDHC_CD);
204 setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SDHC_WP);
208 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
210 setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_TDM_ENA);
309 setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
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| /u-boot/board/freescale/p1010rdb/ |
| H A D | p1010rdb.c | 157 clrbits_be32(&gur->pmuxcr, PMUXCR1_IFC_MASK);
165 clrsetbits_be32(&gur->pmuxcr, PMUXCR1_SDHC_MASK,
198 clrbits_be32(&gur->pmuxcr, PMUXCR1_IFC_MASK);
208 clrsetbits_be32(&gur->pmuxcr, PMUXCR1_SDHC_MASK,
267 clrbits_be32(&gur->pmuxcr, PMUXCR1_IFC_MASK);
276 clrsetbits_be32(&gur->pmuxcr, PMUXCR1_SDHC_MASK,
305 clrbits_be32(&gur->pmuxcr, PMUXCR1_IFC_MASK);
315 clrsetbits_be32(&gur->pmuxcr, PMUXCR1_SDHC_MASK,
631 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_CAN1_TDM |
637 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_CAN2_UAR
[all...] |
| /u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | cpu_init_early.c | 124 setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_LCLK_IFC_CS3);
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| /u-boot/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 1627 u32 pmuxcr; /* Pin multiplexing control */ member in struct:ccsr_gur
1880 u32 pmuxcr; /* Alt. function signal multiplex control */ member in struct:ccsr_gur
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